/* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
- Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc.
+ Copyright 1989, 1990, 1992, 1993, 1994, 1995, 1998, 1999, 2000, 2001, 2003
+ Free Software Foundation, Inc.
Contributed by the Center for Software Science at the
University of Utah (pa-gdb-bugs@cs.utah.edu).
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
-#include <ansidecl.h>
#include "sysdep.h"
#include "dis-asm.h"
#include "libhppa.h"
/* Integer register names, indexed by the numbers which appear in the
opcodes. */
-static const char *const reg_names[] =
+static const char *const reg_names[] =
{"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
"r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
"r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1",
/* Floating point register names, indexed by the numbers which appear in the
opcodes. */
-static const char *const fp_reg_names[] =
- {"fpsr", "fpe2", "fpe4", "fpe6",
- "fr4", "fr5", "fr6", "fr7", "fr8",
- "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
+static const char *const fp_reg_names[] =
+ {"fpsr", "fpe2", "fpe4", "fpe6",
+ "fr4", "fr5", "fr6", "fr7", "fr8",
+ "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
"fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
"fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"};
typedef unsigned int CORE_ADDR;
-/* Get at various relevent fields of an instruction word. */
+/* Get at various relevent fields of an instruction word. */
#define MASK_5 0x1f
#define MASK_10 0x3ff
#define MASK_11 0x7ff
#define MASK_14 0x3fff
+#define MASK_16 0xffff
#define MASK_21 0x1fffff
-/* This macro gets bit fields using HP's numbering (MSB = 0) */
+/* These macros get bit fields using HP's numbering (MSB = 0) */
#define GET_FIELD(X, FROM, TO) \
((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
+#define GET_BIT(X, WHICH) \
+ GET_FIELD (X, WHICH, WHICH)
+
/* Some of these have been converted to 2-d arrays because they
consume less storage this way. If the maintenance becomes a
problem, convert them back to const 1-d pointer arrays. */
"", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od",
",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"};
static const char *const unit_cond_names[] = {
- "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc",
- ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc"
+ "", ",swz", ",sbz", ",shz", ",sdc", ",swc", ",sbc", ",shc",
+ ",tr", ",nwz", ",nbz", ",nhz", ",ndc", ",nwc", ",nbc", ",nhc"
};
static const char *const unit_cond_64_names[] = {
"", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc",
"", ",b,m", ",e", ",e,m"
};
static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"};
+static const char *const fcnv_fixed_names[] = {",w", ",dw", "", ",qw"};
+static const char *const fcnv_ufixed_names[] = {",uw", ",udw", "", ",uqw"};
static const char *const float_comp_names[] =
{
",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
static const char *const read_write_names[] = {",r", ",w"};
static const char *const add_compl_names[] = { 0, "", ",l", ",tsv" };
-/* For a bunch of different instructions form an index into a
- completer name table. */
+/* For a bunch of different instructions form an index into a
+ completer name table. */
#define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
GET_FIELD (insn, 18, 18) << 1)
#define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
(GET_FIELD ((insn), 19, 19) ? 8 : 0))
+static void fput_reg PARAMS ((unsigned int, disassemble_info *));
+static void fput_fp_reg PARAMS ((unsigned int, disassemble_info *));
+static void fput_fp_reg_r PARAMS ((unsigned int, disassemble_info *));
+static void fput_creg PARAMS ((unsigned int, disassemble_info *));
+static void fput_const PARAMS ((unsigned int, disassemble_info *));
+static int extract_3 PARAMS ((unsigned int));
+static int extract_5_load PARAMS ((unsigned int));
+static int extract_5_store PARAMS ((unsigned int));
+static unsigned extract_5r_store PARAMS ((unsigned int));
+static unsigned extract_5R_store PARAMS ((unsigned int));
+static unsigned extract_10U_store PARAMS ((unsigned int));
+static unsigned extract_5Q_store PARAMS ((unsigned int));
+static int extract_11 PARAMS ((unsigned int));
+static int extract_14 PARAMS ((unsigned int));
+static int extract_16 PARAMS ((unsigned int));
+static int extract_21 PARAMS ((unsigned int));
+static int extract_12 PARAMS ((unsigned int));
+static int extract_17 PARAMS ((unsigned int));
+static int extract_22 PARAMS ((unsigned int));
+
/* Utility function to print registers. Put these first, so gcc's function
inlining can do its stuff. */
if (reg < 4)
(*info->fprintf_func) (info->stream, "fpe%d", reg * 2 + 1);
else
- (*info->fprintf_func) (info->stream, "%sR", reg ? fp_reg_names[reg]
- : "fr0");
+ (*info->fprintf_func) (info->stream, "%sR",
+ reg ? fp_reg_names[reg] : "fr0");
}
static void
(*info->fprintf_func) (info->stream, control_reg[reg]);
}
-/* print constants with sign */
+/* Print constants with sign. */
static void
fput_const (num, info)
}
/* Routines to extract various sized constants out of hppa
- instructions. */
+ instructions. */
-/* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
+/* Extract a 3-bit space register number from a be, ble, mtsp or mfsp. */
static int
extract_3 (word)
unsigned word;
return low_sign_extend (word >> 16 & MASK_5, 5);
}
-/* extract the immediate field from a st{bhw}s instruction */
+/* Extract the immediate field from a st{bhw}s instruction. */
static int
extract_5_store (word)
unsigned word;
return low_sign_extend (word & MASK_5, 5);
}
-/* extract the immediate field from a break instruction */
+/* Extract the immediate field from a break instruction. */
static unsigned
extract_5r_store (word)
unsigned word;
return (word & MASK_5);
}
-/* extract the immediate field from a {sr}sm instruction */
+/* Extract the immediate field from a {sr}sm instruction. */
static unsigned
extract_5R_store (word)
unsigned word;
return (word >> 16 & MASK_5);
}
-/* extract the 10 bit immediate field from a {sr}sm instruction */
+/* Extract the 10 bit immediate field from a {sr}sm instruction. */
static unsigned
extract_10U_store (word)
unsigned word;
return (word >> 16 & MASK_10);
}
-/* extract the immediate field from a bb instruction */
+/* Extract the immediate field from a bb instruction. */
static unsigned
extract_5Q_store (word)
unsigned word;
return (word >> 21 & MASK_5);
}
-/* extract an 11 bit immediate field */
+/* Extract an 11 bit immediate field. */
static int
extract_11 (word)
unsigned word;
return low_sign_extend (word & MASK_11, 11);
}
-/* extract a 14 bit immediate field */
+/* Extract a 14 bit immediate field. */
static int
extract_14 (word)
unsigned word;
return low_sign_extend (word & MASK_14, 14);
}
-/* extract a 21 bit constant */
+/* Extract a 16 bit immediate field (PA2.0 wide only). */
+static int
+extract_16 (word)
+ unsigned word;
+{
+ int m15, m0, m1;
+ m0 = GET_BIT (word, 16);
+ m1 = GET_BIT (word, 17);
+ m15 = GET_BIT (word, 31);
+ word = (word >> 1) & 0x1fff;
+ word = word | (m15 << 15) | ((m15 ^ m0) << 14) | ((m15 ^ m1) << 13);
+ return sign_extend (word, 16);
+}
+
+/* Extract a 21 bit constant. */
static int
extract_21 (word)
return sign_extend (val, 21) << 11;
}
-/* extract a 12 bit constant from branch instructions */
+/* Extract a 12 bit constant from branch instructions. */
static int
extract_12 (word)
unsigned word;
{
return sign_extend (GET_FIELD (word, 19, 28) |
- GET_FIELD (word, 29, 29) << 10 |
- (word & 0x1) << 11, 12) << 2;
+ GET_FIELD (word, 29, 29) << 10 |
+ (word & 0x1) << 11, 12) << 2;
}
-/* extract a 17 bit constant from branch instructions, returning the
- 19 bit signed value. */
+/* Extract a 17 bit constant from branch instructions, returning the
+ 19 bit signed value. */
static int
extract_17 (word)
unsigned word;
{
return sign_extend (GET_FIELD (word, 19, 28) |
- GET_FIELD (word, 29, 29) << 10 |
- GET_FIELD (word, 11, 15) << 11 |
- (word & 0x1) << 16, 17) << 2;
+ GET_FIELD (word, 29, 29) << 10 |
+ GET_FIELD (word, 11, 15) << 11 |
+ (word & 0x1) << 16, 17) << 2;
+}
+
+static int
+extract_22 (word)
+ unsigned word;
+{
+ return sign_extend (GET_FIELD (word, 19, 28) |
+ GET_FIELD (word, 29, 29) << 10 |
+ GET_FIELD (word, 11, 15) << 11 |
+ GET_FIELD (word, 6, 10) << 16 |
+ (word & 0x1) << 21, 22) << 2;
}
/* Print one instruction. */
if ((insn & opcode->mask) == opcode->match)
{
register const char *s;
-
+#ifndef BFD64
+ if (opcode->arch == pa20w)
+ continue;
+#endif
(*info->fprintf_func) (info->stream, "%s", opcode->name);
- if (!strchr ("cfCY?-+nHNZFIuv", opcode->args[0]))
+ if (!strchr ("cfCY?-+nHNZFIuv{", opcode->args[0]))
(*info->fprintf_func) (info->stream, " ");
for (s = opcode->args; *s != '\0'; ++s)
{
fput_reg (GET_FIELD (insn, 27, 31), info);
break;
- /* Handle floating point registers. */
+ /* Handle floating point registers. */
case 'f':
switch (*++s)
{
fput_fp_reg (GET_FIELD (insn, 6, 10), info);
break;
- /* 'fA' will not generate a space before the regsiter
- name. Normally that is fine. Except that it
- causes problems with xmpyu which has no FP format
- completer. */
+ /* 'fA' will not generate a space before the regsiter
+ name. Normally that is fine. Except that it
+ causes problems with xmpyu which has no FP format
+ completer. */
case 'X':
fputs_filtered (" ", info);
-
- /* FALLTHRU */
+ /* FALLTHRU */
case 'A':
if (GET_FIELD (insn, 24, 24))
fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
else
fput_fp_reg (GET_FIELD (insn, 6, 10), info);
-
break;
case 'b':
if (GET_FIELD (insn, 25, 25))
fput_fp_reg (reg, info);
break;
}
+
+ /* 'fe' will not generate a space before the register
+ name. Normally that is fine. Except that it
+ causes problems with fstw fe,y(b) which has no FP
+ format completer. */
+ case 'E':
+ fputs_filtered (" ", info);
+ /* FALLTHRU */
+
case 'e':
- if (GET_FIELD (insn, 25, 25))
+ if (GET_FIELD (insn, 30, 30))
fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
else
fput_fp_reg (GET_FIELD (insn, 11, 15), info);
break;
-
+ case 'x':
+ fput_fp_reg (GET_FIELD (insn, 11, 15), info);
+ break;
}
break;
fput_const (extract_5_load (insn), info);
break;
case 's':
- (*info->fprintf_func) (info->stream,
- "sr%d", GET_FIELD (insn, 16, 17));
+ {
+ int space = GET_FIELD (insn, 16, 17);
+ /* Zero means implicit addressing, not use of sr0. */
+ if (space != 0)
+ (*info->fprintf_func) (info->stream, "sr%d", space);
+ }
break;
case 'S':
- (*info->fprintf_func) (info->stream, "sr%d", extract_3 (insn));
+ (*info->fprintf_func) (info->stream, "sr%d",
+ extract_3 (insn));
break;
- /* Handle completers. */
+ /* Handle completers. */
case 'c':
switch (*++s)
{
case 'x':
- (*info->fprintf_func) (info->stream, "%s ",
- index_compl_names[GET_COMPL (insn)]);
+ (*info->fprintf_func)
+ (info->stream, "%s",
+ index_compl_names[GET_COMPL (insn)]);
+ break;
+ case 'X':
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ index_compl_names[GET_COMPL (insn)]);
break;
case 'm':
- (*info->fprintf_func) (info->stream, "%s ",
- short_ldst_compl_names[GET_COMPL (insn)]);
+ (*info->fprintf_func)
+ (info->stream, "%s",
+ short_ldst_compl_names[GET_COMPL (insn)]);
break;
- case 'q':
+ case 'M':
(*info->fprintf_func)
(info->stream, "%s ",
- short_ldst_compl_names[(GET_FIELD (insn, 28, 28)
- | GET_FIELD (insn, 29, 29))]);
+ short_ldst_compl_names[GET_COMPL (insn)]);
break;
- case 'J':
- if (insn & 0x4)
- (*info->fprintf_func) (info->stream, ",mb ");
- else
- (*info->fprintf_func) (info->stream, ",ma ");
+ case 'A':
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ short_bytes_compl_names[GET_COMPL (insn)]);
break;
case 's':
- (*info->fprintf_func) (info->stream, "%s ",
- short_bytes_compl_names[GET_COMPL (insn)]);
+ (*info->fprintf_func)
+ (info->stream, "%s",
+ short_bytes_compl_names[GET_COMPL (insn)]);
+ break;
+ case 'c':
+ case 'C':
+ switch (GET_FIELD (insn, 20, 21))
+ {
+ case 1:
+ (*info->fprintf_func) (info->stream, ",bc ");
+ break;
+ case 2:
+ (*info->fprintf_func) (info->stream, ",sl ");
+ break;
+ default:
+ (*info->fprintf_func) (info->stream, " ");
+ }
+ break;
+ case 'd':
+ switch (GET_FIELD (insn, 20, 21))
+ {
+ case 1:
+ (*info->fprintf_func) (info->stream, ",co ");
+ break;
+ default:
+ (*info->fprintf_func) (info->stream, " ");
+ }
+ break;
+ case 'o':
+ (*info->fprintf_func) (info->stream, ",o");
+ break;
+ case 'g':
+ (*info->fprintf_func) (info->stream, ",gate");
+ break;
+ case 'p':
+ (*info->fprintf_func) (info->stream, ",l,push");
break;
+ case 'P':
+ (*info->fprintf_func) (info->stream, ",pop");
+ break;
+ case 'l':
case 'L':
(*info->fprintf_func) (info->stream, ",l");
break;
case 'w':
- (*info->fprintf_func) (info->stream, "%s ",
- read_write_names[GET_FIELD (insn, 25, 25)]);
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ read_write_names[GET_FIELD (insn, 25, 25)]);
break;
case 'W':
(*info->fprintf_func) (info->stream, ",w");
break;
case 'a':
(*info->fprintf_func)
- (info->stream, "%s", add_compl_names[GET_FIELD
- (insn, 20, 21)]);
+ (info->stream, "%s",
+ add_compl_names[GET_FIELD (insn, 20, 21)]);
break;
case 'Y':
(*info->fprintf_func)
- (info->stream, ",dc%s", add_compl_names[GET_FIELD
- (insn, 20, 21)]);
+ (info->stream, ",dc%s",
+ add_compl_names[GET_FIELD (insn, 20, 21)]);
break;
case 'y':
(*info->fprintf_func)
- (info->stream, ",c%s", add_compl_names[GET_FIELD
- (insn, 20, 21)]);
+ (info->stream, ",c%s",
+ add_compl_names[GET_FIELD (insn, 20, 21)]);
break;
case 'v':
if (GET_FIELD (insn, 20, 20))
/* EXTRD/W has a following condition. */
if (*(s + 1) == '?')
(*info->fprintf_func)
- (info->stream, "%s", signed_unsigned_names[GET_FIELD
- (insn, 21, 21)]);
+ (info->stream, "%s",
+ signed_unsigned_names[GET_FIELD (insn, 21, 21)]);
else
(*info->fprintf_func)
- (info->stream, "%s ", signed_unsigned_names[GET_FIELD
- (insn, 21, 21)]);
+ (info->stream, "%s ",
+ signed_unsigned_names[GET_FIELD (insn, 21, 21)]);
break;
case 'h':
(*info->fprintf_func)
- (info->stream, "%s", mix_half_names[GET_FIELD
- (insn, 17, 17)]);
+ (info->stream, "%s",
+ mix_half_names[GET_FIELD (insn, 17, 17)]);
break;
case 'H':
(*info->fprintf_func)
- (info->stream, "%s", saturation_names[GET_FIELD
- (insn, 24, 25)]);
+ (info->stream, "%s ",
+ saturation_names[GET_FIELD (insn, 24, 25)]);
break;
case '*':
(*info->fprintf_func)
- (info->stream, ",%d%d%d%d ",
- GET_FIELD (insn, 17, 18), GET_FIELD (insn, 20, 21),
- GET_FIELD (insn, 22, 23), GET_FIELD (insn, 24, 25));
+ (info->stream, ",%d%d%d%d ",
+ GET_FIELD (insn, 17, 18), GET_FIELD (insn, 20, 21),
+ GET_FIELD (insn, 22, 23), GET_FIELD (insn, 24, 25));
break;
+
+ case 'q':
+ {
+ int m, a;
+
+ m = GET_FIELD (insn, 28, 28);
+ a = GET_FIELD (insn, 29, 29);
+
+ if (m && !a)
+ fputs_filtered (",ma ", info);
+ else if (m && a)
+ fputs_filtered (",mb ", info);
+ else
+ fputs_filtered (" ", info);
+ break;
+ }
+
+ case 'J':
+ {
+ int opc = GET_FIELD (insn, 0, 5);
+
+ if (opc == 0x16 || opc == 0x1e)
+ {
+ if (GET_FIELD (insn, 29, 29) == 0)
+ fputs_filtered (",ma ", info);
+ else
+ fputs_filtered (",mb ", info);
+ }
+ else
+ fputs_filtered (" ", info);
+ break;
+ }
+
+ case 'e':
+ {
+ int opc = GET_FIELD (insn, 0, 5);
+
+ if (opc == 0x13 || opc == 0x1b)
+ {
+ if (GET_FIELD (insn, 18, 18) == 1)
+ fputs_filtered (",mb ", info);
+ else
+ fputs_filtered (",ma ", info);
+ }
+ else if (opc == 0x17 || opc == 0x1f)
+ {
+ if (GET_FIELD (insn, 31, 31) == 1)
+ fputs_filtered (",ma ", info);
+ else
+ fputs_filtered (",mb ", info);
+ }
+ else
+ fputs_filtered (" ", info);
+
+ break;
+ }
}
break;
- /* Handle conditions. */
+ /* Handle conditions. */
case '?':
{
s++;
switch (*s)
{
case 'f':
- (*info->fprintf_func) (info->stream, "%s ",
- float_comp_names[GET_FIELD
- (insn, 27, 31)]);
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ float_comp_names[GET_FIELD (insn, 27, 31)]);
break;
- /* these four conditions are for the set of instructions
+ /* these four conditions are for the set of instructions
which distinguish true/false conditions by opcode
rather than by the 'f' bit (sigh): comb, comib,
addb, addib */
case 't':
- fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)],
- info);
+ fputs_filtered
+ (compare_cond_names[GET_FIELD (insn, 16, 18)], info);
break;
- case 'T':
- fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)
- + 8], info);
- break;
- case 'r':
- fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)],
- info);
+ case 'n':
+ fputs_filtered
+ (compare_cond_names[GET_FIELD (insn, 16, 18)
+ + GET_FIELD (insn, 4, 4) * 8],
+ info);
break;
- case 'R':
- fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)
- + 8], info);
+ case 'N':
+ fputs_filtered
+ (compare_cond_64_names[GET_FIELD (insn, 16, 18)
+ + GET_FIELD (insn, 2, 2) * 8],
+ info);
break;
case 'Q':
- fputs_filtered (cmpib_cond_64_names[GET_FIELD (insn, 16, 18)],
- info);
- break;
- case 'n':
- fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)
- + GET_FIELD (insn, 4, 4) * 8], info);
+ fputs_filtered
+ (cmpib_cond_64_names[GET_FIELD (insn, 16, 18)],
+ info);
break;
case '@':
- fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18)
- + GET_FIELD (insn, 4, 4) * 8], info);
+ fputs_filtered
+ (add_cond_names[GET_FIELD (insn, 16, 18)
+ + GET_FIELD (insn, 4, 4) * 8],
+ info);
break;
case 's':
- (*info->fprintf_func) (info->stream, "%s ",
- compare_cond_names[GET_COND (insn)]);
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ compare_cond_names[GET_COND (insn)]);
break;
case 'S':
- (*info->fprintf_func) (info->stream, "%s ",
- compare_cond_64_names[GET_COND (insn)]);
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ compare_cond_64_names[GET_COND (insn)]);
break;
case 'a':
- (*info->fprintf_func) (info->stream, "%s ",
- add_cond_names[GET_COND (insn)]);
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ add_cond_names[GET_COND (insn)]);
break;
case 'A':
- (*info->fprintf_func) (info->stream, "%s ",
- add_cond_64_names[GET_COND (insn)]);
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ add_cond_64_names[GET_COND (insn)]);
break;
case 'd':
- (*info->fprintf_func) (info->stream, "%s",
- add_cond_names[GET_FIELD (insn, 16, 18)]);
- break;
-
- case 'D':
- (*info->fprintf_func) (info->stream, "%s",
- add_cond_names[GET_FIELD (insn, 16, 18)
- + 8]);
- break;
- case 'w':
- (*info->fprintf_func)
+ (*info->fprintf_func)
(info->stream, "%s",
- wide_add_cond_names[GET_FIELD (insn, 16, 18)]);
+ add_cond_names[GET_FIELD (insn, 16, 18)]);
break;
case 'W':
- (*info->fprintf_func)
+ (*info->fprintf_func)
(info->stream, "%s",
- wide_add_cond_names[GET_FIELD (insn, 16, 18) + 8]);
+ wide_add_cond_names[GET_FIELD (insn, 16, 18) +
+ GET_FIELD (insn, 4, 4) * 8]);
break;
case 'l':
- (*info->fprintf_func) (info->stream, "%s ",
- logical_cond_names[GET_COND (insn)]);
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ logical_cond_names[GET_COND (insn)]);
break;
case 'L':
- (*info->fprintf_func) (info->stream, "%s ",
- logical_cond_64_names[GET_COND (insn)]);
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ logical_cond_64_names[GET_COND (insn)]);
break;
case 'u':
- (*info->fprintf_func) (info->stream, "%s ",
- unit_cond_names[GET_COND (insn)]);
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ unit_cond_names[GET_COND (insn)]);
break;
case 'U':
- (*info->fprintf_func) (info->stream, "%s ",
- unit_cond_64_names[GET_COND (insn)]);
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ unit_cond_64_names[GET_COND (insn)]);
break;
case 'y':
case 'x':
(*info->fprintf_func) (info->stream, " ");
break;
case 'X':
- (*info->fprintf_func) (info->stream, "%s ",
- shift_cond_64_names[GET_FIELD (insn, 16, 18)]);
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ shift_cond_64_names[GET_FIELD (insn, 16, 18)]);
break;
case 'B':
(*info->fprintf_func)
case 'U':
fput_const (extract_10U_store (insn), info);
break;
+ case 'B':
case 'Q':
fput_const (extract_5Q_store (insn), info);
break;
case 'k':
fput_const (extract_21 (insn), info);
break;
+ case '<':
+ case 'l':
+ /* 16-bit long disp., PA2.0 wide only. */
+ fput_const (extract_16 (insn), info);
+ break;
case 'n':
if (insn & 0x2)
(*info->fprintf_func) (info->stream, ",n ");
(*info->fprintf_func) (info->stream, " ");
break;
case 'w':
- (*info->print_address_func) (memaddr + 8 + extract_12 (insn),
- info);
+ (*info->print_address_func)
+ (memaddr + 8 + extract_12 (insn), info);
break;
case 'W':
/* 17 bit PC-relative branch. */
- (*info->print_address_func) ((memaddr + 8
- + extract_17 (insn)),
- info);
+ (*info->print_address_func)
+ ((memaddr + 8 + extract_17 (insn)), info);
break;
case 'z':
/* 17 bit displacement. This is an offset from a register
/* addil %r1 implicit output. */
(*info->fprintf_func) (info->stream, "%%r1");
break;
-
+
+ case 'Y':
+ /* be,l %sr0,%r31 implicit output. */
+ (*info->fprintf_func) (info->stream, "%%sr0,%%r31");
+ break;
+
+ case '@':
+ (*info->fprintf_func) (info->stream, "0");
+ break;
+
case '.':
(*info->fprintf_func) (info->stream, "%d",
- GET_FIELD (insn, 24, 25));
+ GET_FIELD (insn, 24, 25));
break;
case '*':
(*info->fprintf_func) (info->stream, "%d",
- GET_FIELD (insn, 22, 25));
+ GET_FIELD (insn, 22, 25));
break;
case '!':
(*info->fprintf_func) (info->stream, "%%sar");
break;
case 'p':
(*info->fprintf_func) (info->stream, "%d",
- 31 - GET_FIELD (insn, 22, 26));
+ 31 - GET_FIELD (insn, 22, 26));
break;
case '~':
{
}
case 'P':
(*info->fprintf_func) (info->stream, "%d",
- GET_FIELD (insn, 22, 26));
+ GET_FIELD (insn, 22, 26));
break;
case 'q':
{
}
case 'T':
(*info->fprintf_func) (info->stream, "%d",
- 32 - GET_FIELD (insn, 27, 31));
+ 32 - GET_FIELD (insn, 27, 31));
break;
case '%':
{
fput_const (GET_FIELD (insn, 6, 31), info);
break;
case 'v':
- (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
+ (*info->fprintf_func) (info->stream, ",%d",
+ GET_FIELD (insn, 23, 25));
break;
case 'O':
fput_const ((GET_FIELD (insn, 6,20) << 5 |
GET_FIELD (insn, 27, 31)), info);
break;
case 'u':
- (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
+ (*info->fprintf_func) (info->stream, ",%d",
+ GET_FIELD (insn, 23, 25));
break;
case 'F':
/* if no destination completer and not before a completer
for fcmp, need a space here */
if (s[1] == 'G' || s[1] == '?')
- fputs_filtered (float_format_names[GET_FIELD (insn, 19, 20)],
- info);
+ fputs_filtered
+ (float_format_names[GET_FIELD (insn, 19, 20)], info);
else
- (*info->fprintf_func) (info->stream, "%s ",
- float_format_names[GET_FIELD
- (insn, 19, 20)]);
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ float_format_names[GET_FIELD (insn, 19, 20)]);
break;
case 'G':
- (*info->fprintf_func) (info->stream, "%s ",
- float_format_names[GET_FIELD (insn,
- 17, 18)]);
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ float_format_names[GET_FIELD (insn, 17, 18)]);
break;
case 'H':
if (GET_FIELD (insn, 26, 26) == 1)
(*info->fprintf_func) (info->stream, "%s ",
- float_format_names[0]);
+ float_format_names[0]);
else
(*info->fprintf_func) (info->stream, "%s ",
- float_format_names[1]);
+ float_format_names[1]);
break;
case 'I':
/* if no destination completer and not before a completer
for fcmp, need a space here */
if (s[1] == '?')
- fputs_filtered (float_format_names[GET_FIELD (insn, 20, 20)],
- info);
+ fputs_filtered
+ (float_format_names[GET_FIELD (insn, 20, 20)], info);
else
- (*info->fprintf_func) (info->stream, "%s ",
- float_format_names[GET_FIELD
- (insn, 20, 20)]);
+ (*info->fprintf_func)
+ (info->stream, "%s ",
+ float_format_names[GET_FIELD (insn, 20, 20)]);
break;
+
+ case 'J':
+ fput_const (extract_14 (insn), info);
+ break;
+
case '#':
{
int sign = GET_FIELD (insn, 31, 31);
fput_const (disp, info);
break;
}
+ case 'K':
case 'd':
{
int sign = GET_FIELD (insn, 31, 31);
break;
}
- /* ?!? FIXME */
+ case '>':
+ case 'y':
+ {
+ /* 16-bit long disp., PA2.0 wide only. */
+ int disp = extract_16 (insn);
+ disp &= ~3;
+ fput_const (disp, info);
+ break;
+ }
+
+ case '&':
+ {
+ /* 16-bit long disp., PA2.0 wide only. */
+ int disp = extract_16 (insn);
+ disp &= ~7;
+ fput_const (disp, info);
+ break;
+ }
+
case '_':
+ break; /* Dealt with by '{' */
+
case '{':
- fputs_filtered ("Disassembler botch.\n", info);
- break;
+ {
+ int sub = GET_FIELD (insn, 14, 16);
+ int df = GET_FIELD (insn, 17, 18);
+ int sf = GET_FIELD (insn, 19, 20);
+ const char * const * source = float_format_names;
+ const char * const * dest = float_format_names;
+ char *t = "";
+ if (sub == 4)
+ {
+ fputs_filtered (",UND ", info);
+ break;
+ }
+ if ((sub & 3) == 3)
+ t = ",t";
+ if ((sub & 3) == 1)
+ source = sub & 4 ? fcnv_ufixed_names : fcnv_fixed_names;
+ if (sub & 2)
+ dest = sub & 4 ? fcnv_ufixed_names : fcnv_fixed_names;
+
+ (*info->fprintf_func) (info->stream, "%s%s%s ",
+ t, source[sf], dest[df]);
+ break;
+ }
case 'm':
{
}
case 'X':
- (*info->print_address_func) ((memaddr + 8
- + extract_22 (insn)),
- info);
- break;
- case 'B':
- fputs_filtered (",pop", info);
- break;
- case 'M':
- fputs_filtered (",push", info);
+ (*info->print_address_func)
+ (memaddr + 8 + extract_22 (insn), info);
break;
case 'L':
fputs_filtered (",%r2", info);
break;
- case 'g':
- fputs_filtered (",gate", info);
- break;
- case 'l':
- fputs_filtered (",l", info);
- break;
default:
(*info->fprintf_func) (info->stream, "%c", *s);
break;