- cld/sed supported.

[motonesfpga/motonesfpga.git] / simulation / cpu / decoder.vhd

diff --git a/simulation/cpu/decoder.vhd b/simulation/cpu/decoder.vhd
index c51098b..660be02 100644 (file)
--- a/simulation/cpu/decoder.vhd
+++ b/simulation/cpu/decoder.vhd
@@ -437,6 +437,8 @@ end  procedure;
 
                 elsif instruction = conv_std_logic_vector(16#d8#, dsize) then
                     d_print("cld");
+                    set_flag (st_D, '0');
+                    single_inst;
 
                 elsif instruction = conv_std_logic_vector(16#58#, dsize) then
                     d_print("cli");
@@ -482,6 +484,8 @@ end  procedure;
 
                 elsif instruction = conv_std_logic_vector(16#f8#, dsize) then
                     d_print("sed");
+                    set_flag (st_D, '1');
+                    single_inst;
 
                 elsif instruction = conv_std_logic_vector(16#78#, dsize) then
                     d_print("sei");