#if defined(HAS_DMA)
#include "hd6844.h"
#endif
-
+#if defined(_FM8)
+#include "bubblecasette.h"
+#endif
FM7_MAINIO::FM7_MAINIO(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
{
int i;
p_vm = parent_vm;
p_emu = parent_emu;
+#if defined(_FM8)
+ psg = NULL;
+#else
+ for(i = 0; i < 3; i++) {
+ opn[i] = NULL;
+ }
+# if !defined(_FM77AV_VARIANTS)
+ psg = NULL;
+#endif
+#endif
+ drec = NULL;
+ pcm1bit = NULL;
+ joystick = NULL;
+ fdc = NULL;
+ printer = NULL;
+
kanjiclass1 = NULL;
kanjiclass2 = NULL;
+
+ display = NULL;
+ keyboard = NULL;
+ maincpu = NULL;
+ mainmem = NULL;
+ subcpu = NULL;
+#ifdef WITH_Z80
+ z80 = NULL;
+#endif
+#if defined(CAPABLE_JCOMMCARD)
+ jcommcard = NULL;
+#endif
+#if defined(_FM8)
+ bubble_casette[0] = NULL;
+ bubble_casette[1] = NULL;
+#endif
// FD00
clock_fast = true;
- lpt_strobe = false;
- lpt_slctin = false;
+ lpt_strobe = false; // bit6
+ lpt_slctin = false; // bit7
// FD01
lpt_outdata = 0x00;
// FD02
- cmt_indat = false; // bit7
+ cmt_indat = true; // bit7
cmt_invert = false; // Invert signal
- lpt_det2 = true;
- lpt_det1 = true;
- lpt_pe = true;
- lpt_ackng_inv = true;
- lpt_error_inv = true;
- lpt_busy = true;
- lpt_type = 0;
+ irqstat_reg0 = 0xff;
+
// FD04
#if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX) || \
defined(_FM77AV20) || defined(_FM77AV20EX) || defined(_FM77AV20SX)
intmode_fdc = false; // bit2, '0' = normal, '1' = SFD.
// FD05
extdet_neg = false;
-#ifdef WITH_Z80
- z80_sel = false; // bit0 : '1' = Z80. Maybe only FM-7/77.
-#endif
+ req_z80run = false;
+ z80_run = false;
// FD06,07
intstat_syndet = false;
intstat_rxrdy = false;
intstat_txrdy = false;
+ irqstat_timer = false;
+ irqstat_printer = false;
+ irqstat_keyboard = false;
// FD0B
// FD0D
// FD0F
- stat_romrammode = true; // ROM ON
-
// FD15/ FD46 / FD51
#if defined(_FM8)
connect_psg = false;
fdc_headreg = 0x00;
fdc_drvsel = 0x00;
fdc_motor = false;
- irqstat_fdc = 0;
+ irqstat_fdc = false;
+ irqreg_fdc = 0xff; //0b11111111;
+ irqmask_syndet = true;
+ irqmask_rxrdy = true;
+ irqmask_txrdy = true;
+ irqmask_mfd = true;
+ irqmask_timer = true;
+ irqmask_printer = true;
+ irqmask_keyboard = true;
+ irqstat_reg0 = 0xff;
+
+
+ irqreq_syndet = false;
+ irqreq_rxrdy = false;
+ irqreq_txrdy = false;
+ irqreq_printer = false;
+ irqreq_keyboard = false;
+
// FD20, FD21, FD22, FD23
connect_kanjiroml1 = false;
#if defined(_FM77AV_VARIANTS)
#if defined(_FM77_VARIANTS) || defined(_FM77AV_VARIANTS)
boot_ram = false;
#endif
+
#if defined(HAS_DMA)
dmac = NULL;
#endif
+ bootmode = config.boot_mode & 3;
memset(io_w_latch, 0xff, 0x100);
- init_output_signals(&clock_status);
- init_output_signals(&printer_reset_bus);
- init_output_signals(&printer_strobe_bus);
- init_output_signals(&printer_select_bus);
+ initialize_output_signals(&clock_status);
+ initialize_output_signals(&printer_reset_bus);
+ initialize_output_signals(&printer_strobe_bus);
+ initialize_output_signals(&printer_select_bus);
+ initialize_output_signals(&irq_bus);
+ initialize_output_signals(&firq_bus);
+ initialize_output_signals(&nmi_bus);
+ set_device_name(_T("MAIN I/O"));
}
FM7_MAINIO::~FM7_MAINIO()
}
-
void FM7_MAINIO::initialize()
{
event_beep = -1;
event_beep_oneshot = -1;
event_timerirq = -1;
event_fdc_motor = -1;
-
+ lpt_type = config.printer_type;
+ fdc_cmdreg = 0x00;
+
#if defined(_FM77_VARIANTS) || defined(_FM77AV_VARIANTS)
boot_ram = false;
# if defined(_FM77_VARIANTS)
# endif
# endif
#endif
- irqmask_syndet = true;
- irqmask_rxrdy = true;
- irqmask_txrdy = true;
- irqmask_mfd = true;
- irqmask_timer = true;
- irqmask_printer = true;
- irqmask_keyboard = true;
- irqstat_reg0 = 0xff;
-
- intstat_syndet = false;
- intstat_rxrdy = false;
- intstat_txrdy = false;
- irqstat_timer = false;
- irqstat_printer = false;
- irqstat_keyboard = false;
-
- irqreq_syndet = false;
- irqreq_rxrdy = false;
- irqreq_txrdy = false;
- irqreq_printer = false;
- irqreq_keyboard = false;
#if defined(_FM77AV_VARIANTS)
- reg_fd12 = 0x00;
+ reg_fd12 = 0xbc; // 0b10111100
#endif
-
+ bootmode = config.boot_mode & 3;
+ reset_printer();
}
void FM7_MAINIO::reset()
#endif
// Around boot rom
#if defined(_FM77_VARIANTS)
- //boot_ram = (mainmem->read_signal(FM7_MAINIO_BOOTRAM_RW) == 0) ? false : true;
boot_ram = false;
#elif defined(_FM77AV_VARIANTS)
- //boot_ram = (mainmem->read_signal(FM7_MAINIO_BOOTRAM_RW) == 0) ? false : true;
boot_ram = true;
#endif
// FD05
- extdet_neg = false;
sub_cancel = false; // bit6 : '1' Cancel req.
sub_halt = false; // bit6 : '1' Cancel req.
sub_cancel_bak = sub_cancel; // bit6 : '1' Cancel req.
sub_halt_bak = sub_halt; // bit6 : '1' Cancel req.
- //sub_busy = false;
+ req_z80run = false; // OK?
+ z80_run = false;
+
// FD02
- cmt_indat = false; // bit7
+ cmt_indat = true; // bit7
cmt_invert = false; // Invert signal
lpt_det2 = true;
lpt_det1 = true;
- lpt_pe = true;
- lpt_ackng_inv = true;
- lpt_error_inv = true;
- lpt_busy = true;
- lpt_type = config.printer_device_type;
+ lpt_type = config.printer_type;
reset_printer();
- //stat_romrammode = true;
- // IF BASIC BOOT THEN ROM
- // ELSE RAM
- //mainmem->write_signal(FM7_MAINIO_PUSH_FD0F, ((config.boot_mode & 3) == 0) ? 0xffffffff : 0, 0xffffffff);
#if defined(_FM77AV_VARIANTS)
sub_monitor_type = 0x00;
#endif
- switch(config.cpu_type){
- case 0:
- clock_fast = true;
- break;
- case 1:
- clock_fast = false;
- break;
+ if(config.cpu_type == 0) {
+ clock_fast = true;
+ } else {
+ clock_fast = false;
}
this->write_signals(&clock_status, clock_fast ? 0xffffffff : 0);
intstat_txrdy = false;
irqstat_timer = false;
irqstat_printer = false;
- //irqstat_keyboard = false;
+ irqstat_keyboard = false;
irqreq_syndet = false;
irqreq_rxrdy = false;
irqreq_txrdy = false;
irqreq_printer = false;
- //irqreq_keyboard = false;
+ irqreq_keyboard = false;
// FD00
- drec->write_signal(SIG_DATAREC_MIC, 0x00, 0x01);
- drec->write_signal(SIG_DATAREC_REMOTE, 0x00, 0x02);
+ if(drec != NULL) {
+ drec->write_signal(SIG_DATAREC_MIC, 0x00, 0x01);
+ drec->write_signal(SIG_DATAREC_REMOTE, 0x00, 0x02);
+ }
reset_fdc();
reset_sound();
stat_fdmode_2hd = false; // R/W : bit6, '0' = 2HD, '1' = 2DD. FM-77 Only.
stat_kanjirom = true; // R/W : bit5, '0' = sub, '1' = main. FM-77 Only.
#endif
- maincpu->write_signal(SIG_CPU_FIRQ, 0, 1);
+ write_signals(&firq_bus, 0);
+
#if defined(HAS_DMA)
intstat_dma = false;
dma_addr = 0;
#endif
#if defined(_FM77AV_VARIANTS)
- reg_fd12 = 0x00;
-#endif
+ reg_fd12 = 0xbc; // 0b10111100
+#endif
+#if defined(WITH_Z80)
+ if(z80 != NULL) z80->write_signal(SIG_CPU_BUSREQ, 0xffffffff, 0xffffffff);
+#endif
+ maincpu->write_signal(SIG_CPU_BUSREQ, 0, 0xffffffff);
+ maincpu->write_signal(SIG_CPU_HALTREQ, 0, 0xffffffff);
+
+
#if !defined(_FM8)
register_event(this, EVENT_TIMERIRQ_ON, 10000.0 / 4.9152, true, &event_timerirq); // TIMER IRQ
-#endif
+#endif
+ bootmode = config.boot_mode & 3;
memset(io_w_latch, 0xff, 0x100);
}
void FM7_MAINIO::reset_printer()
{
- lpt_slctin = true;
+ lpt_slctin = false;
lpt_strobe = false;
+ // FD01
+ lpt_outdata = 0x00;
this->write_signals(&printer_strobe_bus, 0);
this->write_signals(&printer_select_bus, 0xffffffff);
this->write_signals(&printer_reset_bus, 0xffffffff);
if(lpt_type == 0) {
printer->write_signal(SIG_PRINTER_STROBE, 0x00, 0xff);
}
+ lpt_busy = false;
+ lpt_error_inv = true;
+ lpt_ackng_inv = true;
+ lpt_pe = false;
+
}
-void FM7_MAINIO::set_clockmode(uint8 flags)
+void FM7_MAINIO::set_clockmode(uint8_t flags)
{
bool f = clock_fast;
if((flags & FM7_MAINCLOCK_SLOW) != 0) {
}
if(f != clock_fast) {
this->write_signal(FM7_MAINIO_CLOCKMODE, clock_fast ? 1 : 0, 1);
- //mainmem->write_signal(FM7_MAINIO_CLOCKMODE, clock_fast ? 1 : 0, 1);
}
}
-uint8 FM7_MAINIO::get_clockmode(void)
+uint8_t FM7_MAINIO::get_clockmode(void)
{
if(!clock_fast) return FM7_MAINCLOCK_SLOW;
return FM7_MAINCLOCK_HIGH;
}
-uint8 FM7_MAINIO::get_port_fd00(void)
+uint8_t FM7_MAINIO::get_port_fd00(void)
{
- uint8 ret = 0x7e; //0b01111110;
+ uint8_t ret = 0x7e; //0b01111110;
#if defined(_FM8)
ret = 0xfe;
#else
return ret;
}
-void FM7_MAINIO::set_port_fd00(uint8 data)
+void FM7_MAINIO::set_port_fd00(uint8_t data)
{
- drec->write_signal(SIG_DATAREC_MIC, data, 0x01);
- drec->write_signal(SIG_DATAREC_REMOTE, data, 0x02);
- lpt_slctin = ((data & 0x80) == 0);
- lpt_strobe = ((data & 0x40) != 0);
- this->write_signals(&printer_strobe_bus, lpt_strobe ? 0xffffffff : 0);
- this->write_signals(&printer_select_bus, lpt_slctin ? 0xffffffff : 0);
- if((lpt_type == 0) && (lpt_slctin)) {
- printer->write_signal(SIG_PRINTER_STROBE, lpt_strobe ? 0xff : 0x00, 0xff);
- }
+ if(drec != NULL) {
+ drec->write_signal(SIG_DATAREC_MIC, data, 0x01);
+ drec->write_signal(SIG_DATAREC_REMOTE, data, 0x02);
+ }
+ lpt_slctin = ((data & 0x80) == 0);
+ lpt_strobe = ((data & 0x40) != 0);
+ this->write_signals(&printer_strobe_bus, lpt_strobe ? 0xffffffff : 0);
+ this->write_signals(&printer_select_bus, lpt_slctin ? 0xffffffff : 0);
+ if((lpt_type == 0) && (lpt_slctin)) {
+ printer->write_signal(SIG_PRINTER_STROBE, lpt_strobe ? 0xff : 0x00, 0xff);
+ }
}
-uint8 FM7_MAINIO::get_port_fd02(void)
+uint8_t FM7_MAINIO::get_port_fd02(void)
{
- uint8 ret;
+ uint8_t ret;
bool ack_bak = lpt_ackng_inv;
- // Still unimplemented printer.
+
ret = (cmt_indat) ? 0xff : 0x7f; // CMT
-
if(lpt_type == 0) {
lpt_busy = (printer->read_signal(SIG_PRINTER_BUSY) != 0);
lpt_error_inv = true;
return ret;
}
-void FM7_MAINIO::set_port_fd02(uint8 val)
+void FM7_MAINIO::set_port_fd02(uint8_t val)
{
#if !defined(_FM8)
irqmask_reg0 = val;
bool syndetirq_bak = irqmask_syndet;
- bool rxrdyirq_bak = irqmask_rxrdy;
- bool txrdyirq_bak = irqmask_txrdy;
+ //bool rxrdyirq_bak = irqmask_rxrdy;
+ //bool txrdyirq_bak = irqmask_txrdy;
bool keyirq_bak = irqmask_keyboard;
- bool timerirq_bak = irqmask_timer;
- bool printerirq_bak = irqmask_printer;
- bool mfdirq_bak = irqmask_mfd;
+ //bool timerirq_bak = irqmask_timer;
+ //bool printerirq_bak = irqmask_printer;
+ //bool mfdirq_bak = irqmask_mfd;
// if((val & 0b00010000) != 0) {
if((val & 0x80) != 0) {
} else {
irqmask_mfd = true;
}
-// if(mfdirq_bak != irqmask_mfd) {
-// set_irq_mfd(irqreq_fdc);
-// }
if((val & 0x04) != 0) {
irqmask_timer = false;
void FM7_MAINIO::set_irq_timer(bool flag)
{
#if !defined(_FM8)
- bool backup = irqstat_timer;
if(flag) {
irqstat_reg0 &= 0xfb; //~0x04;
irqstat_timer = true;
irqstat_reg0 |= 0x04;
irqstat_timer = false;
}
- //if(backup != irqstat_timer) do_irq();
do_irq();
#endif
}
void FM7_MAINIO::set_irq_printer(bool flag)
{
#if !defined(_FM8)
- uint8 backup = irqstat_reg0;
irqreq_printer = flag;
if(flag && !(irqmask_printer)) {
irqstat_reg0 &= ~0x02;
void FM7_MAINIO::set_irq_keyboard(bool flag)
{
- //uint8 backup = irqstat_reg0;
+ //uint8_t backup = irqstat_reg0;
//printf("MAIN: KEYBOARD: IRQ=%d MASK=%d\n", flag ,irqmask_keyboard);
irqreq_keyboard = flag;
if(flag && !irqmask_keyboard) {
void FM7_MAINIO::do_irq(void)
{
bool intstat;
+ uint32_t nval;
#if defined(_FM8)
intstat = intstat_txrdy | intstat_rxrdy | intstat_syndet;
#else
# if defined(HAS_DMA)
intstat = intstat | intstat_dma;
# endif
-#endif
- //printf("%08d : IRQ: REG0=%02x FDC=%02x, stat=%d\n", SDL_GetTicks(), irqstat_reg0, irqstat_fdc, intstat);
- if(intstat) {
- maincpu->write_signal(SIG_CPU_IRQ, 1, 1);
- } else {
- maincpu->write_signal(SIG_CPU_IRQ, 0, 1);
- }
+#endif
+ nval = (intstat) ? 0xffffffff : 0;
+ write_signals(&irq_bus, nval);
}
void FM7_MAINIO::do_firq(void)
{
bool firq_stat;
+ uint32_t nval;
firq_stat = firq_break_key | firq_sub_attention;
- if(firq_stat) {
- maincpu->write_signal(SIG_CPU_FIRQ, 1, 1);
- } else {
- maincpu->write_signal(SIG_CPU_FIRQ, 0, 1);
- }
- p_emu->out_debug_log(_T("IO: do_firq(). BREAK=%d ATTN=%d"), firq_break_key ? 1 : 0, firq_sub_attention ? 1 : 0);
-
+ nval = (firq_stat) ? 0xffffffff : 0;
+ write_signals(&firq_bus, nval);
}
void FM7_MAINIO::do_nmi(bool flag)
{
- maincpu->write_signal(SIG_CPU_NMI, flag ? 1 : 0, 1);
+ write_signals(&nmi_bus, (flag) ? 0xffffffff : 0);
}
}
-uint8 FM7_MAINIO::get_fd04(void)
+uint8_t FM7_MAINIO::get_fd04(void)
{
- uint8 val = 0x00;
+ uint8_t val = 0x00;
+ bool f;
if(display->read_signal(SIG_DISPLAY_BUSY) != 0) val |= 0x80;
- if(!firq_break_key) val |= 0x02;
+
+ //f = keyboard->read_signal(SIG_FM7KEY_BREAK_KEY);
+ f = firq_break_key;
+ if(!f) val |= 0x02;
if(!firq_sub_attention) {
val |= 0x01;
}
return val;
}
-void FM7_MAINIO::set_fd04(uint8 val)
+void FM7_MAINIO::set_fd04(uint8_t val)
{
// NOOP?
#if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)
}
// FD05
- uint8 FM7_MAINIO::get_fd05(void)
+ uint8_t FM7_MAINIO::get_fd05(void)
{
- uint8 val = 0x7e;
- //val = (sub_busy) ? 0xfe : 0x7e;
+ uint8_t val = 0x7e;
if(display->read_signal(SIG_DISPLAY_BUSY) != 0) val |= 0x80;
if(!extdet_neg) val |= 0x01;
- //printf("FD05: READ: %d VAL=%02x\n", SDL_GetTicks(), val);
return val;
}
- void FM7_MAINIO::set_fd05(uint8 val)
+ void FM7_MAINIO::set_fd05(uint8_t val)
{
sub_cancel = ((val & 0x40) != 0) ? true : false;
sub_halt = ((val & 0x80) != 0) ? true : false;
sub_cancel_bak = sub_cancel;
#ifdef WITH_Z80
if((val & 0x01) != 0) {
- maincpu->write_signal(SIG_CPU_BUSREQ, 1, 1);
- z80->write_signal(SIG_CPU_BUSREQ, 0, 1);
+ maincpu->write_signal(SIG_CPU_HALTREQ, 1, 1);
+ req_z80run = true;
} else {
- maincpu->write_signal(SIG_CPU_BUSREQ, 0, 1);
- z80->write_signal(SIG_CPU_BUSREQ, 1, 1);
+ req_z80run = false;
+ if(z80 != NULL) z80->write_signal(SIG_CPU_BUSREQ, 1, 1);
}
#endif
}
if((config.dipswitch & FM7_DIPSW_FM8_PROTECT_FD0F) != 0) {
return;
}
- config.boot_mode = 1; // DOS : Where BUBBLE?
- mainmem->write_signal(FM7_MAINIO_BOOTMODE, config.boot_mode, 0xffffffff);
+ bootmode = 1; // DOS : Where BUBBLE?
+ mainmem->write_signal(FM7_MAINIO_BOOTMODE, bootmode, 0xffffffff);
mainmem->write_signal(FM7_MAINIO_IS_BASICROM, 0, 0xffffffff);
#endif
mainmem->write_signal(FM7_MAINIO_PUSH_FD0F, 0, 0xffffffff);
}
-uint8 FM7_MAINIO::read_fd0f(void)
+uint8_t FM7_MAINIO::read_fd0f(void)
{
#if defined(_FM8)
if((config.dipswitch & FM7_DIPSW_FM8_PROTECT_FD0F) != 0) {
return 0xff;
}
- config.boot_mode = 0; // BASIC
- mainmem->write_signal(FM7_MAINIO_BOOTMODE, config.boot_mode, 0xffffffff);
+ bootmode = 0; // BASIC
+ mainmem->write_signal(FM7_MAINIO_BOOTMODE, bootmode, 0xffffffff);
mainmem->write_signal(FM7_MAINIO_IS_BASICROM, 0xffffffff, 0xffffffff);
#endif
mainmem->write_signal(FM7_MAINIO_PUSH_FD0F, 0xffffffff, 0xffffffff);
// Kanji ROM, FD20 AND FD21 (or SUBSYSTEM)
-void FM7_MAINIO::write_kanjiaddr_hi(uint8 addr)
+void FM7_MAINIO::write_kanjiaddr_hi(uint8_t addr)
{
if(!connect_kanjiroml1) return;
#if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX) || \
return;
}
-void FM7_MAINIO::write_kanjiaddr_lo(uint8 addr)
+void FM7_MAINIO::write_kanjiaddr_lo(uint8_t addr)
{
if(!connect_kanjiroml1) return;
#if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX) || \
return;
}
-uint8 FM7_MAINIO::read_kanjidata_left(void)
+uint8_t FM7_MAINIO::read_kanjidata_left(void)
{
if(!connect_kanjiroml1) return 0xff;
#if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX) || \
}
}
-uint8 FM7_MAINIO::read_kanjidata_right(void)
+uint8_t FM7_MAINIO::read_kanjidata_right(void)
{
if(!connect_kanjiroml1) return 0xff;
#if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX) || \
#ifdef CAPABLE_KANJI_CLASS2
// Kanji ROM, FD20 AND FD21 (or SUBSYSTEM)
-void FM7_MAINIO::write_kanjiaddr_hi_l2(uint8 addr)
+void FM7_MAINIO::write_kanjiaddr_hi_l2(uint8_t addr)
{
if(!connect_kanjiroml2) return;
if(!stat_kanjirom) return;
return;
}
-void FM7_MAINIO::write_kanjiaddr_lo_l2(uint8 addr)
+void FM7_MAINIO::write_kanjiaddr_lo_l2(uint8_t addr)
{
if(!connect_kanjiroml2) return;
if(!stat_kanjirom) return;
return;
}
-uint8 FM7_MAINIO::read_kanjidata_left_l2(void)
+uint8_t FM7_MAINIO::read_kanjidata_left_l2(void)
{
if(!connect_kanjiroml2) return 0xff;
if(!stat_kanjirom) return 0xff;
}
}
-uint8 FM7_MAINIO::read_kanjidata_right_l2(void)
+uint8_t FM7_MAINIO::read_kanjidata_right_l2(void)
{
if(!connect_kanjiroml2) return 0xff;
if(!stat_kanjirom) return 0xff;
#endif
-uint32 FM7_MAINIO::read_signal(int id)
+uint32_t FM7_MAINIO::read_signal(int id)
{
- uint32 retval;
+ uint32_t retval;
switch(id) {
case FM7_MAINIO_KEYBOARDIRQ_MASK:
retval = (irqmask_keyboard) ? 0xffffffff : 0x00000000;
}
-void FM7_MAINIO::write_signal(int id, uint32 data, uint32 mask)
+void FM7_MAINIO::write_signal(int id, uint32_t data, uint32_t mask)
{
bool val_b;
val_b = ((data & mask) != 0);
break;
case FM7_MAINIO_PSG_IRQ:
break;
+#if defined(WITH_Z80)
+ case FM7_MAINIO_RUN_Z80:
+ if((req_z80run)/* && (val_b) */) {
+ if(z80 != NULL) z80->write_signal(SIG_CPU_BUSREQ, 0, 1);
+ z80_run = true;
+ //z80->reset(); // OK?
+ }
+ break;
+ case FM7_MAINIO_RUN_6809:
+ if(!(req_z80run) /* && (val_b) */ && (z80_run)) {
+ z80_run = false;
+ // Wait dead cycle?
+ maincpu->write_signal(SIG_CPU_HALTREQ, 0, 1);
+ }
+ break;
+#endif
#if !defined(_FM8)
case FM7_MAINIO_OPN_IRQ:
if(!connect_opn) break;
}
- uint8 FM7_MAINIO::get_irqstat_fd03(void)
+ uint8_t FM7_MAINIO::get_irqstat_fd03(void)
{
- uint8 val;
+ uint8_t val;
bool extirq;
#if !defined(_FM8)
extirq = irqstat_fdc | intstat_opn | intstat_whg | intstat_thg;
irqstat_printer = false;
irqstat_reg0 |= 0x06;
do_irq();
- //p_emu->out_debug_log(_T("IO: Check IRQ Status."));
+ //this->out_debug_log(_T("IO: Check IRQ Status."));
return val;
#else
return 0xff;
#endif
}
-uint8 FM7_MAINIO::get_extirq_fd17(void)
+uint8_t FM7_MAINIO::get_extirq_fd17(void)
{
- uint8 val = 0xff;
+ uint8_t val = 0xff;
#if !defined(_FM8)
if(intstat_opn && connect_opn) val &= ~0x08;
if(intstat_mouse) val &= ~0x04;
return val;
}
-void FM7_MAINIO::set_ext_fd17(uint8 data)
+void FM7_MAINIO::set_ext_fd17(uint8_t data)
{
#if !defined(_FM8)
if((data & 0x04) != 0) {
#if defined(_FM77AV_VARIANTS)
// FD12
-uint8 FM7_MAINIO::subsystem_read_status(void)
+uint8_t FM7_MAINIO::subsystem_read_status(void)
{
return reg_fd12;
}
#endif
-uint32 FM7_MAINIO::read_io8(uint32 addr)
+uint32_t FM7_MAINIO::read_io8(uint32_t addr)
{ // This is only for debug.
addr = addr & 0xfff;
if(addr < 0x100) {
return io_w_latch[addr];
} else if(addr < 0x500) {
- uint32 ofset = addr & 0xff;
+ uint32_t ofset = addr & 0xff;
uint opnbank = (addr - 0x100) >> 8;
return opn_regs[opnbank][ofset];
} else if(addr < 0x600) {
return 0xff;
}
-uint32 FM7_MAINIO::read_dma_io8(uint32 addr)
+uint32_t FM7_MAINIO::read_dma_io8(uint32_t addr)
{
return this->read_data8(addr & 0xff);
}
-uint32 FM7_MAINIO::read_dma_data8(uint32 addr)
+uint32_t FM7_MAINIO::read_dma_data8(uint32_t addr)
{
return this->read_data8(addr & 0xff);
}
-uint32 FM7_MAINIO::read_data8(uint32 addr)
+uint32_t FM7_MAINIO::read_data8(uint32_t addr)
{
- uint32 retval;
- uint32 mmr_segment;
+ uint32_t retval;
+ uint32_t mmr_segment;
if(addr < FM7_MAINIO_IS_BASICROM) {
addr = addr & 0xff;
retval = 0xff;
// if((addr >= 0x0006) && !(addr == 0x1f) && !(addr == 0x0b)) printf("MAINIO: READ: %08x \n", addr);
switch(addr) {
case 0x00: // FD00
- retval = (uint32) get_port_fd00();
+ retval = (uint32_t) get_port_fd00();
break;
case 0x01: // FD01
#if !defined(_FM8)
#endif
break;
case 0x02: // FD02
- retval = (uint32) get_port_fd02();
+ retval = (uint32_t) get_port_fd02();
break;
case 0x03: // FD03
#if !defined(_FM8)
- retval = (uint32) get_irqstat_fd03();
+ retval = (uint32_t) get_irqstat_fd03();
#endif
break;
case 0x04: // FD04
- retval = (uint32) get_fd04();
+ retval = (uint32_t) get_fd04();
break;
case 0x05: // FD05
- retval = (uint32) get_fd05();
+ retval = (uint32_t) get_fd05();
break;
case 0x06: // RS-232C
case 0x07:
break;
#endif
case 0x0e: // PSG DATA
- retval = (uint32) get_psg();
+ retval = (uint32_t) get_psg();
//printf("PSG DATA READ val=%02x\n", retval);
break;
case 0x0f: // FD0F
read_fd0f();
retval = 0xff;
break;
+#if defined(_FM8)
+ case 0x10:
+ case 0x11:
+ case 0x12:
+ case 0x13:
+ case 0x14:
+ case 0x15:
+ case 0x16:
+ case 0x17:
+ retval = bubble_casette[0]->read_data8(addr);
+ break;
+#else
#if defined(_FM77AV_VARIANTS)
case 0x12:
retval = subsystem_read_status();
//printf("OPN CMD READ \n");
break;
case 0x16: // OPN DATA
- retval = (uint32) get_opn(0);
+ retval = (uint32_t) get_opn(0);
break;
case 0x17:
- retval = (uint32) get_extirq_fd17();
+ retval = (uint32_t) get_extirq_fd17();
break;
+#endif
case 0x18: // FDC: STATUS
- retval = (uint32) get_fdc_stat();
+ retval = (uint32_t) get_fdc_stat();
//printf("FDC: READ STATUS %02x PC=%04x\n", retval, maincpu->get_pc());
break;
case 0x19: // FDC: Track
- retval = (uint32) get_fdc_track();
+ retval = (uint32_t) get_fdc_track();
//printf("FDC: READ TRACK REG %02x\n", retval);
break;
case 0x1a: // FDC: Sector
- retval = (uint32) get_fdc_sector();
+ retval = (uint32_t) get_fdc_sector();
//printf("FDC: READ SECTOR REG %02x\n", retval);
break;
case 0x1b: // FDC: Data
- retval = (uint32) get_fdc_data();
+ retval = (uint32_t) get_fdc_data();
break;
case 0x1c:
- retval = (uint32) get_fdc_fd1c();
+ retval = (uint32_t) get_fdc_fd1c();
//printf("FDC: READ HEAD REG %02x\n", retval);
break;
case 0x1d:
- retval = (uint32) get_fdc_motor();
+ retval = (uint32_t) get_fdc_motor();
//printf("FDC: READ MOTOR REG %02x\n", retval);
break;
case 0x1e:
- retval = (uint32) get_fdc_fd1e();
+ retval = (uint32_t) get_fdc_fd1e();
//printf("FDC: READ MOTOR REG %02x\n", retval);
break;
case 0x1f:
- retval = (uint32) fdc_getdrqirq();
+ retval = (uint32_t) fdc_getdrqirq();
break;
case 0x22: // Kanji ROM
- retval = (uint32) read_kanjidata_left();
+ retval = (uint32_t) read_kanjidata_left();
break;
case 0x23: // Kanji ROM
- retval = (uint32) read_kanjidata_right();
+ retval = (uint32_t) read_kanjidata_right();
+ break;
+#if defined(CAPABLE_JCOMMCARD)
+ case 0x28:
+ case 0x29:
+ case 0x2a:
+ case 0x2b:
+ if(jcommcard != NULL) {
+ retval = (uint32_t)(jcommcard->read_io8(addr));
+ } else {
+ retval = 0xff;
+ }
break;
+#endif
#if defined(CAPABLE_KANJI_CLASS2)
case 0x2e: // Kanji ROM Level2
- retval = (uint32) read_kanjidata_left_l2();
+ retval = (uint32_t) read_kanjidata_left_l2();
break;
case 0x2f: // Kanji ROM Level2
- retval = (uint32) read_kanjidata_right_l2();
+ retval = (uint32_t) read_kanjidata_right_l2();
break;
#endif
#if !defined(_FM8)
case 0x37: // Multi page
- //retval = (uint32)display->read_data8(DISPLAY_ADDR_MULTIPAGE);
+ //retval = (uint32_t)display->read_data8(DISPLAY_ADDR_MULTIPAGE);
break;
case 0x45: // WHG CMD
break;
case 0x46: // WHG DATA
- retval = (uint32) get_opn(1);
+ retval = (uint32_t) get_opn(1);
break;
case 0x47:
- retval = (uint32) get_extirq_whg();
+ retval = (uint32_t) get_extirq_whg();
break;
case 0x51: // THG CMD
break;
case 0x52: // THG DATA
- retval = (uint32) get_opn(2);
+ retval = (uint32_t) get_opn(2);
break;
case 0x53:
- retval = (uint32) get_extirq_thg();
+ retval = (uint32_t) get_extirq_thg();
break;
#endif
#if defined(HAS_MMR)
#if !defined(_FM8)
if((addr < 0x40) && (addr >= 0x38)) {
addr = (addr - 0x38) + FM7_SUBMEM_OFFSET_DPALETTE;
- return (uint32) display->read_data8(addr);
+ return (uint32_t) display->read_data8(addr);
}
#endif
// Another:
return retval;
} else if(addr == FM7_MAINIO_CLOCKMODE) {
- return (uint32)get_clockmode();
+ return (uint32_t)get_clockmode();
}
#if defined(_FM77AV_VARIANTS)
else if(addr == FM7_MAINIO_SUBMONITOR_ROM) {
return 0xff;
}
-void FM7_MAINIO::write_dma_io8(uint32 addr, uint32 data)
+void FM7_MAINIO::write_dma_io8(uint32_t addr, uint32_t data)
{
this->write_data8(addr & 0xff, data);
}
-void FM7_MAINIO::write_dma_data8(uint32 addr, uint32 data)
+void FM7_MAINIO::write_dma_data8(uint32_t addr, uint32_t data)
{
this->write_data8(addr & 0xff, data);
}
-void FM7_MAINIO::write_data8(uint32 addr, uint32 data)
+void FM7_MAINIO::write_data8(uint32_t addr, uint32_t data)
{
bool flag;
- uint32 mmr_segment;
+ uint32_t mmr_segment;
if(addr < FM7_MAINIO_IS_BASICROM) {
addr = addr & 0xff;
io_w_latch[addr] = data;
#endif
switch(addr) {
case 0x00: // FD00
- set_port_fd00((uint8)data);
+ set_port_fd00((uint8_t)data);
return;
break;
case 0x01: // FD01
+ lpt_outdata = (uint8_t)data;
switch(lpt_type) {
case 0: // Write to file
printer->write_signal(SIG_PRINTER_DATA, data, 0xff);
}
break;
case 0x02: // FD02
- set_port_fd02((uint8)data);
+ set_port_fd02((uint8_t)data);
break;
case 0x03: // FD03
set_beep(data);
set_fd04(data);
break;
case 0x05: // FD05
- set_fd05((uint8)data);
+ set_fd05((uint8_t)data);
break;
case 0x06: // RS-232C
case 0x07:
case 0x0f: // FD0F
write_fd0f();
break;
+#if defined(_FM8)
+ case 0x10:
+ case 0x11:
+ case 0x12:
+ case 0x13:
+ case 0x14:
+ case 0x15:
+ case 0x16:
+ case 0x17:
+ bubble_casette[0]->write_data8(addr, data);
+ break;
+#else
#if defined(_FM77AV_VARIANTS)
case 0x10:
flag = ((data & 0x02) == 0) ? true : false;
set_opn(0, data);
break;
case 0x17:
- set_ext_fd17((uint8)data);
+ set_ext_fd17((uint8_t)data);
break;
+#endif
case 0x18: // FDC: COMMAND
- set_fdc_cmd((uint8)data);
+ set_fdc_cmd((uint8_t)data);
//printf("FDC: WRITE CMD %02x\n", data);
break;
case 0x19: // FDC: Track
- set_fdc_track((uint8)data);
+ set_fdc_track((uint8_t)data);
//printf("FDC: WRITE TRACK REG %02x\n", data);
break;
case 0x1a: // FDC: Sector
- set_fdc_sector((uint8)data);
+ set_fdc_sector((uint8_t)data);
//printf("FDC: WRITE SECTOR REG %02x\n", data);
break;
case 0x1b: // FDC: Data
- set_fdc_data((uint8)data);
+ set_fdc_data((uint8_t)data);
break;
case 0x1c:
- set_fdc_fd1c((uint8)data);
+ set_fdc_fd1c((uint8_t)data);
//printf("FDC: WRITE HEAD REG %02x\n", data);
break;
case 0x1d:
- set_fdc_fd1d((uint8)data);
+ set_fdc_fd1d((uint8_t)data);
//printf("FDC: WRITE MOTOR REG %02x\n", data);
break;
case 0x1e:
- set_fdc_fd1e((uint8)data);
+ set_fdc_fd1e((uint8_t)data);
break;
case 0x1f: // ??
return;
break;
case 0x20: // Kanji ROM
- write_kanjiaddr_hi((uint8)data);
+ write_kanjiaddr_hi((uint8_t)data);
break;
case 0x2c: // Kanji ROM(DUP)
#if defined(CAPABLE_KANJI_CLASS2)
- write_kanjiaddr_hi_l2((uint8)data);
+ write_kanjiaddr_hi_l2((uint8_t)data);
#else
- //write_kanjiaddr_hi((uint8)data);
+ //write_kanjiaddr_hi((uint8_t)data);
#endif
break;
case 0x21: // Kanji ROM
- write_kanjiaddr_lo((uint8)data);
+ write_kanjiaddr_lo((uint8_t)data);
break;
case 0x2d: // Kanji ROM(DUP)
#if defined(CAPABLE_KANJI_CLASS2)
- write_kanjiaddr_lo_l2((uint8)data);
+ write_kanjiaddr_lo_l2((uint8_t)data);
#else
- //write_kanjiaddr_lo((uint8)data);
+ //write_kanjiaddr_lo((uint8_t)data);
#endif
break;
+#if defined(CAPABLE_JCOMMCARD)
+ case 0x28:
+ case 0x29:
+ case 0x2a:
+ case 0x2b:
+ if(jcommcard != NULL) jcommcard->write_io8(addr, data);
+ break;
+#endif
#if defined(CAPABLE_DICTROM)
case 0x2e: //
mainmem->write_signal(FM7_MAINIO_EXTBANK, data, 0xff);
// printf("MMR SEGMENT: %02x\n", data & 3);
mmr_segment = data & 3;
#endif
- mainmem->write_data8(FM7_MAINIO_MMR_SEGMENT, (uint32)mmr_segment);
+ mainmem->write_data8(FM7_MAINIO_MMR_SEGMENT, (uint32_t)mmr_segment);
break;
case 0x92:
- mainmem->write_data8(FM7_MAINIO_WINDOW_OFFSET, (uint32)(data & 0x00ff));
+ mainmem->write_data8(FM7_MAINIO_WINDOW_OFFSET, (uint32_t)(data & 0x00ff));
break;
case 0x93:
mainmem->write_signal(FM7_MAINIO_BOOTRAM_RW, data, 0x01);
break;
case 0x99:
dmac->write_data8(dma_addr, data);
- //p_emu->out_debug_log(_T("IO: Wrote DMA %02x to reg %02x\n"), data, dma_addr);
+ //this->out_debug_log(_T("IO: Wrote DMA %02x to reg %02x\n"), data, dma_addr);
break;
#endif
default:
#if !defined(_FM8)
if((addr < 0x40) && (addr >= 0x38)) {
addr = (addr - 0x38) | FM7_SUBMEM_OFFSET_DPALETTE;
- display->write_data8(addr, (uint8)data);
+ display->write_data8(addr, (uint8_t)data);
return;
}// Another:
#endif
return;
} else if(addr == FM7_MAINIO_CLOCKMODE) {
- set_clockmode((uint8)data);
+ set_clockmode((uint8_t)data);
return;
}
//if((addr >= 0x0006) && !(addr == 0x1f)) printf("MAINIO: WRITE: %08x DATA=%08x\n", addr, data);
mainmem->write_signal(FM7_MAINIO_IS_BASICROM, 0, 0xffffffff);
}
mainmem->write_signal(FM7_MAINIO_PUSH_FD0F, (config.boot_mode == 0) ? 1 : 0, 0x01);
- mainmem->write_signal(FM7_MAINIO_BOOTMODE, config.boot_mode, 0xffffffff);
-#endif
+ mainmem->write_signal(FM7_MAINIO_BOOTMODE, bootmode, 0xffffffff);
+#endif
}
void FM7_MAINIO::event_vline(int v, int clock)
{
}
-#define STATE_VERSION 5
+#define STATE_VERSION 7
void FM7_MAINIO::save_state(FILEIO *state_fio)
{
int ch;
int addr;
state_fio->FputUint32_BE(STATE_VERSION);
state_fio->FputInt32_BE(this_device_id);
+ this->out_debug_log(_T("Save State: MAINIO: id=%d ver=%d\n"), this_device_id, STATE_VERSION);
// Version 1
{
state_fio->FputBool(irqreq_syndet);
state_fio->FputBool(irqreq_rxrdy);
state_fio->FputBool(irqreq_txrdy);
- state_fio->FputBool(irqreq_fdc);
state_fio->FputBool(irqreq_printer);
state_fio->FputBool(irqreq_keyboard);
// FD03
state_fio->FputBool(intmode_fdc);
// FD05
state_fio->FputBool(extdet_neg);
- //state_fio->FputBool(sub_busy);
state_fio->FputBool(sub_halt);
- //state_fio->FputBool(sub_halt_bak);
state_fio->FputBool(sub_cancel);
- //state_fio->FputBool(sub_cancel_bak);
-#if defined(WITH_Z80)
- state_fio->FputBool(z80_sel);
-#endif
// FD06, 07
state_fio->FputBool(intstat_syndet);
state_fio->FputBool(intstat_rxrdy);
#if defined(_FM77AV_VARIANTS)
state_fio->FputUint8(reg_fd12);
#endif
- }
+ }
+ // FD05
+ state_fio->FputBool(req_z80run);
+ state_fio->FputBool(z80_run);
}
bool FM7_MAINIO::load_state(FILEIO *state_fio)
int ch;
int addr;
//bool stat = false;
- uint32 version;
+ uint32_t version;
version = state_fio->FgetUint32_BE();
if(this_device_id != state_fio->FgetInt32_BE()) return false;
+ this->out_debug_log(_T("Load State: MAINIO: id=%d ver=%d\n"), this_device_id, version);
if(version >= 1) {
for(addr = 0; addr < 0x100; addr++) io_w_latch[addr] = state_fio->FgetUint8();
irqreq_syndet = state_fio->FgetBool();
irqreq_rxrdy = state_fio->FgetBool();
irqreq_txrdy = state_fio->FgetBool();
- irqreq_fdc = state_fio->FgetBool();
irqreq_printer = state_fio->FgetBool();
irqreq_keyboard = state_fio->FgetBool();
// FD03
intmode_fdc = state_fio->FgetBool();
// FD05
extdet_neg = state_fio->FgetBool();
- //sub_busy = state_fio->FgetBool();
sub_halt = state_fio->FgetBool();
- //sub_halt_bak = state_fio->FgetBool();
sub_cancel = state_fio->FgetBool();
- //sub_cancel_bak = state_fio->FgetBool();
-#if defined(WITH_Z80)
- z80_sel = state_fio->FgetBool();
-#endif
// FD06, 07
intstat_syndet = state_fio->FgetBool();
intstat_rxrdy = state_fio->FgetBool();
#endif
#if defined(HAS_DMA)
intstat_dma = state_fio->FgetBool();
- dma_addr = (uint32)(state_fio->FgetUint8() & 0x1f);
+ dma_addr = (uint32_t)(state_fio->FgetUint8() & 0x1f);
#endif
#if defined(_FM77AV_VARIANTS)
reg_fd12 = state_fio->FgetUint8();
#endif
- }
+ }
+ // FD05
+ req_z80run = state_fio->FgetBool();
+ z80_run = state_fio->FgetBool();
+
+ if(version != STATE_VERSION) return false;
return true;
}
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