[VM][FMTOWNS][CDROM] CDROM checks DMAC's mask as running DMAC CH.3.

[csp-qt/common_source_project-fm7.git] / source / src / vm / fmtowns / fmtowns.cpp

diff --git a/source/src/vm/fmtowns/fmtowns.cpp b/source/src/vm/fmtowns/fmtowns.cpp
index a49215c..99fec7d 100644 (file)
--- a/source/src/vm/fmtowns/fmtowns.cpp
+++ b/source/src/vm/fmtowns/fmtowns.cpp
@@ -34,6 +34,7 @@
 #include "../upd71071.h"
 
 #include "./cdrom.h"
+#include "./cmos.h"
 #include "./crtc.h"
 #include "./dictionary.h"
 #include "./dmac.h"
@@ -79,6 +80,7 @@
 // ----------------------------------------------------------------------------
 using FMTOWNS::ADPCM;
 //using FMTOWNS::CDC;
+using FMTOWNS::CMOS;
 using FMTOWNS::DICTIONARY;
 using FMTOWNS::FLOPPY;
 using FMTOWNS::FONT_ROMS;
@@ -163,6 +165,11 @@ VM::VM(EMU_TEMPLATE* parent_emu) : VM_TEMPLATE(parent_emu)
        msdosrom = new MSDOSROM(this, emu);
        fontrom = new FONT_ROMS(this, emu);
        dictionary = new DICTIONARY(this, emu);
+       cmos     = new CMOS(this, emu);
+#ifdef USE_DEBUGGER
+       cmos->set_context_debugger(new DEBUGGER(this, emu));
+#endif
+
 #if defined(HAS_20PIX_FONTS)
        fontrom_20pix = new FONT_ROM_20PIX(this, emu);
 #endif
@@ -355,16 +362,20 @@ VM::VM(EMU_TEMPLATE* parent_emu) : VM_TEMPLATE(parent_emu)
        dma->set_context_cpu(NULL);
        //dma->set_context_cpu(cpu);
        dma->set_context_memory(memory);
+       // BASE CLOCK is 1MHz * 4.
+       dma->set_dmac_clock(4 * 1000 * 1000, 4);
        dma->set_context_ch0(fdc);
        // This is workaround for FM-Towns's SCSI.
        dma->set_force_16bit_transfer(1, false);
        dma->set_context_ch1(scsi_host);
        //dma->set_context_ch2(printer);
        dma->set_context_ch3(cdrom);
-
+       dma->set_context_mask_bit(cdrom, SIG_TOWNS_CDROM_DMAMASK, 3);
        //extra_dma->set_context_cpu(cpu);
        extra_dma->set_context_cpu(NULL);
        extra_dma->set_context_memory(memory);
+       // BASE CLOCK is 1MHz * 4.
+       extra_dma->set_dmac_clock(4 * 1000 * 1000, 4);
 
        //dma->set_context_tc1(scsi, SIG_SCSI_EOT, 0xffffffff);
        dma->set_context_tc3(cdrom, SIG_TOWNS_CDROM_DMAINT, 0xffffffff);
@@ -416,11 +427,12 @@ VM::VM(EMU_TEMPLATE* parent_emu) : VM_TEMPLATE(parent_emu)
        memory->set_context_system_rom(sysrom);
        memory->set_context_msdos(msdosrom);
        memory->set_context_dictionary(dictionary);
+       memory->set_context_cmos(cmos);
        memory->set_context_font_rom(fontrom);
        memory->set_context_timer(timer);
        memory->set_context_serial_rom(serialrom);
        memory->set_context_sprite(sprite);
-       memory->set_context_pcm(rf5c68);
+       memory->set_context_pcm(adpcm);
        memory->set_context_iccard(iccard1, 0);
        memory->set_context_iccard(iccard2, 1);
 
@@ -517,6 +529,8 @@ VM::VM(EMU_TEMPLATE* parent_emu) : VM_TEMPLATE(parent_emu)
        // IRQ15 : RESERVED.
        cdrom->set_context_mpuint_line(pic, SIG_I8259_CHIP1 | SIG_I8259_IR1, 0xffffffff);
        crtc->set_context_vsync(pic, SIG_I8259_CHIP1 | SIG_I8259_IR3, 0xffffffff);
+       crtc->set_context_vsync(sprite, SIG_TOWNS_SPRITE_VSYNC, 0xffffffff);
+
        adpcm->set_context_intr_line(pic, SIG_I8259_CHIP1 | SIG_I8259_IR5, 0xffffffff);
 
        // DMA0  : FDC/DRQ
@@ -539,7 +553,7 @@ VM::VM(EMU_TEMPLATE* parent_emu) : VM_TEMPLATE(parent_emu)
        cdrom->set_context_dmac(dma);
        // For Debugging, will remove 20200822 K.O
        cdrom->set_context_cpu(cpu);
-       cdrom->set_context_eot_line(dma, SIG_TOWNS_DMAC_EOT_CH3, 0xffffffff);
+       //cdrom->set_context_eot_line(dma, SIG_TOWNS_DMAC_EOT_CH3, 0xffffffff);
 
        // i/o bus
        io->set_iowait_range_rw(0x0000, 0xffff, 6); // ToDo: May variable wait.
@@ -604,8 +618,8 @@ VM::VM(EMU_TEMPLATE* parent_emu) : VM_TEMPLATE(parent_emu)
        io->set_iomap_single_r (0x044c, crtc); // DIGITAL PALLETTE STATUS, SPRITE STATUS
 
 
-       io->set_iomap_single_rw(0x0450, sprite); // SPRITE
-       io->set_iomap_single_rw(0x0452, sprite); // SPRITE
+       io->set_iomap_alias_rw(0x0450, sprite, 0); // SPRITE
+       io->set_iomap_alias_rw(0x0452, sprite, 2); // SPRITE
 
        io->set_iomap_single_rw(0x0458, vram);         // VRAM ACCESS CONTROLLER (ADDRESS)
        io->set_iomap_range_rw (0x045a, 0x045b, vram); // VRAM ACCESS CONTROLLER (DATA)
@@ -654,8 +668,7 @@ VM::VM(EMU_TEMPLATE* parent_emu) : VM_TEMPLATE(parent_emu)
        io->set_iomap_single_rw(0x04ea, adpcm); // PCM INTERRUPT MASK
        io->set_iomap_single_r (0x04eb, adpcm); // PCM INTERRUPT STATUS
        io->set_iomap_single_w (0x04ec, adpcm); // PCM LED/MUTE
-
-       io->set_iomap_range_w (0x04f0, 0x04f8, rf5c68); // PCM CONTROL REGS (WO?)
+       io->set_iomap_range_w (0x04f0, 0x04f8, adpcm); // PCM CONTROL REGS (WO?)
 
        //io->set_iomap_single_rw(0x510, newpcm); // PCM BANK (after MX)
        //io->set_iomap_single_rw(0x511, newpcm); // PCM DMA STATUS(after MX)
@@ -671,7 +684,7 @@ VM::VM(EMU_TEMPLATE* parent_emu) : VM_TEMPLATE(parent_emu)
 
        io->set_iomap_single_rw(0x05c0, memory); // NMI MASK
        io->set_iomap_single_r (0x05c2, memory);  // NMI STATUS
-       io->set_iomap_single_r (0x05c8, sprite); // TVRAM EMULATION
+       io->set_iomap_alias_r  (0x05c8, sprite, 8); // TVRAM EMULATION
        io->set_iomap_single_w (0x05ca, crtc); // VSYNC INTERRUPT
 
        io->set_iomap_single_rw(0x05e0, memory); // Hidden MEMORY WAIT REGISTER from AB.COM (Towns 1/2)
@@ -708,7 +721,7 @@ VM::VM(EMU_TEMPLATE* parent_emu) : VM_TEMPLATE(parent_emu)
        // ToDo: Implement debugging I/Os to 2000h - 2FFFh.
 
        for(uint32_t addr = 0x3000; addr < 0x4000; addr += 2) {
-               io->set_iomap_single_rw (addr, dictionary); // CMOS
+               io->set_iomap_single_rw (addr, cmos); // CMOS
        }
        io->set_iomap_range_rw (0xfd90, 0xfd91, crtc);  // PALETTE INDEX
        io->set_iomap_range_rw (0xfd92, 0xfd93, crtc);  // PALETTE DATA BLUE
@@ -720,7 +733,7 @@ VM::VM(EMU_TEMPLATE* parent_emu) : VM_TEMPLATE(parent_emu)
        io->set_iomap_single_r (0xfda2, crtc);  // CRTC OUT (after UG)
        io->set_iomap_single_rw(0xfda4, memory);        // CRTC: READ COMPATIBLE (after UG)
 
-       io->set_iomap_range_rw (0xff80, 0xff83, planevram);     // MMIO
+       io->set_iomap_range_rw (0xff81, 0xff83, planevram);     // MMIO changed from Tsugaru.
        io->set_iomap_single_r (0xff84, planevram);     // MMIO
        io->set_iomap_single_r (0xff86, planevram);     // MMIO
        io->set_iomap_single_rw(0xff88, memory);        // MMIO