} RM;
} Mod_RM;
-static const uint8 parity_table[256] = {
+static const uint8_t parity_table[256] = {
1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
/************************************************************************/
struct i80x86_timing {
- uint8 exception, iret; /* exception, IRET */
- uint8 int3, int_imm, into_nt, into_t; /* INTs */
- uint8 override; /* segment overrides */
- uint8 flag_ops, lahf, sahf; /* flag operations */
- uint8 aaa, aas, aam, aad; /* arithmetic adjusts */
- uint8 daa, das; /* decimal adjusts */
- uint8 cbw, cwd; /* sign extension */
- uint8 hlt, load_ptr, lea, nop, wait, xlat; /* misc */
-
- uint8 jmp_short, jmp_near, jmp_far; /* direct JMPs */
- uint8 jmp_r16, jmp_m16, jmp_m32; /* indirect JMPs */
- uint8 call_near, call_far; /* direct CALLs */
- uint8 call_r16, call_m16, call_m32; /* indirect CALLs */
- uint8 ret_near, ret_far, ret_near_imm, ret_far_imm; /* returns */
- uint8 jcc_nt, jcc_t, jcxz_nt, jcxz_t; /* conditional JMPs */
- uint8 loop_nt, loop_t, loope_nt, loope_t; /* loops */
-
- uint8 in_imm8, in_imm16, in_dx8, in_dx16; /* port reads */
- uint8 out_imm8, out_imm16, out_dx8, out_dx16; /* port writes */
-
- uint8 mov_rr8, mov_rm8, mov_mr8; /* move, 8-bit */
- uint8 mov_ri8, mov_mi8; /* move, 8-bit immediate */
- uint8 mov_rr16, mov_rm16, mov_mr16; /* move, 16-bit */
- uint8 mov_ri16, mov_mi16; /* move, 16-bit immediate */
- uint8 mov_am8, mov_am16, mov_ma8, mov_ma16; /* move, AL/AX memory */
- uint8 mov_sr, mov_sm, mov_rs, mov_ms; /* move, segment registers */
- uint8 xchg_rr8, xchg_rm8; /* exchange, 8-bit */
- uint8 xchg_rr16, xchg_rm16, xchg_ar16; /* exchange, 16-bit */
-
- uint8 push_r16, push_m16, push_seg, pushf; /* pushes */
- uint8 pop_r16, pop_m16, pop_seg, popf; /* pops */
-
- uint8 alu_rr8, alu_rm8, alu_mr8; /* ALU ops, 8-bit */
- uint8 alu_ri8, alu_mi8, alu_mi8_ro; /* ALU ops, 8-bit immediate */
- uint8 alu_rr16, alu_rm16, alu_mr16; /* ALU ops, 16-bit */
- uint8 alu_ri16, alu_mi16, alu_mi16_ro; /* ALU ops, 16-bit immediate */
- uint8 alu_r16i8, alu_m16i8, alu_m16i8_ro; /* ALU ops, 16-bit w/8-bit immediate */
- uint8 mul_r8, mul_r16, mul_m8, mul_m16; /* MUL */
- uint8 imul_r8, imul_r16, imul_m8, imul_m16; /* IMUL */
- uint8 div_r8, div_r16, div_m8, div_m16; /* DIV */
- uint8 idiv_r8, idiv_r16, idiv_m8, idiv_m16; /* IDIV */
- uint8 incdec_r8, incdec_r16, incdec_m8, incdec_m16; /* INC/DEC */
- uint8 negnot_r8, negnot_r16, negnot_m8, negnot_m16; /* NEG/NOT */
-
- uint8 rot_reg_1, rot_reg_base, rot_reg_bit; /* reg shift/rotate */
- uint8 rot_m8_1, rot_m8_base, rot_m8_bit; /* m8 shift/rotate */
- uint8 rot_m16_1, rot_m16_base, rot_m16_bit; /* m16 shift/rotate */
-
- uint8 cmps8, rep_cmps8_base, rep_cmps8_count; /* CMPS 8-bit */
- uint8 cmps16, rep_cmps16_base, rep_cmps16_count; /* CMPS 16-bit */
- uint8 scas8, rep_scas8_base, rep_scas8_count; /* SCAS 8-bit */
- uint8 scas16, rep_scas16_base, rep_scas16_count; /* SCAS 16-bit */
- uint8 lods8, rep_lods8_base, rep_lods8_count; /* LODS 8-bit */
- uint8 lods16, rep_lods16_base, rep_lods16_count; /* LODS 16-bit */
- uint8 stos8, rep_stos8_base, rep_stos8_count; /* STOS 8-bit */
- uint8 stos16, rep_stos16_base, rep_stos16_count; /* STOS 16-bit */
- uint8 movs8, rep_movs8_base, rep_movs8_count; /* MOVS 8-bit */
- uint8 movs16, rep_movs16_base, rep_movs16_count; /* MOVS 16-bit */
-
- uint8 ins8, rep_ins8_base, rep_ins8_count; /* (80186) INS 8-bit */
- uint8 ins16, rep_ins16_base, rep_ins16_count; /* (80186) INS 16-bit */
- uint8 outs8, rep_outs8_base, rep_outs8_count; /* (80186) OUTS 8-bit */
- uint8 outs16, rep_outs16_base, rep_outs16_count; /* (80186) OUTS 16-bit */
- uint8 push_imm, pusha, popa; /* (80186) PUSH immediate, PUSHA/POPA */
- uint8 imul_rri8, imul_rmi8; /* (80186) IMUL immediate 8-bit */
- uint8 imul_rri16, imul_rmi16; /* (80186) IMUL immediate 16-bit */
- uint8 enter0, enter1, enter_base, enter_count, leave; /* (80186) ENTER/LEAVE */
- uint8 bound; /* (80186) BOUND */
+ uint8_t exception, iret; /* exception, IRET */
+ uint8_t int3, int_imm, into_nt, into_t; /* INTs */
+ uint8_t override; /* segment overrides */
+ uint8_t flag_ops, lahf, sahf; /* flag operations */
+ uint8_t aaa, aas, aam, aad; /* arithmetic adjusts */
+ uint8_t daa, das; /* decimal adjusts */
+ uint8_t cbw, cwd; /* sign extension */
+ uint8_t hlt, load_ptr, lea, nop, wait, xlat; /* misc */
+
+ uint8_t jmp_short, jmp_near, jmp_far; /* direct JMPs */
+ uint8_t jmp_r16, jmp_m16, jmp_m32; /* indirect JMPs */
+ uint8_t call_near, call_far; /* direct CALLs */
+ uint8_t call_r16, call_m16, call_m32; /* indirect CALLs */
+ uint8_t ret_near, ret_far, ret_near_imm, ret_far_imm; /* returns */
+ uint8_t jcc_nt, jcc_t, jcxz_nt, jcxz_t; /* conditional JMPs */
+ uint8_t loop_nt, loop_t, loope_nt, loope_t; /* loops */
+
+ uint8_t in_imm8, in_imm16, in_dx8, in_dx16; /* port reads */
+ uint8_t out_imm8, out_imm16, out_dx8, out_dx16; /* port writes */
+
+ uint8_t mov_rr8, mov_rm8, mov_mr8; /* move, 8-bit */
+ uint8_t mov_ri8, mov_mi8; /* move, 8-bit immediate */
+ uint8_t mov_rr16, mov_rm16, mov_mr16; /* move, 16-bit */
+ uint8_t mov_ri16, mov_mi16; /* move, 16-bit immediate */
+ uint8_t mov_am8, mov_am16, mov_ma8, mov_ma16; /* move, AL/AX memory */
+ uint8_t mov_sr, mov_sm, mov_rs, mov_ms; /* move, segment registers */
+ uint8_t xchg_rr8, xchg_rm8; /* exchange, 8-bit */
+ uint8_t xchg_rr16, xchg_rm16, xchg_ar16; /* exchange, 16-bit */
+
+ uint8_t push_r16, push_m16, push_seg, pushf; /* pushes */
+ uint8_t pop_r16, pop_m16, pop_seg, popf; /* pops */
+
+ uint8_t alu_rr8, alu_rm8, alu_mr8; /* ALU ops, 8-bit */
+ uint8_t alu_ri8, alu_mi8, alu_mi8_ro; /* ALU ops, 8-bit immediate */
+ uint8_t alu_rr16, alu_rm16, alu_mr16; /* ALU ops, 16-bit */
+ uint8_t alu_ri16, alu_mi16, alu_mi16_ro; /* ALU ops, 16-bit immediate */
+ uint8_t alu_r16i8, alu_m16i8, alu_m16i8_ro; /* ALU ops, 16-bit w/8-bit immediate */
+ uint8_t mul_r8, mul_r16, mul_m8, mul_m16; /* MUL */
+ uint8_t imul_r8, imul_r16, imul_m8, imul_m16; /* IMUL */
+ uint8_t div_r8, div_r16, div_m8, div_m16; /* DIV */
+ uint8_t idiv_r8, idiv_r16, idiv_m8, idiv_m16; /* IDIV */
+ uint8_t incdec_r8, incdec_r16, incdec_m8, incdec_m16; /* INC/DEC */
+ uint8_t negnot_r8, negnot_r16, negnot_m8, negnot_m16; /* NEG/NOT */
+
+ uint8_t rot_reg_1, rot_reg_base, rot_reg_bit; /* reg shift/rotate */
+ uint8_t rot_m8_1, rot_m8_base, rot_m8_bit; /* m8 shift/rotate */
+ uint8_t rot_m16_1, rot_m16_base, rot_m16_bit; /* m16 shift/rotate */
+
+ uint8_t cmps8, rep_cmps8_base, rep_cmps8_count; /* CMPS 8-bit */
+ uint8_t cmps16, rep_cmps16_base, rep_cmps16_count; /* CMPS 16-bit */
+ uint8_t scas8, rep_scas8_base, rep_scas8_count; /* SCAS 8-bit */
+ uint8_t scas16, rep_scas16_base, rep_scas16_count; /* SCAS 16-bit */
+ uint8_t lods8, rep_lods8_base, rep_lods8_count; /* LODS 8-bit */
+ uint8_t lods16, rep_lods16_base, rep_lods16_count; /* LODS 16-bit */
+ uint8_t stos8, rep_stos8_base, rep_stos8_count; /* STOS 8-bit */
+ uint8_t stos16, rep_stos16_base, rep_stos16_count; /* STOS 16-bit */
+ uint8_t movs8, rep_movs8_base, rep_movs8_count; /* MOVS 8-bit */
+ uint8_t movs16, rep_movs16_base, rep_movs16_count; /* MOVS 16-bit */
+
+ uint8_t ins8, rep_ins8_base, rep_ins8_count; /* (80186) INS 8-bit */
+ uint8_t ins16, rep_ins16_base, rep_ins16_count; /* (80186) INS 16-bit */
+ uint8_t outs8, rep_outs8_base, rep_outs8_count; /* (80186) OUTS 8-bit */
+ uint8_t outs16, rep_outs16_base, rep_outs16_count; /* (80186) OUTS 16-bit */
+ uint8_t push_imm, pusha, popa; /* (80186) PUSH immediate, PUSHA/POPA */
+ uint8_t imul_rri8, imul_rmi8; /* (80186) IMUL immediate 8-bit */
+ uint8_t imul_rri16, imul_rmi16; /* (80186) IMUL immediate 16-bit */
+ uint8_t enter0, enter1, enter_base, enter_count, leave; /* (80186) ENTER/LEAVE */
+ uint8_t bound; /* (80186) BOUND */
};
#if defined(HAS_I86)
#define SetZF(x) (ZeroVal = (x))
#define SetPF(x) (ParityVal = (x))
-#define SetSZPF_Byte(x) (ParityVal = SignVal = ZeroVal = (int8)(x))
-#define SetSZPF_Word(x) (ParityVal = SignVal = ZeroVal = (int16)(x))
+#define SetSZPF_Byte(x) (ParityVal = SignVal = ZeroVal = (int8_t)(x))
+#define SetSZPF_Word(x) (ParityVal = SignVal = ZeroVal = (int16_t)(x))
-#define ADDB(dst, src) { unsigned res = (dst) + (src); SetCFB(res); SetOFB_Add(res, src, dst); SetAF(res, src, dst); SetSZPF_Byte(res); dst = (uint8)res; }
-#define ADDW(dst, src) { unsigned res = (dst) + (src); SetCFW(res); SetOFW_Add(res, src, dst); SetAF(res, src, dst); SetSZPF_Word(res); dst = (uint16)res; }
+#define ADDB(dst, src) { unsigned res = (dst) + (src); SetCFB(res); SetOFB_Add(res, src, dst); SetAF(res, src, dst); SetSZPF_Byte(res); dst = (uint8_t)res; }
+#define ADDW(dst, src) { unsigned res = (dst) + (src); SetCFW(res); SetOFW_Add(res, src, dst); SetAF(res, src, dst); SetSZPF_Word(res); dst = (uint16_t)res; }
-#define SUBB(dst, src) { unsigned res = (dst) - (src); SetCFB(res); SetOFB_Sub(res, src, dst); SetAF(res, src, dst); SetSZPF_Byte(res); dst = (uint8)res; }
-#define SUBW(dst, src) { unsigned res = (dst) - (src); SetCFW(res); SetOFW_Sub(res, src, dst); SetAF(res, src, dst); SetSZPF_Word(res); dst = (uint16)res; }
+#define SUBB(dst, src) { unsigned res = (dst) - (src); SetCFB(res); SetOFB_Sub(res, src, dst); SetAF(res, src, dst); SetSZPF_Byte(res); dst = (uint8_t)res; }
+#define SUBW(dst, src) { unsigned res = (dst) - (src); SetCFW(res); SetOFW_Sub(res, src, dst); SetAF(res, src, dst); SetSZPF_Word(res); dst = (uint16_t)res; }
#define ORB(dst, src) dst |= (src); CarryVal = OverVal = AuxVal = 0; SetSZPF_Byte(dst)
#define ORW(dst, src) dst |= (src); CarryVal = OverVal = AuxVal = 0; SetSZPF_Word(dst)
/************************************************************************/
-#define CompressFlags() (uint16)(CF | (PF << 2) | (AF << 4) | (ZF << 6) | (SF << 7) | (TF << 8) | (IF << 9) | (DF << 10) | (OF << 11) | (MD << 15))
+#define CompressFlags() (uint16_t)(CF | (PF << 2) | (AF << 4) | (ZF << 6) | (SF << 7) | (TF << 8) | (IF << 9) | (DF << 10) | (OF << 11) | (MD << 15))
#define ExpandFlags(f) { \
CarryVal = (f) & 1; \
)
#define GetRMWordOffset(offs) ( \
- ReadWord(ea - eo + (uint16)(eo + offs)) \
+ ReadWord(ea - eo + (uint16_t)(eo + offs)) \
)
#define GetRMByteOffset(offs) ( \
- ReadByte(ea - eo + (uint16)(eo + offs)) \
+ ReadByte(ea - eo + (uint16_t)(eo + offs)) \
)
#define PutRMWord(ModRM, val) { \
}
#define PutRMWordOffset(offs, val) \
- WriteWord(ea - eo + (uint16)(eo + offs), val)
+ WriteWord(ea - eo + (uint16_t)(eo + offs), val)
#define PutRMByteOffset(offs, val) \
- WriteByte(ea - eo + (uint16)(eo + offs), val)
+ WriteByte(ea - eo + (uint16_t)(eo + offs), val)
#define PutImmRMWord(ModRM) { \
- uint16 val; \
+ uint16_t val; \
if (ModRM >= 0xc0) { \
FETCHWORD(regs.w[Mod_RM.RM.w[ModRM]]) \
} else { \
/* Highly useful macro for compile-time knowledge of an array size */
#define ARRAY_LENGTH(x) (sizeof(x) / sizeof(x[0]))
-int necv_dasm_one(char *buffer, UINT32 eip, const UINT8 *oprom);
+int necv_dasm_one(_TCHAR *buffer, UINT32 eip, const UINT8 *oprom);
void I86::initialize()
{
+ DEVICE::initialize();
static const BREGS reg_name[8] = {AL, CL, DL, BL, AH, CH, DH, BH};
for(int i = 0; i < 256; i++) {
d_dma->do_dma();
}
#endif
- int passed_icount = max(1, extra_icount);
- icount = extra_icount = 0;
- return passed_icount;
+ if(clock == -1) {
+ int passed_icount = max(1, extra_icount);
+ // this is main cpu, icount is not used
+ /*icount = */extra_icount = 0;
+ return passed_icount;
+ } else {
+ icount += clock;
+ int first_icount = icount;
+
+ /* adjust for any interrupts that came in */
+ icount -= extra_icount;
+ extra_icount = 0;
+
+ /* if busreq is raised, spin cpu while remained clock */
+ if(icount > 0) {
+ icount = 0;
+ }
+ return first_icount - icount;
+ }
}
- // run cpu
if(clock == -1) {
- // run only one opcode
+ /* run only one opcode */
icount = -extra_icount;
extra_icount = 0;
#ifdef USE_DEBUGGER
#endif
return -icount;
} else {
- /* run cpu while given clocks */
icount += clock;
int first_icount = icount;
+
+ /* adjust for any interrupts that came in */
icount -= extra_icount;
extra_icount = 0;
+ /* run cpu while given clocks */
while(icount > 0 && !busreq) {
#ifdef USE_DEBUGGER
run_one_opecode_debugger();
run_one_opecode();
#endif
}
- int passed_icount = first_icount - icount;
- if(busreq && icount > 0) {
+ /* if busreq is raised, spin cpu while remained clock */
+ if(icount > 0 && busreq) {
icount = 0;
}
- return passed_icount;
+ return first_icount - icount;
}
}
d_debugger->check_break_points(pc);
if(d_debugger->now_suspended) {
emu->mute_sound();
+ d_debugger->now_waiting = true;
while(d_debugger->now_debugging && d_debugger->now_suspended) {
emu->sleep(10);
}
+ d_debugger->now_waiting = false;
}
if(d_debugger->now_debugging) {
d_mem = d_io = d_debugger;
#endif
#endif
instruction(FETCHOP);
+#ifdef SINGLE_MODE_DMA
+ if(d_dma) {
+ d_dma->do_dma();
+ }
+#endif
if(int_state & NMI_REQ_BIT) {
if(halted) {
pc++;
}
interrupt(-1);
}
-#ifdef SINGLE_MODE_DMA
- if(d_dma) {
- d_dma->do_dma();
- }
-#endif
icount -= extra_icount;
extra_icount = 0;
}
-void I86::write_signal(int id, uint32 data, uint32 mask)
+void I86::write_signal(int id, uint32_t data, uint32_t mask)
{
if(id == SIG_CPU_NMI) {
if(data & mask) {
}
}
-void I86::set_intr_line(bool line, bool pending, uint32 bit)
+void I86::set_intr_line(bool line, bool pending, uint32_t bit)
{
if(line) {
int_state |= INT_REQ_BIT;
}
#ifdef USE_DEBUGGER
-void I86::debug_write_data8(uint32 addr, uint32 data)
+void I86::write_debug_data8(uint32_t addr, uint32_t data)
{
int wait;
d_mem_stored->write_data8w(addr, data, &wait);
}
-uint32 I86::debug_read_data8(uint32 addr)
+uint32_t I86::read_debug_data8(uint32_t addr)
{
int wait;
return d_mem_stored->read_data8w(addr, &wait);
}
-void I86::debug_write_data16(uint32 addr, uint32 data)
+void I86::write_debug_data16(uint32_t addr, uint32_t data)
{
int wait;
d_mem_stored->write_data16w(addr, data, &wait);
}
-uint32 I86::debug_read_data16(uint32 addr)
+uint32_t I86::read_debug_data16(uint32_t addr)
{
int wait;
return d_mem_stored->read_data16w(addr, &wait);
}
-void I86::debug_write_io8(uint32 addr, uint32 data)
+void I86::write_debug_io8(uint32_t addr, uint32_t data)
{
int wait;
d_io_stored->write_io8w(addr, data, &wait);
}
-uint32 I86::debug_read_io8(uint32 addr) {
+uint32_t I86::read_debug_io8(uint32_t addr) {
int wait;
return d_io_stored->read_io8w(addr, &wait);
}
-void I86::debug_write_io16(uint32 addr, uint32 data)
+void I86::write_debug_io16(uint32_t addr, uint32_t data)
{
int wait;
d_io_stored->write_io16w(addr, data, &wait);
}
-uint32 I86::debug_read_io16(uint32 addr) {
+uint32_t I86::read_debug_io16(uint32_t addr) {
int wait;
return d_io_stored->read_io16w(addr, &wait);
}
-bool I86::debug_write_reg(const _TCHAR *reg, uint32 data)
+bool I86::write_debug_reg(const _TCHAR *reg, uint32_t data)
{
if(_tcsicmp(reg, _T("IP")) == 0) {
pc = ((data & 0xffff) + base[CS]) & AMASK;
return true;
}
-void I86::debug_regs_info(_TCHAR *buffer, size_t buffer_len)
+void I86::get_debug_regs_info(_TCHAR *buffer, size_t buffer_len)
{
my_stprintf_s(buffer, buffer_len,
_T("AX=%04X BX=%04X CX=%04X DX=%04X SP=%04X BP=%04X SI=%04X DI=%04X\nDS=%04X ES=%04X SS=%04X CS=%04X IP=%04X FLAG=[%c%c%c%c%c%c%c%c%c]"),
- regs.w[AX], regs.w[BX], regs.w[CX], regs.w[DX], regs.w[SP], regs.w[BP], regs.w[SI], regs.w[DI], sregs[DS], sregs[ES], sregs[SS], sregs[CS], (uint16)(pc - base[CS]),
+ regs.w[AX], regs.w[BX], regs.w[CX], regs.w[DX], regs.w[SP], regs.w[BP], regs.w[SI], regs.w[DI], sregs[DS], sregs[ES], sregs[SS], sregs[CS], (uint16_t)(pc - base[CS]),
OF ? _T('O') : _T('-'), DF ? _T('D') : _T('-'), IF ? _T('I') : _T('-'), TF ? _T('T') : _T('-'),
SF ? _T('S') : _T('-'), ZF ? _T('Z') : _T('-'), AF ? _T('A') : _T('-'), PF ? _T('P') : _T('-'), CF ? _T('C') : _T('-'));
}
-int I86::debug_dasm(uint32 pc, _TCHAR *buffer, size_t buffer_len)
+int I86::debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len)
{
- UINT32 eip = (UINT32)(uint16)(pc - base[CS]);
+ UINT32 eip = (UINT32)(uint16_t)(pc - base[CS]);
UINT8 ops[16];
for(int i = 0; i < 16; i++) {
int wait;
void I86::interrupt(int int_num)
{
unsigned dest_seg, dest_off;
- uint16 ip = pc - base[CS];
+ uint16_t ip = pc - base[CS];
if(int_num == -1) {
- int_num = d_pic->intr_ack() & 0xff;
+ int_num = d_pic->get_intr_ack() & 0xff;
int_state &= ~INT_REQ_BIT;
}
dest_off = ReadWord(int_num * 4);
TF = IF = 0;
PUSH(sregs[CS]);
PUSH(ip);
- sregs[CS] = (uint16)dest_seg;
+ sregs[CS] = (uint16_t)dest_seg;
base[CS] = SegBase(CS);
pc = (base[CS] + dest_off) & AMASK;
icount -= timing.exception;
{
switch(ModRM) {
case 0x00: case 0x08: case 0x10: case 0x18: case 0x20: case 0x28: case 0x30: case 0x38:
- icount -= 7; eo = (uint16)(regs.w[BX] + regs.w[SI]); ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
+ icount -= 7; eo = (uint16_t)(regs.w[BX] + regs.w[SI]); ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
case 0x01: case 0x09: case 0x11: case 0x19: case 0x21: case 0x29: case 0x31: case 0x39:
- icount -= 8; eo = (uint16)(regs.w[BX] + regs.w[DI]); ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
+ icount -= 8; eo = (uint16_t)(regs.w[BX] + regs.w[DI]); ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
case 0x02: case 0x0a: case 0x12: case 0x1a: case 0x22: case 0x2a: case 0x32: case 0x3a:
- icount -= 8; eo = (uint16)(regs.w[BP] + regs.w[SI]); ea_seg = DefaultSeg(SS); ea = DefaultBase(SS) + eo; return ea;
+ icount -= 8; eo = (uint16_t)(regs.w[BP] + regs.w[SI]); ea_seg = DefaultSeg(SS); ea = DefaultBase(SS) + eo; return ea;
case 0x03: case 0x0b: case 0x13: case 0x1b: case 0x23: case 0x2b: case 0x33: case 0x3b:
- icount -= 7; eo = (uint16)(regs.w[BP] + regs.w[DI]); ea_seg = DefaultSeg(SS); ea = DefaultBase(SS) + eo; return ea;
+ icount -= 7; eo = (uint16_t)(regs.w[BP] + regs.w[DI]); ea_seg = DefaultSeg(SS); ea = DefaultBase(SS) + eo; return ea;
case 0x04: case 0x0c: case 0x14: case 0x1c: case 0x24: case 0x2c: case 0x34: case 0x3c:
icount -= 5; eo = regs.w[SI]; ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
case 0x05: case 0x0d: case 0x15: case 0x1d: case 0x25: case 0x2d: case 0x35: case 0x3d:
icount -= 5; eo = regs.w[BX]; ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
case 0x40: case 0x48: case 0x50: case 0x58: case 0x60: case 0x68: case 0x70: case 0x78:
- icount -= 11; eo = (uint16)(regs.w[BX] + regs.w[SI] + (int8)FETCHOP); ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
+ icount -= 11; eo = (uint16_t)(regs.w[BX] + regs.w[SI] + (int8_t)FETCHOP); ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
case 0x41: case 0x49: case 0x51: case 0x59: case 0x61: case 0x69: case 0x71: case 0x79:
- icount -= 12; eo = (uint16)(regs.w[BX] + regs.w[DI] + (int8)FETCHOP); ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
+ icount -= 12; eo = (uint16_t)(regs.w[BX] + regs.w[DI] + (int8_t)FETCHOP); ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
case 0x42: case 0x4a: case 0x52: case 0x5a: case 0x62: case 0x6a: case 0x72: case 0x7a:
- icount -= 12; eo = (uint16)(regs.w[BP] + regs.w[SI] + (int8)FETCHOP); ea_seg = DefaultSeg(SS); ea = DefaultBase(SS) + eo; return ea;
+ icount -= 12; eo = (uint16_t)(regs.w[BP] + regs.w[SI] + (int8_t)FETCHOP); ea_seg = DefaultSeg(SS); ea = DefaultBase(SS) + eo; return ea;
case 0x43: case 0x4b: case 0x53: case 0x5b: case 0x63: case 0x6b: case 0x73: case 0x7b:
- icount -= 11; eo = (uint16)(regs.w[BP] + regs.w[DI] + (int8)FETCHOP); ea_seg = DefaultSeg(SS); ea = DefaultBase(SS) + eo; return ea;
+ icount -= 11; eo = (uint16_t)(regs.w[BP] + regs.w[DI] + (int8_t)FETCHOP); ea_seg = DefaultSeg(SS); ea = DefaultBase(SS) + eo; return ea;
case 0x44: case 0x4c: case 0x54: case 0x5c: case 0x64: case 0x6c: case 0x74: case 0x7c:
- icount -= 9; eo = (uint16)(regs.w[SI] + (int8)FETCHOP); ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
+ icount -= 9; eo = (uint16_t)(regs.w[SI] + (int8_t)FETCHOP); ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
case 0x45: case 0x4d: case 0x55: case 0x5d: case 0x65: case 0x6d: case 0x75: case 0x7d:
- icount -= 9; eo = (uint16)(regs.w[DI] + (int8)FETCHOP); ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
+ icount -= 9; eo = (uint16_t)(regs.w[DI] + (int8_t)FETCHOP); ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
case 0x46: case 0x4e: case 0x56: case 0x5e: case 0x66: case 0x6e: case 0x76: case 0x7e:
- icount -= 9; eo = (uint16)(regs.w[BP] + (int8)FETCHOP); ea_seg = DefaultSeg(SS); ea = DefaultBase(SS) + eo; return ea;
+ icount -= 9; eo = (uint16_t)(regs.w[BP] + (int8_t)FETCHOP); ea_seg = DefaultSeg(SS); ea = DefaultBase(SS) + eo; return ea;
case 0x47: case 0x4f: case 0x57: case 0x5f: case 0x67: case 0x6f: case 0x77: case 0x7f:
- icount -= 9; eo = (uint16)(regs.w[BX] + (int8)FETCHOP); ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
+ icount -= 9; eo = (uint16_t)(regs.w[BX] + (int8_t)FETCHOP); ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + eo; return ea;
case 0x80: case 0x88: case 0x90: case 0x98: case 0xa0: case 0xa8: case 0xb0: case 0xb8:
- icount -= 11; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[BX] + regs.w[SI]; ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + (uint16)eo; return ea;
+ icount -= 11; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[BX] + regs.w[SI]; ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + (uint16_t)eo; return ea;
case 0x81: case 0x89: case 0x91: case 0x99: case 0xa1: case 0xa9: case 0xb1: case 0xb9:
- icount -= 12; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[BX] + regs.w[DI]; ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + (uint16)eo; return ea;
+ icount -= 12; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[BX] + regs.w[DI]; ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + (uint16_t)eo; return ea;
case 0x82: case 0x8a: case 0x92: case 0x9a: case 0xa2: case 0xaa: case 0xb2: case 0xba:
- icount -= 12; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[BP] + regs.w[SI]; ea_seg = DefaultSeg(SS); ea = DefaultBase(SS) + (uint16)eo; return ea;
+ icount -= 12; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[BP] + regs.w[SI]; ea_seg = DefaultSeg(SS); ea = DefaultBase(SS) + (uint16_t)eo; return ea;
case 0x83: case 0x8b: case 0x93: case 0x9b: case 0xa3: case 0xab: case 0xb3: case 0xbb:
- icount -= 11; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[BP] + regs.w[DI]; ea_seg = DefaultSeg(DS); ea = DefaultBase(SS) + (uint16)eo; return ea;
+ icount -= 11; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[BP] + regs.w[DI]; ea_seg = DefaultSeg(DS); ea = DefaultBase(SS) + (uint16_t)eo; return ea;
case 0x84: case 0x8c: case 0x94: case 0x9c: case 0xa4: case 0xac: case 0xb4: case 0xbc:
- icount -= 9; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[SI]; ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + (uint16)eo; return ea;
+ icount -= 9; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[SI]; ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + (uint16_t)eo; return ea;
case 0x85: case 0x8d: case 0x95: case 0x9d: case 0xa5: case 0xad: case 0xb5: case 0xbd:
- icount -= 9; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[DI]; ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + (uint16)eo; return ea;
+ icount -= 9; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[DI]; ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + (uint16_t)eo; return ea;
case 0x86: case 0x8e: case 0x96: case 0x9e: case 0xa6: case 0xae: case 0xb6: case 0xbe:
- icount -= 9; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[BP]; ea_seg = DefaultSeg(SS); ea = DefaultBase(SS) + (uint16)eo; return ea;
+ icount -= 9; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[BP]; ea_seg = DefaultSeg(SS); ea = DefaultBase(SS) + (uint16_t)eo; return ea;
case 0x87: case 0x8f: case 0x97: case 0x9f: case 0xa7: case 0xaf: case 0xb7: case 0xbf:
- icount -= 9; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[BX]; ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + (uint16)eo; return ea;
+ icount -= 9; eo = FETCHOP; eo += FETCHOP << 8; eo += regs.w[BX]; ea_seg = DefaultSeg(DS); ea = DefaultBase(DS) + (uint16_t)eo; return ea;
}
return 0;
}
SetSZPF_Byte(dst);
break;
case 7: /* SAR eb, 1 */
- dst = ((int8)src) >> 1;
+ dst = ((int8_t)src) >> 1;
PutbackRMByte(ModRM, dst);
CarryVal = src & 0x01;
OverVal = 0;
SetSZPF_Byte(dst);
break;
#if defined(_MSC_VER) && (_MSC_VER >= 1200)
- default:
- __assume(0);
+ default:
+ __assume(0);
#endif
}
} else {
CarryVal = dst & 0x80;
dst = (dst << 1) + CF;
}
- PutbackRMByte(ModRM, (uint8)dst);
+ PutbackRMByte(ModRM, (uint8_t)dst);
break;
case 1: /* ROR eb, count */
for(; count > 0; count--) {
CarryVal = dst & 0x01;
dst = (dst >> 1) + (CF << 7);
}
- PutbackRMByte(ModRM, (uint8)dst);
+ PutbackRMByte(ModRM, (uint8_t)dst);
break;
case 2: /* RCL eb, count */
for(; count > 0; count--) {
dst = (dst << 1) + CF;
SetCFB(dst);
}
- PutbackRMByte(ModRM, (uint8)dst);
+ PutbackRMByte(ModRM, (uint8_t)dst);
break;
case 3: /* RCR eb, count */
for(; count > 0; count--) {
CarryVal = dst & 0x01;
dst >>= 1;
}
- PutbackRMByte(ModRM, (uint8)dst);
+ PutbackRMByte(ModRM, (uint8_t)dst);
break;
case 4: /* SHL eb, count */
case 6:
SetCFB(dst);
AuxVal = 1;
SetSZPF_Byte(dst);
- PutbackRMByte(ModRM, (uint8)dst);
+ PutbackRMByte(ModRM, (uint8_t)dst);
break;
case 5: /* SHR eb, count */
dst >>= count - 1;
dst >>= 1;
SetSZPF_Byte(dst);
AuxVal = 1;
- PutbackRMByte(ModRM, (uint8)dst);
+ PutbackRMByte(ModRM, (uint8_t)dst);
break;
case 7: /* SAR eb, count */
- dst = ((int8)dst) >> (count - 1);
+ dst = ((int8_t)dst) >> (count - 1);
CarryVal = dst & 0x01;
- dst = ((int8)((uint8)dst)) >> 1;
+ dst = ((int8_t)((uint8_t)dst)) >> 1;
SetSZPF_Byte(dst);
AuxVal = 1;
- PutbackRMByte(ModRM, (uint8)dst);
+ PutbackRMByte(ModRM, (uint8_t)dst);
break;
#if defined(_MSC_VER) && (_MSC_VER >= 1200)
- default:
- __assume(0);
+ default:
+ __assume(0);
#endif
}
}
SetSZPF_Word(dst);
break;
case 7: /* SAR ew, 1 */
- dst = ((int16)src) >> 1;
+ dst = ((int16_t)src) >> 1;
PutbackRMWord(ModRM, dst);
CarryVal = src & 0x01;
OverVal = 0;
SetSZPF_Word(dst);
break;
#if defined(_MSC_VER) && (_MSC_VER >= 1200)
- default:
- __assume(0);
+ default:
+ __assume(0);
#endif
}
} else {
PutbackRMWord(ModRM, dst);
break;
case 7: /* SAR ew, count */
- dst = ((int16)dst) >> (count - 1);
+ dst = ((int16_t)dst) >> (count - 1);
CarryVal = dst & 0x01;
- dst = ((int16)((uint16)dst)) >> 1;
+ dst = ((int16_t)((uint16_t)dst)) >> 1;
SetSZPF_Word(dst);
AuxVal = 1;
PutbackRMWord(ModRM, dst);
break;
- default:
#if defined(_MSC_VER) && (_MSC_VER >= 1200)
- break;
+ default:
+ __assume(0);
#endif
}
}
}
-void I86::instruction(uint8 code)
+void I86::instruction(uint8_t code)
{
prevpc = pc - 1;
#if defined(HAS_V30)
inline void I86::_0fpre() /* Opcode 0x0f */
{
- static const uint16 bytes[] = {
+ static const uint16_t bytes[] = {
1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768
};
unsigned code = FETCH;
inline void I86::_das() /* Opcode 0x2f */
{
- uint8 tmpAL = regs.b[AL];
+ uint8_t tmpAL = regs.b[AL];
if(AF || ((regs.b[AL] & 0xf) > 9)) {
int tmp;
regs.b[AL] = tmp = regs.b[AL] - 6;
inline void I86::_aaa() /* Opcode 0x37 */
{
- uint8 ALcarry = 1;
+ uint8_t ALcarry = 1;
if(regs.b[AL]>0xf9) {
ALcarry = 2;
}
inline void I86::_aas() /* Opcode 0x3f */
{
- uint8 ALcarry = 1;
+ uint8_t ALcarry = 1;
if(regs.b[AL] > 0xf9) {
ALcarry = 2;
}
inline void I86::_bound() /* Opcode 0x62 */
{
unsigned ModRM = FETCHOP;
- int low = (int16)GetRMWord(ModRM);
- int high = (int16)GetNextRMWord;
- int tmp = (int16)RegWord(ModRM);
+ int low = (int16_t)GetRMWord(ModRM);
+ int high = (int16_t)GetNextRMWord;
+ int tmp = (int16_t)RegWord(ModRM);
if(tmp < low || tmp>high) {
pc -= (seg_prefix ? 3 : 2);
interrupt(BOUNDS_CHECK_FAULT);
unsigned src2 = FETCH;
src += (FETCH << 8);
icount -= (ModRM >= 0xc0) ? timing.imul_rri16 : timing.imul_rmi16;
- dst = (int32)((int16)src) * (int32)((int16)src2);
- CarryVal = OverVal = (((int32)dst) >> 15 != 0) && (((int32)dst) >> 15 != -1);
- RegWord(ModRM) = (uint16)dst;
+ dst = (int32_t)((int16_t)src) * (int32_t)((int16_t)src2);
+ CarryVal = OverVal = (((int32_t)dst) >> 15 != 0) && (((int32_t)dst) >> 15 != -1);
+ RegWord(ModRM) = (uint16_t)dst;
}
inline void I86::_push_d8() /* Opcode 0x6a */
{
- unsigned tmp = (uint16)((int16)((int8)FETCH));
+ unsigned tmp = (uint16_t)((int16_t)((int8_t)FETCH));
icount -= timing.push_imm;
PUSH(tmp);
}
inline void I86::_imul_d8() /* Opcode 0x6b */
{
DEF_r16w(dst, src);
- unsigned src2 = (uint16)((int16)((int8)FETCH));
+ unsigned src2 = (uint16_t)((int16_t)((int8_t)FETCH));
icount -= (ModRM >= 0xc0) ? timing.imul_rri8 : timing.imul_rmi8;
- dst = (int32)((int16)src) * (int32)((int16)src2);
- CarryVal = OverVal = (((int32)dst) >> 15 != 0) && (((int32)dst) >> 15 != -1);
- RegWord(ModRM) = (uint16)dst;
+ dst = (int32_t)((int16_t)src) * (int32_t)((int16_t)src2);
+ CarryVal = OverVal = (((int32_t)dst) >> 15 != 0) && (((int32_t)dst) >> 15 != -1);
+ RegWord(ModRM) = (uint16_t)dst;
}
inline void I86::_insb() /* Opcode 0x6c */
inline void I86::_jo() /* Opcode 0x70 */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if(OF) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_jno() /* Opcode 0x71 */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if(!OF) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_jb() /* Opcode 0x72 */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if(CF) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_jnb() /* Opcode 0x73 */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if(!CF) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_jz() /* Opcode 0x74 */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if(ZF) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_jnz() /* Opcode 0x75 */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if(!ZF) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_jbe() /* Opcode 0x76 */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if(CF || ZF) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_jnbe() /* Opcode 0x77 */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if(!(CF || ZF)) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_js() /* Opcode 0x78 */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if(SF) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_jns() /* Opcode 0x79 */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if(!SF) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_jp() /* Opcode 0x7a */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if(PF) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_jnp() /* Opcode 0x7b */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if(!PF) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_jl() /* Opcode 0x7c */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if((SF!= OF) && !ZF) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_jnl() /* Opcode 0x7d */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if(ZF || (SF == OF)) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_jle() /* Opcode 0x7e */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if(ZF || (SF!= OF)) {
pc += tmp;
icount -= timing.jcc_t;
inline void I86::_jnle() /* Opcode 0x7f */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
if((SF == OF) && !ZF) {
pc += tmp;
icount -= timing.jcc_t;
icount -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8_ro;
break;
#if defined(_MSC_VER) && (_MSC_VER >= 1200)
- default:
+ default:
__assume(0);
#endif
}
{
unsigned ModRM = FETCH;
unsigned dst = GetRMWord(ModRM);
- unsigned src = (uint16)((int16)((int8)FETCH));
+ unsigned src = (uint16_t)((int16_t)((int8_t)FETCH));
switch((ModRM >> 3) & 7) {
case 0: /* ADD ew, d16 */
inline void I86::_mov_br8() /* Opcode 0x88 */
{
unsigned ModRM = FETCH;
- uint8 src = RegByte(ModRM);
+ uint8_t src = RegByte(ModRM);
icount -= (ModRM >= 0xc0) ? timing.mov_rr8 : timing.mov_mr8;
PutRMByte(ModRM, src);
}
inline void I86::_mov_wr16() /* Opcode 0x89 */
{
unsigned ModRM = FETCH;
- uint16 src = RegWord(ModRM);
+ uint16_t src = RegWord(ModRM);
icount -= (ModRM >= 0xc0) ? timing.mov_rr16 : timing.mov_mr16;
PutRMWord(ModRM, src);
}
inline void I86::_mov_r8b() /* Opcode 0x8a */
{
unsigned ModRM = FETCH;
- uint8 src = GetRMByte(ModRM);
+ uint8_t src = GetRMByte(ModRM);
icount -= (ModRM >= 0xc0) ? timing.mov_rr8 : timing.mov_rm8;
RegByte(ModRM) = src;
}
inline void I86::_mov_r16w() /* Opcode 0x8b */
{
unsigned ModRM = FETCH;
- uint16 src = GetRMWord(ModRM);
+ uint16_t src = GetRMWord(ModRM);
icount -= (ModRM >= 0xc0) ? timing.mov_rr8 : timing.mov_rm16;
RegWord(ModRM) = src;
}
inline void I86::_mov_sregw() /* Opcode 0x8e */
{
unsigned ModRM = FETCH;
- uint16 src = GetRMWord(ModRM);
+ uint16_t src = GetRMWord(ModRM);
icount -= (ModRM >= 0xc0) ? timing.mov_sr : timing.mov_sm;
switch((ModRM >> 3) & 7) {
inline void I86::_popw() /* Opcode 0x8f */
{
unsigned ModRM = FETCH;
- uint16 tmp;
+ uint16_t tmp;
POP(tmp);
icount -= (ModRM >= 0xc0) ? timing.pop_r16 : timing.pop_m16;
PutRMWord(ModRM, tmp);
}
#define XchgAXReg(Reg) { \
- uint16 tmp; \
+ uint16_t tmp; \
tmp = regs.w[Reg]; \
regs.w[Reg] = regs.w[AX]; \
regs.w[AX] = tmp; \
inline void I86::_call_far() /* Opcode 0x9a */
{
unsigned tmp, tmp2;
- uint16 ip;
+ uint16_t ip;
tmp = FETCH;
tmp += FETCH << 8;
ip = pc - base[CS];
PUSH(sregs[CS]);
PUSH(ip);
- sregs[CS] = (uint16)tmp2;
+ sregs[CS] = (uint16_t)tmp2;
base[CS] = SegBase(CS);
- pc = (base[CS] + (uint16)tmp) & AMASK;
+ pc = (base[CS] + (uint16_t)tmp) & AMASK;
#ifdef I86_PSEUDO_BIOS
if(d_bios && d_bios->bios_call_i86(pc, regs.w, sregs, &ZeroVal, &CarryVal)) {
/* bios call */
inline void I86::_movsb() /* Opcode 0xa4 */
{
- uint8 tmp = GetMemB(DS, regs.w[SI]);
+ uint8_t tmp = GetMemB(DS, regs.w[SI]);
PutMemB(ES, regs.w[DI], tmp);
regs.w[DI] += DirVal;
regs.w[SI] += DirVal;
inline void I86::_movsw() /* Opcode 0xa5 */
{
- uint16 tmp = GetMemW(DS, regs.w[SI]);
+ uint16_t tmp = GetMemW(DS, regs.w[SI]);
PutMemW(ES, regs.w[DI], tmp);
regs.w[DI] += 2 * DirVal;
regs.w[SI] += 2 * DirVal;
inline void I86::_les_dw() /* Opcode 0xc4 */
{
unsigned ModRM = FETCH;
- uint16 tmp = GetRMWord(ModRM);
+ uint16_t tmp = GetRMWord(ModRM);
RegWord(ModRM) = tmp;
sregs[ES] = GetNextRMWord;
base[ES] = SegBase(ES);
inline void I86::_lds_dw() /* Opcode 0xc5 */
{
unsigned ModRM = FETCH;
- uint16 tmp = GetRMWord(ModRM);
+ uint16_t tmp = GetRMWord(ModRM);
RegWord(ModRM) = tmp;
sregs[DS] = GetNextRMWord;
base[DS] = SegBase(DS);
inline void I86::_loopne() /* Opcode 0xe0 */
{
- int disp = (int)((int8)FETCH);
+ int disp = (int)((int8_t)FETCH);
unsigned tmp = regs.w[CX] - 1;
regs.w[CX] = tmp;
if(!ZF && tmp) {
inline void I86::_loope() /* Opcode 0xe1 */
{
- int disp = (int)((int8)FETCH);
+ int disp = (int)((int8_t)FETCH);
unsigned tmp = regs.w[CX] - 1;
regs.w[CX] = tmp;
if(ZF && tmp) {
inline void I86::_loop() /* Opcode 0xe2 */
{
- int disp = (int)((int8)FETCH);
+ int disp = (int)((int8_t)FETCH);
unsigned tmp = regs.w[CX] - 1;
regs.w[CX] = tmp;
if(tmp) {
inline void I86::_jcxz() /* Opcode 0xe3 */
{
- int disp = (int)((int8)FETCH);
+ int disp = (int)((int8_t)FETCH);
if(regs.w[CX] == 0) {
icount -= timing.jcxz_t;
pc += disp;
inline void I86::_call_d16() /* Opcode 0xe8 */
{
- uint16 ip, tmp;
+ uint16_t ip, tmp;
FETCHWORD(tmp);
ip = pc - base[CS];
inline void I86::_jmp_d16() /* Opcode 0xe9 */
{
- uint16 ip, tmp;
+ uint16_t ip, tmp;
FETCHWORD(tmp);
ip = pc - base[CS] + tmp;
tmp1 = FETCH;
tmp1 += FETCH << 8;
- sregs[CS] = (uint16)tmp1;
+ sregs[CS] = (uint16_t)tmp1;
base[CS] = SegBase(CS);
pc = (base[CS] + tmp) & AMASK;
icount -= timing.jmp_far;
inline void I86::_jmp_d8() /* Opcode 0xeb */
{
- int tmp = (int)((int8)FETCH);
+ int tmp = (int)((int8_t)FETCH);
pc += tmp;
icount -= timing.jmp_short;
}
case 0xa4: /* REP MOVSB */
icount -= timing.rep_movs8_base;
for(; count > 0; count--) {
- uint8 tmp;
+ uint8_t tmp;
tmp = GetMemB(DS, regs.w[SI]);
PutMemB(ES, regs.w[DI], tmp);
regs.w[DI] += DirVal;
case 0xa5: /* REP MOVSW */
icount -= timing.rep_movs16_base;
for(; count > 0; count--) {
- uint16 tmp;
+ uint16_t tmp;
tmp = GetMemW(DS, regs.w[SI]);
PutMemW(ES, regs.w[DI], tmp);
regs.w[DI] += 2 * DirVal;
case 4: /* MUL AL, Eb */
icount -= (ModRM >= 0xc0) ? timing.mul_r8 : timing.mul_m8;
{
- uint16 result;
+ uint16_t result;
tmp2 = regs.b[AL];
- SetSF((int8)tmp2);
+ SetSF((int8_t)tmp2);
SetPF(tmp2);
- result = (uint16)tmp2 * tmp;
- regs.w[AX] = (uint16)result;
+ result = (uint16_t)tmp2 * tmp;
+ regs.w[AX] = (uint16_t)result;
SetZF(regs.w[AX]);
CarryVal = OverVal = (regs.b[AH] != 0);
case 5: /* IMUL AL, Eb */
icount -= (ModRM >= 0xc0) ? timing.imul_r8 : timing.imul_m8;
{
- int16 result;
+ int16_t result;
tmp2 = (unsigned)regs.b[AL];
- SetSF((int8)tmp2);
+ SetSF((int8_t)tmp2);
SetPF(tmp2);
- result = (int16)((int8)tmp2) * (int16)((int8)tmp);
- regs.w[AX] = (uint16)result;
+ result = (int16_t)((int8_t)tmp2) * (int16_t)((int8_t)tmp);
+ regs.w[AX] = (uint16_t)result;
SetZF(regs.w[AX]);
CarryVal = OverVal = (result >> 7 != 0) && (result >> 7 != -1);
case 6: /* DIV AL, Ew */
icount -= (ModRM >= 0xc0) ? timing.div_r8 : timing.div_m8;
{
- uint16 result;
+ uint16_t result;
result = regs.w[AX];
case 7: /* IDIV AL, Ew */
icount -= (ModRM >= 0xc0) ? timing.idiv_r8 : timing.idiv_m8;
{
- int16 result;
+ int16_t result;
result = regs.w[AX];
if(tmp) {
- tmp2 = result % (int16)((int8)tmp);
+ tmp2 = result % (int16_t)((int8_t)tmp);
- if((result /= (int16)((int8)tmp)) > 0xff) {
+ if((result /= (int16_t)((int8_t)tmp)) > 0xff) {
interrupt(DIVIDE_FAULT);
break;
} else {
- regs.b[AL] = (uint8)result;
+ regs.b[AL] = (uint8_t)result;
regs.b[AH] = tmp2;
}
} else {
case 4: /* MUL AX, Ew */
icount -= (ModRM >= 0xc0) ? timing.mul_r16 : timing.mul_m16;
{
- uint32 result;
+ uint32_t result;
tmp2 = regs.w[AX];
- SetSF((int16)tmp2);
+ SetSF((int16_t)tmp2);
SetPF(tmp2);
- result = (uint32)tmp2 * tmp;
- regs.w[AX] = (uint16)result;
+ result = (uint32_t)tmp2 * tmp;
+ regs.w[AX] = (uint16_t)result;
result >>= 16;
regs.w[DX] = result;
case 5: /* IMUL AX, Ew */
icount -= (ModRM >= 0xc0) ? timing.imul_r16 : timing.imul_m16;
{
- int32 result;
+ int32_t result;
tmp2 = regs.w[AX];
- SetSF((int16)tmp2);
+ SetSF((int16_t)tmp2);
SetPF(tmp2);
- result = (int32)((int16)tmp2) * (int32)((int16)tmp);
+ result = (int32_t)((int16_t)tmp2) * (int32_t)((int16_t)tmp);
CarryVal = OverVal = (result >> 15 != 0) && (result >> 15 != -1);
- regs.w[AX] = (uint16)result;
- result = (uint16)(result >> 16);
+ regs.w[AX] = (uint16_t)result;
+ result = (uint16_t)(result >> 16);
regs.w[DX] = result;
SetZF(regs.w[AX] | regs.w[DX]);
case 6: /* DIV AX, Ew */
icount -= (ModRM >= 0xc0) ? timing.div_r16 : timing.div_m16;
{
- uint32 result;
+ uint32_t result;
result = (regs.w[DX] << 16) + regs.w[AX];
case 7: /* IDIV AX, Ew */
icount -= (ModRM >= 0xc0) ? timing.idiv_r16 : timing.idiv_m16;
{
- int32 result;
+ int32_t result;
result = (regs.w[DX] << 16) + regs.w[AX];
if(tmp) {
- tmp2 = result % (int32)((int16)tmp);
- if((result /= (int32)((int16)tmp)) > 0xffff) {
+ tmp2 = result % (int32_t)((int16_t)tmp);
+ if((result /= (int32_t)((int16_t)tmp)) > 0xffff) {
interrupt(DIVIDE_FAULT);
break;
} else {
}
SetAF(tmp1, tmp, 1);
SetSZPF_Byte(tmp1);
- PutbackRMByte(ModRM, (uint8)tmp1);
+ PutbackRMByte(ModRM, (uint8_t)tmp1);
}
inline void I86::_ffpre() /* Opcode 0xff */
unsigned ModRM = FETCHOP;
unsigned tmp;
unsigned tmp1;
- uint16 ip;
+ uint16_t ip;
switch((ModRM >> 3) & 7) {
case 0: /* INC ew */
SetOFW_Add(tmp1, tmp, 1);
SetAF(tmp1, tmp, 1);
SetSZPF_Word(tmp1);
- PutbackRMWord(ModRM, (uint16)tmp1);
+ PutbackRMWord(ModRM, (uint16_t)tmp1);
break;
case 1: /* DEC ew */
icount -= (ModRM >= 0xc0) ? timing.incdec_r16 : timing.incdec_m16;
SetOFW_Sub(tmp1, 1, tmp);
SetAF(tmp1, tmp, 1);
SetSZPF_Word(tmp1);
- PutbackRMWord(ModRM, (uint16)tmp1);
+ PutbackRMWord(ModRM, (uint16_t)tmp1);
break;
case 2: /* CALL ew */
icount -= (ModRM >= 0xc0) ? timing.call_r16 : timing.call_m16;
tmp = GetRMWord(ModRM);
ip = pc - base[CS];
PUSH(ip);
- pc = (base[CS] + (uint16)tmp) & AMASK;
+ pc = (base[CS] + (uint16_t)tmp) & AMASK;
#ifdef I86_PSEUDO_BIOS
if(d_bios && d_bios->bios_call_i86(pc, regs.w, sregs, &ZeroVal, &CarryVal)) {
/* bios call */
};
struct I386_OPCODE {
- char mnemonic[32];
+ _TCHAR mnemonic[32];
UINT32 flags;
UINT32 param1;
UINT32 param2;
};
struct GROUP_OP {
- char mnemonic[32];
+ _TCHAR mnemonic[32];
const I386_OPCODE *opcode;
};
static const I386_OPCODE necv_opcode_table1[256] =
{
// 0x00
- {"add", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"add", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"add", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"add", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"add", 0, PARAM_AL, PARAM_UI8, 0 },
- {"add", 0, PARAM_AW, PARAM_IMM, 0 },
- {"push ds1", 0, 0, 0, 0 },
- {"pop ds1", 0, 0, 0, 0 },
- {"or", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"or", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"or", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"or", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"or", 0, PARAM_AL, PARAM_UI8, 0 },
- {"or", 0, PARAM_AW, PARAM_IMM, 0 },
- {"push ps", 0, 0, 0, 0 },
- {"two_byte", TWO_BYTE, 0, 0, 0 },
+ {_T("add"), MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {_T("add"), MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {_T("add"), MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {_T("add"), MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {_T("add"), 0, PARAM_AL, PARAM_UI8, 0 },
+ {_T("add"), 0, PARAM_AW, PARAM_IMM, 0 },
+ {_T("push ds1"), 0, 0, 0, 0 },
+ {_T("pop ds1"), 0, 0, 0, 0 },
+ {_T("or"), MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {_T("or"), MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {_T("or"), MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {_T("or"), MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {_T("or"), 0, PARAM_AL, PARAM_UI8, 0 },
+ {_T("or"), 0, PARAM_AW, PARAM_IMM, 0 },
+ {_T("push ps"), 0, 0, 0, 0 },
+ {_T("two_byte"), TWO_BYTE, 0, 0, 0 },
// 0x10
- {"addc", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"addc", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"addc", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"addc", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"addc", 0, PARAM_AL, PARAM_UI8, 0 },
- {"addc", 0, PARAM_AW, PARAM_IMM, 0 },
- {"push ss", 0, 0, 0, 0 },
- {"pop ss", 0, 0, 0, 0 },
- {"subc", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"subc", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"subc", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"subc", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"subc", 0, PARAM_AL, PARAM_UI8, 0 },
- {"subc", 0, PARAM_AW, PARAM_IMM, 0 },
- {"push ds0", 0, 0, 0, 0 },
- {"pop ds0", 0, 0, 0, 0 },
+ {_T("addc"), MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {_T("addc"), MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {_T("addc"), MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {_T("addc"), MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {_T("addc"), 0, PARAM_AL, PARAM_UI8, 0 },
+ {_T("addc"), 0, PARAM_AW, PARAM_IMM, 0 },
+ {_T("push ss"), 0, 0, 0, 0 },
+ {_T("pop ss"), 0, 0, 0, 0 },
+ {_T("subc"), MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {_T("subc"), MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {_T("subc"), MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {_T("subc"), MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {_T("subc"), 0, PARAM_AL, PARAM_UI8, 0 },
+ {_T("subc"), 0, PARAM_AW, PARAM_IMM, 0 },
+ {_T("push ds0"), 0, 0, 0, 0 },
+ {_T("pop ds0"), 0, 0, 0, 0 },
// 0x20
- {"and", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"and", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"and", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"and", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"and", 0, PARAM_AL, PARAM_UI8, 0 },
- {"and", 0, PARAM_AW, PARAM_IMM, 0 },
- {"ds1:", SEG_DS1, 0, 0, 0 },
- {"adj4a", 0, 0, 0, 0 },
- {"sub", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"sub", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"sub", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"sub", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"sub", 0, PARAM_AL, PARAM_UI8, 0 },
- {"sub", 0, PARAM_AW, PARAM_IMM, 0 },
- {"ps:", SEG_PS, 0, 0, 0 },
- {"adj4s", 0, 0, 0, 0 },
+ {_T("and"), MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {_T("and"), MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {_T("and"), MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {_T("and"), MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {_T("and"), 0, PARAM_AL, PARAM_UI8, 0 },
+ {_T("and"), 0, PARAM_AW, PARAM_IMM, 0 },
+ {_T("ds1:"), SEG_DS1, 0, 0, 0 },
+ {_T("adj4a"), 0, 0, 0, 0 },
+ {_T("sub"), MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {_T("sub"), MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {_T("sub"), MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {_T("sub"), MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {_T("sub"), 0, PARAM_AL, PARAM_UI8, 0 },
+ {_T("sub"), 0, PARAM_AW, PARAM_IMM, 0 },
+ {_T("ps:"), SEG_PS, 0, 0, 0 },
+ {_T("adj4s"), 0, 0, 0, 0 },
// 0x30
- {"xor", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"xor", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"xor", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"xor", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"xor", 0, PARAM_AL, PARAM_UI8, 0 },
- {"xor", 0, PARAM_AW, PARAM_IMM, 0 },
- {"ss:", SEG_SS, 0, 0, 0 },
- {"adjba", 0, 0, 0, 0 },
- {"cmp", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"cmp", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"cmp", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"cmp", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"cmp", 0, PARAM_AL, PARAM_UI8, 0 },
- {"cmp", 0, PARAM_AW, PARAM_IMM, 0 },
- {"ds0:", SEG_DS0, 0, 0, 0 },
- {"adjbs", 0, 0, 0, 0 },
+ {_T("xor"), MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {_T("xor"), MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {_T("xor"), MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {_T("xor"), MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {_T("xor"), 0, PARAM_AL, PARAM_UI8, 0 },
+ {_T("xor"), 0, PARAM_AW, PARAM_IMM, 0 },
+ {_T("ss:"), SEG_SS, 0, 0, 0 },
+ {_T("adjba"), 0, 0, 0, 0 },
+ {_T("cmp"), MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {_T("cmp"), MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {_T("cmp"), MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {_T("cmp"), MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {_T("cmp"), 0, PARAM_AL, PARAM_UI8, 0 },
+ {_T("cmp"), 0, PARAM_AW, PARAM_IMM, 0 },
+ {_T("ds0:"), SEG_DS0, 0, 0, 0 },
+ {_T("adjbs"), 0, 0, 0, 0 },
// 0x40
- {"inc", 0, PARAM_AW, 0, 0 },
- {"inc", 0, PARAM_CW, 0, 0 },
- {"inc", 0, PARAM_DW, 0, 0 },
- {"inc", 0, PARAM_BW, 0, 0 },
- {"inc", 0, PARAM_SP, 0, 0 },
- {"inc", 0, PARAM_BP, 0, 0 },
- {"inc", 0, PARAM_IX, 0, 0 },
- {"inc", 0, PARAM_IY, 0, 0 },
- {"dec", 0, PARAM_AW, 0, 0 },
- {"dec", 0, PARAM_CW, 0, 0 },
- {"dec", 0, PARAM_DW, 0, 0 },
- {"dec", 0, PARAM_BW, 0, 0 },
- {"dec", 0, PARAM_SP, 0, 0 },
- {"dec", 0, PARAM_BP, 0, 0 },
- {"dec", 0, PARAM_IX, 0, 0 },
- {"dec", 0, PARAM_IY, 0, 0 },
+ {_T("inc"), 0, PARAM_AW, 0, 0 },
+ {_T("inc"), 0, PARAM_CW, 0, 0 },
+ {_T("inc"), 0, PARAM_DW, 0, 0 },
+ {_T("inc"), 0, PARAM_BW, 0, 0 },
+ {_T("inc"), 0, PARAM_SP, 0, 0 },
+ {_T("inc"), 0, PARAM_BP, 0, 0 },
+ {_T("inc"), 0, PARAM_IX, 0, 0 },
+ {_T("inc"), 0, PARAM_IY, 0, 0 },
+ {_T("dec"), 0, PARAM_AW, 0, 0 },
+ {_T("dec"), 0, PARAM_CW, 0, 0 },
+ {_T("dec"), 0, PARAM_DW, 0, 0 },
+ {_T("dec"), 0, PARAM_BW, 0, 0 },
+ {_T("dec"), 0, PARAM_SP, 0, 0 },
+ {_T("dec"), 0, PARAM_BP, 0, 0 },
+ {_T("dec"), 0, PARAM_IX, 0, 0 },
+ {_T("dec"), 0, PARAM_IY, 0, 0 },
// 0x50
- {"push", 0, PARAM_AW, 0, 0 },
- {"push", 0, PARAM_CW, 0, 0 },
- {"push", 0, PARAM_DW, 0, 0 },
- {"push", 0, PARAM_BW, 0, 0 },
- {"push", 0, PARAM_SP, 0, 0 },
- {"push", 0, PARAM_BP, 0, 0 },
- {"push", 0, PARAM_IX, 0, 0 },
- {"push", 0, PARAM_IY, 0, 0 },
- {"pop", 0, PARAM_AW, 0, 0 },
- {"pop", 0, PARAM_CW, 0, 0 },
- {"pop", 0, PARAM_DW, 0, 0 },
- {"pop", 0, PARAM_BW, 0, 0 },
- {"pop", 0, PARAM_SP, 0, 0 },
- {"pop", 0, PARAM_BP, 0, 0 },
- {"pop", 0, PARAM_IX, 0, 0 },
- {"pop", 0, PARAM_IY, 0, 0 },
+ {_T("push"), 0, PARAM_AW, 0, 0 },
+ {_T("push"), 0, PARAM_CW, 0, 0 },
+ {_T("push"), 0, PARAM_DW, 0, 0 },
+ {_T("push"), 0, PARAM_BW, 0, 0 },
+ {_T("push"), 0, PARAM_SP, 0, 0 },
+ {_T("push"), 0, PARAM_BP, 0, 0 },
+ {_T("push"), 0, PARAM_IX, 0, 0 },
+ {_T("push"), 0, PARAM_IY, 0, 0 },
+ {_T("pop"), 0, PARAM_AW, 0, 0 },
+ {_T("pop"), 0, PARAM_CW, 0, 0 },
+ {_T("pop"), 0, PARAM_DW, 0, 0 },
+ {_T("pop"), 0, PARAM_BW, 0, 0 },
+ {_T("pop"), 0, PARAM_SP, 0, 0 },
+ {_T("pop"), 0, PARAM_BP, 0, 0 },
+ {_T("pop"), 0, PARAM_IX, 0, 0 },
+ {_T("pop"), 0, PARAM_IY, 0, 0 },
// 0x60
- {"push r", 0, 0, 0, 0 },
- {"pop r", 0, 0, 0, 0 },
- {"chkind", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"brkn", 0, PARAM_UI8, 0, 0, DASMFLAG_STEP_OVER}, /* V25S/V35S only */
- {"repnc", PREFIX, 0, 0, 0 },
- {"repc", PREFIX, 0, 0, 0 },
- {"fpo2 0", 0, 0, 0, 0 }, /* for a coprocessor that was never made */
- {"fpo2 1", 0, 0, 0, 0 }, /* for a coprocessor that was never made */
- {"push", 0, PARAM_IMM, 0, 0 },
- {"mul", MODRM, PARAM_REG16, PARAM_RM16, PARAM_IMM },
- {"push", 0, PARAM_I8, 0, 0 },
- {"mul", MODRM, PARAM_REG16, PARAM_RM16, PARAM_I8 },
- {"inmb", 0, 0, 0, 0 },
- {"inmw", 0, 0, 0, 0 },
- {"outmb", 0, 0, 0, 0 },
- {"outmw", 0, 0, 0, 0 },
+ {_T("push r"), 0, 0, 0, 0 },
+ {_T("pop r"), 0, 0, 0, 0 },
+ {_T("chkind"), MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {_T("brkn"), 0, PARAM_UI8, 0, 0, DASMFLAG_STEP_OVER}, /* V25S/V35S only */
+ {_T("repnc"), PREFIX, 0, 0, 0 },
+ {_T("repc"), PREFIX, 0, 0, 0 },
+ {_T("fpo2 0"), 0, 0, 0, 0 }, /* for a coprocessor that was never made */
+ {_T("fpo2 1"), 0, 0, 0, 0 }, /* for a coprocessor that was never made */
+ {_T("push"), 0, PARAM_IMM, 0, 0 },
+ {_T("mul"), MODRM, PARAM_REG16, PARAM_RM16, PARAM_IMM },
+ {_T("push"), 0, PARAM_I8, 0, 0 },
+ {_T("mul"), MODRM, PARAM_REG16, PARAM_RM16, PARAM_I8 },
+ {_T("inmb"), 0, 0, 0, 0 },
+ {_T("inmw"), 0, 0, 0, 0 },
+ {_T("outmb"), 0, 0, 0, 0 },
+ {_T("outmw"), 0, 0, 0, 0 },
// 0x70
- {"bv", 0, PARAM_REL8, 0, 0 },
- {"bnv", 0, PARAM_REL8, 0, 0 },
- {"bc", 0, PARAM_REL8, 0, 0 },
- {"bnc", 0, PARAM_REL8, 0, 0 },
- {"be", 0, PARAM_REL8, 0, 0 },
- {"bne", 0, PARAM_REL8, 0, 0 },
- {"bnh", 0, PARAM_REL8, 0, 0 },
- {"bh", 0, PARAM_REL8, 0, 0 },
- {"bn", 0, PARAM_REL8, 0, 0 },
- {"bp", 0, PARAM_REL8, 0, 0 },
- {"bpe", 0, PARAM_REL8, 0, 0 },
- {"bpo", 0, PARAM_REL8, 0, 0 },
- {"blt", 0, PARAM_REL8, 0, 0 },
- {"bge", 0, PARAM_REL8, 0, 0 },
- {"ble", 0, PARAM_REL8, 0, 0 },
- {"bgt", 0, PARAM_REL8, 0, 0 },
+ {_T("bv"), 0, PARAM_REL8, 0, 0 },
+ {_T("bnv"), 0, PARAM_REL8, 0, 0 },
+ {_T("bc"), 0, PARAM_REL8, 0, 0 },
+ {_T("bnc"), 0, PARAM_REL8, 0, 0 },
+ {_T("be"), 0, PARAM_REL8, 0, 0 },
+ {_T("bne"), 0, PARAM_REL8, 0, 0 },
+ {_T("bnh"), 0, PARAM_REL8, 0, 0 },
+ {_T("bh"), 0, PARAM_REL8, 0, 0 },
+ {_T("bn"), 0, PARAM_REL8, 0, 0 },
+ {_T("bp"), 0, PARAM_REL8, 0, 0 },
+ {_T("bpe"), 0, PARAM_REL8, 0, 0 },
+ {_T("bpo"), 0, PARAM_REL8, 0, 0 },
+ {_T("blt"), 0, PARAM_REL8, 0, 0 },
+ {_T("bge"), 0, PARAM_REL8, 0, 0 },
+ {_T("ble"), 0, PARAM_REL8, 0, 0 },
+ {_T("bgt"), 0, PARAM_REL8, 0, 0 },
// 0x80
- {"immb", GROUP, 0, 0, 0 },
- {"immw", GROUP, 0, 0, 0 },
- {"immb", GROUP, 0, 0, 0 },
- {"immws", GROUP, 0, 0, 0 },
- {"test", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"test", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"xch", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"xch", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"mov", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"mov", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"mov", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"mov", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"mov", MODRM, PARAM_RM16, PARAM_SREG, 0 },
- {"ldea", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"mov", MODRM, PARAM_SREG, PARAM_RM16, 0 },
- {"pop", MODRM, PARAM_RM16, 0, 0 },
+ {_T("immb"), GROUP, 0, 0, 0 },
+ {_T("immw"), GROUP, 0, 0, 0 },
+ {_T("immb"), GROUP, 0, 0, 0 },
+ {_T("immws"), GROUP, 0, 0, 0 },
+ {_T("test"), MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {_T("test"), MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {_T("xch"), MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {_T("xch"), MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {_T("mov"), MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {_T("mov"), MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {_T("mov"), MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {_T("mov"), MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {_T("mov"), MODRM, PARAM_RM16, PARAM_SREG, 0 },
+ {_T("ldea"), MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {_T("mov"), MODRM, PARAM_SREG, PARAM_RM16, 0 },
+ {_T("pop"), MODRM, PARAM_RM16, 0, 0 },
// 0x90
- {"nop", 0, 0, 0, 0 },
- {"xch", 0, PARAM_AW, PARAM_CW, 0 },
- {"xch", 0, PARAM_AW, PARAM_DW, 0 },
- {"xch", 0, PARAM_AW, PARAM_BW, 0 },
- {"xch", 0, PARAM_AW, PARAM_SP, 0 },
- {"xch", 0, PARAM_AW, PARAM_BP, 0 },
- {"xch", 0, PARAM_AW, PARAM_IX, 0 },
- {"xch", 0, PARAM_AW, PARAM_IY, 0 },
- {"cvtbw", 0, 0, 0, 0 },
- {"cvtwl", 0, 0, 0, 0 },
- {"call", 0, PARAM_ADDR, 0, 0, DASMFLAG_STEP_OVER},
- {"poll", 0, 0, 0, 0 },
- {"push psw", 0, 0, 0, 0 },
- {"pop psw", 0, 0, 0, 0 },
- {"mov psw,ah", 0, 0, 0, 0 },
- {"mov ah,psw", 0, 0, 0, 0 },
+ {_T("nop"), 0, 0, 0, 0 },
+ {_T("xch"), 0, PARAM_AW, PARAM_CW, 0 },
+ {_T("xch"), 0, PARAM_AW, PARAM_DW, 0 },
+ {_T("xch"), 0, PARAM_AW, PARAM_BW, 0 },
+ {_T("xch"), 0, PARAM_AW, PARAM_SP, 0 },
+ {_T("xch"), 0, PARAM_AW, PARAM_BP, 0 },
+ {_T("xch"), 0, PARAM_AW, PARAM_IX, 0 },
+ {_T("xch"), 0, PARAM_AW, PARAM_IY, 0 },
+ {_T("cvtbw"), 0, 0, 0, 0 },
+ {_T("cvtwl"), 0, 0, 0, 0 },
+ {_T("call"), 0, PARAM_ADDR, 0, 0, DASMFLAG_STEP_OVER},
+ {_T("poll"), 0, 0, 0, 0 },
+ {_T("push psw"), 0, 0, 0, 0 },
+ {_T("pop psw"), 0, 0, 0, 0 },
+ {_T("mov psw,ah"), 0, 0, 0, 0 },
+ {_T("mov ah,psw"), 0, 0, 0, 0 },
// 0xa0
- {"mov", 0, PARAM_AL, PARAM_MEM_OFFS, 0 },
- {"mov", 0, PARAM_AW, PARAM_MEM_OFFS, 0 },
- {"mov", 0, PARAM_MEM_OFFS, PARAM_AL, 0 },
- {"mov", 0, PARAM_MEM_OFFS, PARAM_AW, 0 },
- {"movbkb", 0, 0, 0, 0 },
- {"movbkw", 0, 0, 0, 0 },
- {"cmpbkb", 0, 0, 0, 0 },
- {"cmpbkw", 0, 0, 0, 0 },
- {"test", 0, PARAM_AL, PARAM_UI8, 0 },
- {"test", 0, PARAM_AW, PARAM_IMM, 0 },
- {"stmb", 0, 0, 0, 0 },
- {"stmw", 0, 0, 0, 0 },
- {"ldmb", 0, 0, 0, 0 },
- {"ldmw", 0, 0, 0, 0 },
- {"cmpmb", 0, 0, 0, 0 },
- {"cmpmw", 0, 0, 0, 0 },
+ {_T("mov"), 0, PARAM_AL, PARAM_MEM_OFFS, 0 },
+ {_T("mov"), 0, PARAM_AW, PARAM_MEM_OFFS, 0 },
+ {_T("mov"), 0, PARAM_MEM_OFFS, PARAM_AL, 0 },
+ {_T("mov"), 0, PARAM_MEM_OFFS, PARAM_AW, 0 },
+ {_T("movbkb"), 0, 0, 0, 0 },
+ {_T("movbkw"), 0, 0, 0, 0 },
+ {_T("cmpbkb"), 0, 0, 0, 0 },
+ {_T("cmpbkw"), 0, 0, 0, 0 },
+ {_T("test"), 0, PARAM_AL, PARAM_UI8, 0 },
+ {_T("test"), 0, PARAM_AW, PARAM_IMM, 0 },
+ {_T("stmb"), 0, 0, 0, 0 },
+ {_T("stmw"), 0, 0, 0, 0 },
+ {_T("ldmb"), 0, 0, 0, 0 },
+ {_T("ldmw"), 0, 0, 0, 0 },
+ {_T("cmpmb"), 0, 0, 0, 0 },
+ {_T("cmpmw"), 0, 0, 0, 0 },
// 0xb0
- {"mov", 0, PARAM_AL, PARAM_UI8, 0 },
- {"mov", 0, PARAM_CL, PARAM_UI8, 0 },
- {"mov", 0, PARAM_DL, PARAM_UI8, 0 },
- {"mov", 0, PARAM_BL, PARAM_UI8, 0 },
- {"mov", 0, PARAM_AH, PARAM_UI8, 0 },
- {"mov", 0, PARAM_CH, PARAM_UI8, 0 },
- {"mov", 0, PARAM_DH, PARAM_UI8, 0 },
- {"mov", 0, PARAM_BH, PARAM_UI8, 0 },
- {"mov", 0, PARAM_AW, PARAM_IMM, 0 },
- {"mov", 0, PARAM_CW, PARAM_IMM, 0 },
- {"mov", 0, PARAM_DW, PARAM_IMM, 0 },
- {"mov", 0, PARAM_BW, PARAM_IMM, 0 },
- {"mov", 0, PARAM_SP, PARAM_IMM, 0 },
- {"mov", 0, PARAM_BP, PARAM_IMM, 0 },
- {"mov", 0, PARAM_IX, PARAM_IMM, 0 },
- {"mov", 0, PARAM_IY, PARAM_IMM, 0 },
+ {_T("mov"), 0, PARAM_AL, PARAM_UI8, 0 },
+ {_T("mov"), 0, PARAM_CL, PARAM_UI8, 0 },
+ {_T("mov"), 0, PARAM_DL, PARAM_UI8, 0 },
+ {_T("mov"), 0, PARAM_BL, PARAM_UI8, 0 },
+ {_T("mov"), 0, PARAM_AH, PARAM_UI8, 0 },
+ {_T("mov"), 0, PARAM_CH, PARAM_UI8, 0 },
+ {_T("mov"), 0, PARAM_DH, PARAM_UI8, 0 },
+ {_T("mov"), 0, PARAM_BH, PARAM_UI8, 0 },
+ {_T("mov"), 0, PARAM_AW, PARAM_IMM, 0 },
+ {_T("mov"), 0, PARAM_CW, PARAM_IMM, 0 },
+ {_T("mov"), 0, PARAM_DW, PARAM_IMM, 0 },
+ {_T("mov"), 0, PARAM_BW, PARAM_IMM, 0 },
+ {_T("mov"), 0, PARAM_SP, PARAM_IMM, 0 },
+ {_T("mov"), 0, PARAM_BP, PARAM_IMM, 0 },
+ {_T("mov"), 0, PARAM_IX, PARAM_IMM, 0 },
+ {_T("mov"), 0, PARAM_IY, PARAM_IMM, 0 },
// 0xc0
- {"shiftbi", GROUP, 0, 0, 0 },
- {"shiftwi", GROUP, 0, 0, 0 },
- {"ret", 0, PARAM_I16, 0, 0, DASMFLAG_STEP_OUT},
- {"ret", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
- {"mov ds1,", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"mov ds0,", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"mov", MODRM, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"mov", MODRM, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"prepare", 0, PARAM_I16, PARAM_UI8, 0 },
- {"dispose", 0, 0, 0, 0 },
- {"retf", 0, PARAM_I16, 0, 0, DASMFLAG_STEP_OUT},
- {"retf", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
- {"brk 3", 0, 0, 0, 0, DASMFLAG_STEP_OVER},
- {"brk", 0, PARAM_UI8, 0, 0, DASMFLAG_STEP_OVER},
- {"brkv", 0, 0, 0, 0 },
- {"reti", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
+ {_T("shiftbi"), GROUP, 0, 0, 0 },
+ {_T("shiftwi"), GROUP, 0, 0, 0 },
+ {_T("ret"), 0, PARAM_I16, 0, 0, DASMFLAG_STEP_OUT},
+ {_T("ret"), 0, 0, 0, 0, DASMFLAG_STEP_OUT},
+ {_T("mov ds1,"), MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {_T("mov ds0,"), MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {_T("mov"), MODRM, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {_T("mov"), MODRM, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {_T("prepare"), 0, PARAM_I16, PARAM_UI8, 0 },
+ {_T("dispose"), 0, 0, 0, 0 },
+ {_T("retf"), 0, PARAM_I16, 0, 0, DASMFLAG_STEP_OUT},
+ {_T("retf"), 0, 0, 0, 0, DASMFLAG_STEP_OUT},
+ {_T("brk 3"), 0, 0, 0, 0, DASMFLAG_STEP_OVER},
+ {_T("brk"), 0, PARAM_UI8, 0, 0, DASMFLAG_STEP_OVER},
+ {_T("brkv"), 0, 0, 0, 0 },
+ {_T("reti"), 0, 0, 0, 0, DASMFLAG_STEP_OUT},
// 0xd0
- {"shiftb", GROUP, 0, 0, 0 },
- {"shiftw", GROUP, 0, 0, 0 },
- {"shiftbv", GROUP, 0, 0, 0 },
- {"shiftwv", GROUP, 0, 0, 0 },
- {"cvtbd", 0, PARAM_I8, 0, 0 },
- {"cvtdb", 0, PARAM_I8, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"trans", 0, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
+ {_T("shiftb"), GROUP, 0, 0, 0 },
+ {_T("shiftw"), GROUP, 0, 0, 0 },
+ {_T("shiftbv"), GROUP, 0, 0, 0 },
+ {_T("shiftwv"), GROUP, 0, 0, 0 },
+ {_T("cvtbd"), 0, PARAM_I8, 0, 0 },
+ {_T("cvtdb"), 0, PARAM_I8, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("trans"), 0, 0, 0, 0 },
+ {_T("escape"), FPU, 0, 0, 0 },
+ {_T("escape"), FPU, 0, 0, 0 },
+ {_T("escape"), FPU, 0, 0, 0 },
+ {_T("escape"), FPU, 0, 0, 0 },
+ {_T("escape"), FPU, 0, 0, 0 },
+ {_T("escape"), FPU, 0, 0, 0 },
+ {_T("escape"), FPU, 0, 0, 0 },
+ {_T("escape"), FPU, 0, 0, 0 },
// 0xe0
- {"dbnzne", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
- {"dbnze", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
- {"dbnz", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
- {"bcwz", 0, PARAM_REL8, 0, 0 },
- {"in", 0, PARAM_AL, PARAM_UI8, 0 },
- {"in", 0, PARAM_AW, PARAM_UI8, 0 },
- {"out", 0, PARAM_UI8, PARAM_AL, 0 },
- {"out", 0, PARAM_UI8, PARAM_AW, 0 },
- {"call", 0, PARAM_REL16, 0, 0, DASMFLAG_STEP_OVER},
- {"br", 0, PARAM_REL16, 0, 0 },
- {"br", 0, PARAM_ADDR, 0, 0 },
- {"br", 0, PARAM_REL8, 0, 0 },
- {"in", 0, PARAM_AL, PARAM_DW, 0 },
- {"in", 0, PARAM_AW, PARAM_DW, 0 },
- {"out", 0, PARAM_DW, PARAM_AL, 0 },
- {"out", 0, PARAM_DW, PARAM_AW, 0 },
+ {_T("dbnzne"), 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
+ {_T("dbnze"), 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
+ {_T("dbnz"), 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
+ {_T("bcwz"), 0, PARAM_REL8, 0, 0 },
+ {_T("in"), 0, PARAM_AL, PARAM_UI8, 0 },
+ {_T("in"), 0, PARAM_AW, PARAM_UI8, 0 },
+ {_T("out"), 0, PARAM_UI8, PARAM_AL, 0 },
+ {_T("out"), 0, PARAM_UI8, PARAM_AW, 0 },
+ {_T("call"), 0, PARAM_REL16, 0, 0, DASMFLAG_STEP_OVER},
+ {_T("br"), 0, PARAM_REL16, 0, 0 },
+ {_T("br"), 0, PARAM_ADDR, 0, 0 },
+ {_T("br"), 0, PARAM_REL8, 0, 0 },
+ {_T("in"), 0, PARAM_AL, PARAM_DW, 0 },
+ {_T("in"), 0, PARAM_AW, PARAM_DW, 0 },
+ {_T("out"), 0, PARAM_DW, PARAM_AL, 0 },
+ {_T("out"), 0, PARAM_DW, PARAM_AW, 0 },
// 0xf0
- {"buslock", PREFIX, 0, 0, 0 },
- {"brks", 0, PARAM_UI8, 0, 0, DASMFLAG_STEP_OVER}, /* V25S/V35S only */
- {"repne", PREFIX, 0, 0, 0 },
- {"rep", PREFIX, 0, 0, 0 },
- {"halt", 0, 0, 0, 0 },
- {"not1 cy", 0, 0, 0, 0 },
- {"group1b", GROUP, 0, 0, 0 },
- {"group1w", GROUP, 0, 0, 0 },
- {"clr1 cy", 0, 0, 0, 0 },
- {"set1 cy", 0, 0, 0, 0 },
- {"di", 0, 0, 0, 0 },
- {"ei", 0, 0, 0, 0 },
- {"clr1 dir", 0, 0, 0, 0 },
- {"set1 dir", 0, 0, 0, 0 },
- {"group2b", GROUP, 0, 0, 0 },
- {"group2w", GROUP, 0, 0, 0 }
+ {_T("buslock"), PREFIX, 0, 0, 0 },
+ {_T("brks"), 0, PARAM_UI8, 0, 0, DASMFLAG_STEP_OVER}, /* V25S/V35S only */
+ {_T("repne"), PREFIX, 0, 0, 0 },
+ {_T("rep"), PREFIX, 0, 0, 0 },
+ {_T("halt"), 0, 0, 0, 0 },
+ {_T("not1 cy"), 0, 0, 0, 0 },
+ {_T("group1b"), GROUP, 0, 0, 0 },
+ {_T("group1w"), GROUP, 0, 0, 0 },
+ {_T("clr1 cy"), 0, 0, 0, 0 },
+ {_T("set1 cy"), 0, 0, 0, 0 },
+ {_T("di"), 0, 0, 0, 0 },
+ {_T("ei"), 0, 0, 0, 0 },
+ {_T("clr1 dir"), 0, 0, 0, 0 },
+ {_T("set1 dir"), 0, 0, 0, 0 },
+ {_T("group2b"), GROUP, 0, 0, 0 },
+ {_T("group2w"), GROUP, 0, 0, 0 }
};
static const I386_OPCODE necv_opcode_table2[256] =
{
// 0x00
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
// 0x10
- {"test1", MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
- {"test1", MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
- {"clr1", MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
- {"clr1", MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
- {"set1", MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
- {"set1", MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
- {"not1", MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
- {"not1", MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
- {"test1", MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
- {"test1", MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
- {"clr1", MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
- {"clr1", MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
- {"set1", MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
- {"set1", MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
- {"not1", MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
- {"not1", MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
+ {_T("test1"), MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
+ {_T("test1"), MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
+ {_T("clr1"), MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
+ {_T("clr1"), MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
+ {_T("set1"), MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
+ {_T("set1"), MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
+ {_T("not1"), MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
+ {_T("not1"), MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
+ {_T("test1"), MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
+ {_T("test1"), MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
+ {_T("clr1"), MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
+ {_T("clr1"), MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
+ {_T("set1"), MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
+ {_T("set1"), MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
+ {_T("not1"), MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
+ {_T("not1"), MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
// 0x20
- {"add4s", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"sub4s", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"movspa", 0, 0, 0, 0 }, /* V25/V35 only */
- {"cmp4s", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"rol4", MODRM, PARAM_RMPTR8, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"ror4", MODRM, PARAM_RMPTR8, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"brkcs", MODRM, PARAM_REG2_16, 0, 0, DASMFLAG_STEP_OVER}, /* V25/V35 only */
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {_T("add4s"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("sub4s"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("movspa"), 0, 0, 0, 0 }, /* V25/V35 only */
+ {_T("cmp4s"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("rol4"), MODRM, PARAM_RMPTR8, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("ror4"), MODRM, PARAM_RMPTR8, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("brkcs"), MODRM, PARAM_REG2_16, 0, 0, DASMFLAG_STEP_OVER}, /* V25/V35 only */
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
// 0x30
- {"???", 0, 0, 0, 0 },
- {"ins", MODRM, PARAM_REG2_8, PARAM_REG8, 0 },
- {"???", 0, 0, 0, 0 },
- {"ext", MODRM, PARAM_REG2_8, PARAM_REG8, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"ins", MODRM, PARAM_REG2_8, PARAM_I4, 0 },
- {"???", 0, 0, 0, 0 },
- {"ext", MODRM, PARAM_REG2_8, PARAM_I4, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("ins"), MODRM, PARAM_REG2_8, PARAM_REG8, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("ext"), MODRM, PARAM_REG2_8, PARAM_REG8, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("ins"), MODRM, PARAM_REG2_8, PARAM_I4, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("ext"), MODRM, PARAM_REG2_8, PARAM_I4, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
// 0x40
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
// 0x50
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
// 0x60
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
// 0x70
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
// 0x80
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
// 0x90
- {"???", 0, 0, 0, 0 },
- {"retrbi", 0, 0, 0, 0 }, /* V25/V35 only */
- {"fint", 0, 0, 0, 0 }, /* V25/V35 only */
- {"???", 0, 0, 0, 0 },
- {"tsksw", MODRM, PARAM_REG2_16, 0, 0 }, /* V25/V35 only */
- {"movspb", MODRM, PARAM_REG2_16, 0, 0 }, /* V25/V35 only */
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"btclr", 0, PARAM_SFREG, PARAM_I3, PARAM_REL8 }, /* V25/V35 only */
- {"???", 0, 0, 0, 0 },
- {"stop", 0, 0, 0, 0 }, /* V25/V35 only */
- {"???", 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("retrbi"), 0, 0, 0, 0 }, /* V25/V35 only */
+ {_T("fint"), 0, 0, 0, 0 }, /* V25/V35 only */
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("tsksw"), MODRM, PARAM_REG2_16, 0, 0 }, /* V25/V35 only */
+ {_T("movspb"), MODRM, PARAM_REG2_16, 0, 0 }, /* V25/V35 only */
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("btclr"), 0, PARAM_SFREG, PARAM_I3, PARAM_REL8 }, /* V25/V35 only */
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("stop"), 0, 0, 0, 0 }, /* V25/V35 only */
+ {_T("???"), 0, 0, 0, 0 },
// 0xa0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
// 0xb0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
// 0xc0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
// 0xd0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
// 0xe0
- {"brkxa", 0, PARAM_UI8, 0, 0 }, /* V33,53 only */
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {_T("brkxa"), 0, PARAM_UI8, 0, 0 }, /* V33,53 only */
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
// 0xf0
- {"retxa", 0, PARAM_UI8, 0, 0 }, /* V33,53 only */
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"brkem", 0, PARAM_UI8, 0, 0 } /* V20,30,40,50 only */
+ {_T("retxa"), 0, PARAM_UI8, 0, 0 }, /* V33,53 only */
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("brkem"), 0, PARAM_UI8, 0, 0 } /* V20,30,40,50 only */
};
static const I386_OPCODE immb_table[8] =
{
- {"add", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"or", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"addc", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"subc", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"and", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"sub", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"xor", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"cmp", 0, PARAM_RMPTR8, PARAM_UI8, 0 }
+ {_T("add"), 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {_T("or"), 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {_T("addc"), 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {_T("subc"), 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {_T("and"), 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {_T("sub"), 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {_T("xor"), 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {_T("cmp"), 0, PARAM_RMPTR8, PARAM_UI8, 0 }
};
static const I386_OPCODE immw_table[8] =
{
- {"add", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"or", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"addc", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"subc", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"and", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"sub", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"xor", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"cmp", 0, PARAM_RMPTR16, PARAM_IMM, 0 }
+ {_T("add"), 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {_T("or"), 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {_T("addc"), 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {_T("subc"), 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {_T("and"), 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {_T("sub"), 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {_T("xor"), 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {_T("cmp"), 0, PARAM_RMPTR16, PARAM_IMM, 0 }
};
static const I386_OPCODE immws_table[8] =
{
- {"add", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"or", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"addc", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"subc", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"and", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"sub", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"xor", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"cmp", 0, PARAM_RMPTR16, PARAM_I8, 0 }
+ {_T("add"), 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {_T("or"), 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {_T("addc"), 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {_T("subc"), 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {_T("and"), 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {_T("sub"), 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {_T("xor"), 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {_T("cmp"), 0, PARAM_RMPTR16, PARAM_I8, 0 }
};
static const I386_OPCODE shiftbi_table[8] =
{
- {"rol", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"ror", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"rolc", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"rorc", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"shl", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"shr", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"???", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"shra", 0, PARAM_RMPTR8, PARAM_I8, 0 }
+ {_T("rol"), 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {_T("ror"), 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {_T("rolc"), 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {_T("rorc"), 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {_T("shl"), 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {_T("shr"), 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {_T("???"), 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {_T("shra"), 0, PARAM_RMPTR8, PARAM_I8, 0 }
};
static const I386_OPCODE shiftwi_table[8] =
{
- {"rol", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"ror", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"rolc", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"rorc", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"shl", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"shr", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"???", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"shra", 0, PARAM_RMPTR16, PARAM_I8, 0 }
+ {_T("rol"), 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {_T("ror"), 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {_T("rolc"), 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {_T("rorc"), 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {_T("shl"), 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {_T("shr"), 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {_T("???"), 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {_T("shra"), 0, PARAM_RMPTR16, PARAM_I8, 0 }
};
static const I386_OPCODE shiftb_table[8] =
{
- {"rol", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"ror", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"rolc", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"rorc", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"shl", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"shr", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"???", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"shra", 0, PARAM_RMPTR8, PARAM_1, 0 }
+ {_T("rol"), 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {_T("ror"), 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {_T("rolc"), 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {_T("rorc"), 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {_T("shl"), 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {_T("shr"), 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {_T("???"), 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {_T("shra"), 0, PARAM_RMPTR8, PARAM_1, 0 }
};
static const I386_OPCODE shiftw_table[8] =
{
- {"rol", 0, PARAM_RMPTR16, PARAM_1, 0 },
- {"ror", 0, PARAM_RMPTR16, PARAM_1, 0 },
- {"rolc", 0, PARAM_RMPTR16, PARAM_1, 0 },
- {"rorc", 0, PARAM_RMPTR16, PARAM_1, 0 },
- {"shl", 0, PARAM_RMPTR16, PARAM_1, 0 },
- {"shr", 0, PARAM_RMPTR16, PARAM_1, 0 },
- {"???", 0, PARAM_RMPTR16, PARAM_1, 0 },
- {"shra", 0, PARAM_RMPTR16, PARAM_1, 0 }
+ {_T("rol"), 0, PARAM_RMPTR16, PARAM_1, 0 },
+ {_T("ror"), 0, PARAM_RMPTR16, PARAM_1, 0 },
+ {_T("rolc"), 0, PARAM_RMPTR16, PARAM_1, 0 },
+ {_T("rorc"), 0, PARAM_RMPTR16, PARAM_1, 0 },
+ {_T("shl"), 0, PARAM_RMPTR16, PARAM_1, 0 },
+ {_T("shr"), 0, PARAM_RMPTR16, PARAM_1, 0 },
+ {_T("???"), 0, PARAM_RMPTR16, PARAM_1, 0 },
+ {_T("shra"), 0, PARAM_RMPTR16, PARAM_1, 0 }
};
static const I386_OPCODE shiftbv_table[8] =
{
- {"rol", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"ror", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"rolc", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"rorc", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"shl", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"shr", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"???", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"shra", 0, PARAM_RMPTR8, PARAM_CL, 0 }
+ {_T("rol"), 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {_T("ror"), 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {_T("rolc"), 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {_T("rorc"), 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {_T("shl"), 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {_T("shr"), 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {_T("???"), 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {_T("shra"), 0, PARAM_RMPTR8, PARAM_CL, 0 }
};
static const I386_OPCODE shiftwv_table[8] =
{
- {"rol", 0, PARAM_RMPTR16, PARAM_CL, 0 },
- {"ror", 0, PARAM_RMPTR16, PARAM_CL, 0 },
- {"rolc", 0, PARAM_RMPTR16, PARAM_CL, 0 },
- {"rorc", 0, PARAM_RMPTR16, PARAM_CL, 0 },
- {"shl", 0, PARAM_RMPTR16, PARAM_CL, 0 },
- {"shr", 0, PARAM_RMPTR16, PARAM_CL, 0 },
- {"???", 0, PARAM_RMPTR16, PARAM_CL, 0 },
- {"shra", 0, PARAM_RMPTR16, PARAM_CL, 0 }
+ {_T("rol"), 0, PARAM_RMPTR16, PARAM_CL, 0 },
+ {_T("ror"), 0, PARAM_RMPTR16, PARAM_CL, 0 },
+ {_T("rolc"), 0, PARAM_RMPTR16, PARAM_CL, 0 },
+ {_T("rorc"), 0, PARAM_RMPTR16, PARAM_CL, 0 },
+ {_T("shl"), 0, PARAM_RMPTR16, PARAM_CL, 0 },
+ {_T("shr"), 0, PARAM_RMPTR16, PARAM_CL, 0 },
+ {_T("???"), 0, PARAM_RMPTR16, PARAM_CL, 0 },
+ {_T("shra"), 0, PARAM_RMPTR16, PARAM_CL, 0 }
};
static const I386_OPCODE group1b_table[8] =
{
- {"test", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"???", 0, 0, 0, 0 },
- {"not", 0, PARAM_RMPTR8, 0, 0 },
- {"neg", 0, PARAM_RMPTR8, 0, 0 },
- {"mulu", 0, PARAM_RMPTR8, 0, 0 },
- {"mul", 0, PARAM_RMPTR8, 0, 0 },
- {"divu", 0, PARAM_RMPTR8, 0, 0 },
- {"div", 0, PARAM_RMPTR8, 0, 0 }
+ {_T("test"), 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("not"), 0, PARAM_RMPTR8, 0, 0 },
+ {_T("neg"), 0, PARAM_RMPTR8, 0, 0 },
+ {_T("mulu"), 0, PARAM_RMPTR8, 0, 0 },
+ {_T("mul"), 0, PARAM_RMPTR8, 0, 0 },
+ {_T("divu"), 0, PARAM_RMPTR8, 0, 0 },
+ {_T("div"), 0, PARAM_RMPTR8, 0, 0 }
};
static const I386_OPCODE group1w_table[8] =
{
- {"test", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"???", 0, 0, 0, 0 },
- {"not", 0, PARAM_RMPTR16, 0, 0 },
- {"neg", 0, PARAM_RMPTR16, 0, 0 },
- {"mulu", 0, PARAM_RMPTR16, 0, 0 },
- {"mul", 0, PARAM_RMPTR16, 0, 0 },
- {"divu", 0, PARAM_RMPTR16, 0, 0 },
- {"div", 0, PARAM_RMPTR16, 0, 0 }
+ {_T("test"), 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("not"), 0, PARAM_RMPTR16, 0, 0 },
+ {_T("neg"), 0, PARAM_RMPTR16, 0, 0 },
+ {_T("mulu"), 0, PARAM_RMPTR16, 0, 0 },
+ {_T("mul"), 0, PARAM_RMPTR16, 0, 0 },
+ {_T("divu"), 0, PARAM_RMPTR16, 0, 0 },
+ {_T("div"), 0, PARAM_RMPTR16, 0, 0 }
};
static const I386_OPCODE group2b_table[8] =
{
- {"inc", 0, PARAM_RMPTR8, 0, 0 },
- {"dec", 0, PARAM_RMPTR8, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 }
+ {_T("inc"), 0, PARAM_RMPTR8, 0, 0 },
+ {_T("dec"), 0, PARAM_RMPTR8, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 }
};
static const I386_OPCODE group2w_table[8] =
{
- {"inc", 0, PARAM_RMPTR16, 0, 0 },
- {"dec", 0, PARAM_RMPTR16, 0, 0 },
- {"call", 0, PARAM_RMPTR16, 0, 0, DASMFLAG_STEP_OVER},
- {"call far ptr ",0, PARAM_RM16, 0, 0, DASMFLAG_STEP_OVER},
- {"br", 0, PARAM_RMPTR16, 0, 0 },
- {"br far ptr ",0, PARAM_RM16, 0, 0 },
- {"push", 0, PARAM_RMPTR16, 0, 0 },
- {"???", 0, 0, 0, 0 }
+ {_T("inc"), 0, PARAM_RMPTR16, 0, 0 },
+ {_T("dec"), 0, PARAM_RMPTR16, 0, 0 },
+ {_T("call"), 0, PARAM_RMPTR16, 0, 0, DASMFLAG_STEP_OVER},
+ {_T("call far ptr "),0, PARAM_RM16, 0, 0, DASMFLAG_STEP_OVER},
+ {_T("br"), 0, PARAM_RMPTR16, 0, 0 },
+ {_T("br far ptr "),0, PARAM_RM16, 0, 0 },
+ {_T("push"), 0, PARAM_RMPTR16, 0, 0 },
+ {_T("???"), 0, 0, 0, 0 }
};
static const GROUP_OP group_op_table[] =
{
- { "immb", immb_table },
- { "immw", immw_table },
- { "immws", immws_table },
- { "shiftbi", shiftbi_table },
- { "shiftwi", shiftwi_table },
- { "shiftb", shiftb_table },
- { "shiftw", shiftw_table },
- { "shiftbv", shiftbv_table },
- { "shiftwv", shiftwv_table },
- { "group1b", group1b_table },
- { "group1w", group1w_table },
- { "group2b", group2b_table },
- { "group2w", group2w_table }
+ {_T("immb"), immb_table },
+ {_T("immw"), immw_table },
+ {_T("immws"), immws_table },
+ {_T("shiftbi"), shiftbi_table },
+ {_T("shiftwi"), shiftwi_table },
+ {_T("shiftb"), shiftb_table },
+ {_T("shiftw"), shiftw_table },
+ {_T("shiftbv"), shiftbv_table },
+ {_T("shiftwv"), shiftwv_table },
+ {_T("group1b"), group1b_table },
+ {_T("group1w"), group1w_table },
+ {_T("group2b"), group2b_table },
+ {_T("group2w"), group2w_table }
};
-static const char *const nec_reg[8] = { "aw", "cw", "dw", "bw", "sp", "bp", "ix", "iy" };
-static const char *const nec_reg8[8] = { "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh" };
-static const char *const nec_sreg[8] = { "ds1", "ps", "ss", "ds0", "???", "???", "???", "???" };
-static const char *const nec_sfreg[256] =
+static const _TCHAR *const nec_reg[8] = { _T("aw"), _T("cw"), _T("dw"), _T("bw"), _T("sp"), _T("bp"), _T("ix"), _T("iy") };
+static const _TCHAR *const nec_reg8[8] = { _T("al"), _T("cl"), _T("dl"), _T("bl"), _T("ah"), _T("ch"), _T("dh"), _T("bh") };
+static const _TCHAR *const nec_sreg[8] = { _T("ds1"), _T("ps"), _T("ss"), _T("ds0"), _T("???"), _T("???"), _T("???"), _T("???") };
+static const _TCHAR *const nec_sfreg[256] =
{
/* 0x00 */
- "p0", "pm0", "pmc0", "???", "???", "???", "???", "???",
- "p1", "pm1", "pmc1", "???", "???", "???", "???", "???",
+ _T("p0"), _T("pm0"), _T("pmc0"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
+ _T("p1"), _T("pm1"), _T("pmc1"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
/* 0x10 */
- "p2", "pm2", "pmc2", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
+ _T("p2"), _T("pm2"), _T("pmc2"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
+ _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
/* 0x20 */
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
+ _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
+ _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
/* 0x30 */
- "???", "???", "???", "???", "???", "???", "???", "???",
- "pt", "???", "???", "pmt", "???", "???", "???", "???",
+ _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
+ _T("pt"), _T("???"), _T("???"), _T("pmt"), _T("???"), _T("???"), _T("???"), _T("???"),
/* 0x40 */
- "intm", "???", "???", "???", "ems0", "ems1", "ems2", "???",
- "???", "???", "???", "???", "exic0","exic1","exic2","???",
+ _T("intm"), _T("???"), _T("???"), _T("???"), _T("ems0"), _T("ems1"), _T("ems2"), _T("???"),
+ _T("???"), _T("???"), _T("???"), _T("???"), _T("exic0"), _T("exic1"), _T("exic2"), _T("???"),
/* 0x50 */
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
+ _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
+ _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
/* 0x60 */
- "rxb0", "???", "txb0", "???", "???", "srms0","stms0","???",
- "scm0", "scc0", "brg0", "scs0", "seic0","sric0","stic0","???",
+ _T("rxb0"), _T("???"), _T("txb0"), _T("???"), _T("???"), _T("srms0"), _T("stms0"), _T("???"),
+ _T("scm0"), _T("scc0"), _T("brg0"), _T("scs0"), _T("seic0"), _T("sric0"), _T("stic0"), _T("???"),
/* 0x70 */
- "rxb1", "???", "txb1", "???", "???", "srms1","stms1","???",
- "scm1", "scc1", "brg1", "scs1", "seic1","sric1","stic1","???",
+ _T("rxb1"), _T("???"), _T("txb1"), _T("???"), _T("???"), _T("srms1"), _T("stms1"), _T("???"),
+ _T("scm1"), _T("scc1"), _T("brg1"), _T("scs1"), _T("seic1"), _T("sric1"), _T("stic1"), _T("???"),
/* 0x80 */
- "tm0", "???", "md0", "???", "???", "???", "???", "???",
- "tm1", "???", "md1", "???", "???", "???", "???", "???",
+ _T("tm0"), _T("???"), _T("md0"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
+ _T("tm1"), _T("???"), _T("md1"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
/* 0x90 */
- "tmc0", "tmc1", "???", "???", "tmms0","tmms1","tmms2","???",
- "???", "???", "???", "???", "tmic0","tmic1","tmic2","???",
+ _T("tmc0"), _T("tmc1"), _T("???"), _T("???"), _T("tmms0"), _T("tmms1"), _T("tmms2"), _T("???"),
+ _T("???"), _T("???"), _T("???"), _T("???"), _T("tmic0"), _T("tmic1"), _T("tmic2"), _T("???"),
/* 0xa0 */
- "dmac0","dmam0","dmac1","dmam1","???", "???", "???", "???",
- "???", "???", "???", "???", "dic0", "dic1", "???", "???",
+ _T("dmac0"), _T("dmam0"), _T("dmac1"), _T("dmam1"), _T("???"), _T("???"), _T("???"), _T("???"),
+ _T("???"), _T("???"), _T("???"), _T("???"), _T("dic0"), _T("dic1"), _T("???"), _T("???"),
/* 0xb0 */
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
+ _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
+ _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
/* 0xc0 */
- "sar0l","sar0m","sar0h","???", "dar0l","dar0m","dar0h","???",
- "tc0l", "tc0h", "???", "???", "???", "???", "???", "???",
+ _T("sar0l"), _T("sar0m"), _T("sar0h"), _T("???"), _T("dar0l"), _T("dar0m"), _T("dar0h"), _T("???"),
+ _T("tc0l"), _T("tc0h"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
/* 0xd0 */
- "sar1l","sar1m","sar1h","???", "dar1l","dar1m","dar1h","???",
- "tc1l", "tc1h", "???", "???", "???", "???", "???", "???",
+ _T("sar1l"), _T("sar1m"), _T("sar1h"), _T("???"), _T("dar1l"), _T("dar1m"), _T("dar1h"), _T("???"),
+ _T("tc1l"), _T("tc1h"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
/* 0xe0 */
- "stbc", "rfm", "???", "???", "???", "???", "???", "???",
- "wtc", "???", "flag", "prc", "tbic", "???", "???", "irqs",
+ _T("stbc"), _T("rfm"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
+ _T("wtc"), _T("???"), _T("flag"), _T("prc"), _T("tbic"), _T("???"), _T("???"), _T("irqs"),
/* 0xf0 */
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "ispr", "???", "???", "idb"
+ _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"), _T("???"),
+ _T("???"), _T("???"), _T("???"), _T("???"), _T("ispr"), _T("???"), _T("???"), _T("idb")
};
static UINT32 pc;
static UINT8 modrm;
static UINT32 segment;
static offs_t dasm_flags;
-static char modrm_string[256];
+static _TCHAR modrm_string[256];
#define MODRM_REG1 ((modrm >> 3) & 0x7)
#define MODRM_REG2 (modrm & 0x7)
return d;
}
-static char *hexstring(UINT32 value, int digits)
+static _TCHAR *hexstring(UINT32 value, int digits)
{
- static char buffer[20];
- buffer[0] = '0';
+ static _TCHAR buffer[20];
+ buffer[0] = _T('0');
if (digits) {
- sprintf(&buffer[1], "%0*Xh", digits, value);
+ _stprintf(&buffer[1], _T("%0*Xh"), digits, value);
} else {
- sprintf(&buffer[1], "%Xh", value);
+ _stprintf(&buffer[1], _T("%Xh"), value);
}
- return (buffer[1] >= '0' && buffer[1] <= '9') ? &buffer[1] : &buffer[0];
+ return (buffer[1] >= _T('0') && buffer[1] <= _T('9')) ? &buffer[1] : &buffer[0];
}
-static char *shexstring(UINT32 value, int digits, int always)
+static _TCHAR *shexstring(UINT32 value, int digits, int always)
{
- static char buffer[20];
+ static _TCHAR buffer[20];
if (value >= 0x80000000) {
- sprintf(buffer, "-%s", hexstring(-value, digits));
+ _stprintf(buffer, _T("-%s"), hexstring(-value, digits));
} else if (always) {
- sprintf(buffer, "+%s", hexstring(value, digits));
+ _stprintf(buffer, _T("+%s"), hexstring(value, digits));
} else {
return hexstring(value, digits);
}
return buffer;
}
-static void handle_modrm(char* s)
+static void handle_modrm(_TCHAR* s)
{
INT8 disp8;
INT16 disp16;
switch(segment)
{
- case SEG_PS: s += sprintf( s, "ps:" ); break;
- case SEG_DS0: s += sprintf( s, "ds0:" ); break;
- case SEG_DS1: s += sprintf( s, "ds1:" ); break;
- case SEG_SS: s += sprintf( s, "ss:" ); break;
+ case SEG_PS: s += _stprintf( s, _T("ps:") ); break;
+ case SEG_DS0: s += _stprintf( s, _T("ds0:") ); break;
+ case SEG_DS1: s += _stprintf( s, _T("ds1:") ); break;
+ case SEG_SS: s += _stprintf( s, _T("ss:") ); break;
}
- s += sprintf( s, "[" );
+ s += _stprintf( s, _T("[") );
switch( rm )
{
- case 0: s += sprintf( s, "bw+ix" ); break;
- case 1: s += sprintf( s, "bw+iy" ); break;
- case 2: s += sprintf( s, "bp+ix" ); break;
- case 3: s += sprintf( s, "bp+iy" ); break;
- case 4: s += sprintf( s, "ix" ); break;
- case 5: s += sprintf( s, "iy" ); break;
+ case 0: s += _stprintf( s, _T("bw+ix") ); break;
+ case 1: s += _stprintf( s, _T("bw+iy") ); break;
+ case 2: s += _stprintf( s, _T("bp+ix") ); break;
+ case 3: s += _stprintf( s, _T("bp+iy") ); break;
+ case 4: s += _stprintf( s, _T("ix") ); break;
+ case 5: s += _stprintf( s, _T("iy") ); break;
case 6:
if( mod == 0 ) {
disp16 = FETCHD16();
- s += sprintf( s, "%s", hexstring((unsigned) (UINT16) disp16, 0) );
+ s += _stprintf( s, _T("%s"), hexstring((unsigned) (UINT16) disp16, 0) );
} else {
- s += sprintf( s, "bp" );
+ s += _stprintf( s, _T("bp") );
}
break;
- case 7: s += sprintf( s, "bw" ); break;
+ case 7: s += _stprintf( s, _T("bw") ); break;
}
if( mod == 1 ) {
disp8 = FETCHD();
- s += sprintf( s, "%s", shexstring((INT32)disp8, 0, TRUE) );
+ s += _stprintf( s, _T("%s"), shexstring((INT32)disp8, 0, TRUE) );
} else if( mod == 2 ) {
disp16 = FETCHD16();
- s += sprintf( s, "%s", shexstring((INT32)disp16, 0, TRUE) );
+ s += _stprintf( s, _T("%s"), shexstring((INT32)disp16, 0, TRUE) );
}
- s += sprintf( s, "]" );
+ s += _stprintf( s, _T("]") );
}
-static char* handle_param(char* s, UINT32 param)
+static _TCHAR* handle_param(_TCHAR* s, UINT32 param)
{
UINT8 i8;
UINT16 i16;
switch(param)
{
case PARAM_REG8:
- s += sprintf( s, "%s", nec_reg8[MODRM_REG1] );
+ s += _stprintf( s, _T("%s"), nec_reg8[MODRM_REG1] );
break;
case PARAM_REG16:
- s += sprintf( s, "%s", nec_reg[MODRM_REG1] );
+ s += _stprintf( s, _T("%s"), nec_reg[MODRM_REG1] );
break;
case PARAM_REG2_8:
- s += sprintf( s, "%s", nec_reg8[MODRM_REG2] );
+ s += _stprintf( s, _T("%s"), nec_reg8[MODRM_REG2] );
break;
case PARAM_REG2_16:
- s += sprintf( s, "%s", nec_reg[MODRM_REG2] );
+ s += _stprintf( s, _T("%s"), nec_reg[MODRM_REG2] );
break;
case PARAM_RM8:
case PARAM_RMPTR8:
if( modrm >= 0xc0 ) {
- s += sprintf( s, "%s", nec_reg8[MODRM_REG2] );
+ s += _stprintf( s, _T("%s"), nec_reg8[MODRM_REG2] );
} else {
if (param == PARAM_RMPTR8)
- s += sprintf( s, "byte ptr " );
- s += sprintf( s, "%s", modrm_string );
+ s += _stprintf( s, _T("byte ptr ") );
+ s += _stprintf( s, _T("%s"), modrm_string );
}
break;
case PARAM_RM16:
case PARAM_RMPTR16:
if( modrm >= 0xc0 ) {
- s += sprintf( s, "%s", nec_reg[MODRM_REG2] );
+ s += _stprintf( s, _T("%s"), nec_reg[MODRM_REG2] );
} else {
if (param == PARAM_RMPTR16)
- s += sprintf( s, "word ptr " );
- s += sprintf( s, "%s", modrm_string );
+ s += _stprintf( s, _T("word ptr ") );
+ s += _stprintf( s, _T("%s"), modrm_string );
}
break;
case PARAM_I3:
i8 = FETCHD();
- s += sprintf( s, "%d", i8 & 0x07 );
+ s += _stprintf( s, _T("%d"), i8 & 0x07 );
break;
case PARAM_I4:
i8 = FETCHD();
- s += sprintf( s, "%d", i8 & 0x0f );
+ s += _stprintf( s, _T("%d"), i8 & 0x0f );
break;
case PARAM_I8:
i8 = FETCHD();
- s += sprintf( s, "%s", shexstring((INT8)i8, 0, FALSE) );
+ s += _stprintf( s, _T("%s"), shexstring((INT8)i8, 0, FALSE) );
break;
case PARAM_I16:
i16 = FETCHD16();
- s += sprintf( s, "%s", shexstring((INT16)i16, 0, FALSE) );
+ s += _stprintf( s, _T("%s"), shexstring((INT16)i16, 0, FALSE) );
break;
case PARAM_UI8:
i8 = FETCHD();
- s += sprintf( s, "%s", shexstring((UINT8)i8, 0, FALSE) );
+ s += _stprintf( s, _T("%s"), shexstring((UINT8)i8, 0, FALSE) );
break;
case PARAM_IMM:
i16 = FETCHD16();
- s += sprintf( s, "%s", hexstring(i16, 0) );
+ s += _stprintf( s, _T("%s"), hexstring(i16, 0) );
break;
case PARAM_ADDR:
addr = FETCHD16();
ptr = FETCHD16();
- s += sprintf( s, "%s:", hexstring(ptr, 4) );
- s += sprintf( s, "%s", hexstring(addr, 0) );
+ s += _stprintf( s, _T("%s:"), hexstring(ptr, 4) );
+ s += _stprintf( s, _T("%s"), hexstring(addr, 0) );
break;
case PARAM_REL16:
/* make sure to keep the relative offset within the segment */
d16 = FETCHD16();
- s += sprintf( s, "%s", hexstring((pc & 0xFFFF0000) | ((pc + d16) & 0x0000FFFF), 0) );
+ s += _stprintf( s, _T("%s"), hexstring((pc & 0xFFFF0000) | ((pc + d16) & 0x0000FFFF), 0) );
break;
case PARAM_REL8:
d8 = FETCHD();
- s += sprintf( s, "%s", hexstring(pc + d8, 0) );
+ s += _stprintf( s, _T("%s"), hexstring(pc + d8, 0) );
break;
case PARAM_MEM_OFFS:
switch(segment)
{
- case SEG_PS: s += sprintf( s, "ps:" ); break;
- case SEG_DS0: s += sprintf( s, "ds0:" ); break;
- case SEG_DS1: s += sprintf( s, "ds1:" ); break;
- case SEG_SS: s += sprintf( s, "ss:" ); break;
+ case SEG_PS: s += _stprintf( s, _T("ps:") ); break;
+ case SEG_DS0: s += _stprintf( s, _T("ds0:") ); break;
+ case SEG_DS1: s += _stprintf( s, _T("ds1:") ); break;
+ case SEG_SS: s += _stprintf( s, _T("ss:") ); break;
}
i16 = FETCHD16();
- s += sprintf( s, "[%s]", hexstring(i16, 0) );
+ s += _stprintf( s, _T("[%s]"), hexstring(i16, 0) );
break;
case PARAM_SREG:
- s += sprintf( s, "%s", nec_sreg[MODRM_REG1] );
+ s += _stprintf( s, _T("%s"), nec_sreg[MODRM_REG1] );
break;
case PARAM_SFREG:
i8 = FETCHD();
- s += sprintf( s, "%s", nec_sfreg[i8] );
+ s += _stprintf( s, _T("%s"), nec_sfreg[i8] );
break;
case PARAM_1:
- s += sprintf( s, "1" );
+ s += _stprintf( s, _T("1") );
break;
- case PARAM_AL: s += sprintf( s, "al" ); break;
- case PARAM_CL: s += sprintf( s, "cl" ); break;
- case PARAM_DL: s += sprintf( s, "dl" ); break;
- case PARAM_BL: s += sprintf( s, "bl" ); break;
- case PARAM_AH: s += sprintf( s, "ah" ); break;
- case PARAM_CH: s += sprintf( s, "ch" ); break;
- case PARAM_DH: s += sprintf( s, "dh" ); break;
- case PARAM_BH: s += sprintf( s, "bh" ); break;
-
- case PARAM_AW: s += sprintf( s, "aw" ); break;
- case PARAM_CW: s += sprintf( s, "cw" ); break;
- case PARAM_DW: s += sprintf( s, "dw" ); break;
- case PARAM_BW: s += sprintf( s, "bw" ); break;
- case PARAM_SP: s += sprintf( s, "sp" ); break;
- case PARAM_BP: s += sprintf( s, "bp" ); break;
- case PARAM_IX: s += sprintf( s, "ix" ); break;
- case PARAM_IY: s += sprintf( s, "iy" ); break;
+ case PARAM_AL: s += _stprintf( s, _T("al") ); break;
+ case PARAM_CL: s += _stprintf( s, _T("cl") ); break;
+ case PARAM_DL: s += _stprintf( s, _T("dl") ); break;
+ case PARAM_BL: s += _stprintf( s, _T("bl") ); break;
+ case PARAM_AH: s += _stprintf( s, _T("ah") ); break;
+ case PARAM_CH: s += _stprintf( s, _T("ch") ); break;
+ case PARAM_DH: s += _stprintf( s, _T("dh") ); break;
+ case PARAM_BH: s += _stprintf( s, _T("bh") ); break;
+
+ case PARAM_AW: s += _stprintf( s, _T("aw") ); break;
+ case PARAM_CW: s += _stprintf( s, _T("cw") ); break;
+ case PARAM_DW: s += _stprintf( s, _T("dw") ); break;
+ case PARAM_BW: s += _stprintf( s, _T("bw") ); break;
+ case PARAM_SP: s += _stprintf( s, _T("sp") ); break;
+ case PARAM_BP: s += _stprintf( s, _T("bp") ); break;
+ case PARAM_IX: s += _stprintf( s, _T("ix") ); break;
+ case PARAM_IY: s += _stprintf( s, _T("iy") ); break;
}
return s;
}
-static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
+static void handle_fpu(_TCHAR *s, UINT8 op1, UINT8 op2)
{
switch (op1 & 0x7)
{
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
{
- case 0: sprintf(s, "fadd dword ptr %s", modrm_string); break;
- case 1: sprintf(s, "fmul dword ptr %s", modrm_string); break;
- case 2: sprintf(s, "fcom dword ptr %s", modrm_string); break;
- case 3: sprintf(s, "fcomp dword ptr %s", modrm_string); break;
- case 4: sprintf(s, "fsub dword ptr %s", modrm_string); break;
- case 5: sprintf(s, "fsubr dword ptr %s", modrm_string); break;
- case 6: sprintf(s, "fdiv dword ptr %s", modrm_string); break;
- case 7: sprintf(s, "fdivr dword ptr %s", modrm_string); break;
+ case 0: _stprintf(s, _T("fadd dword ptr %s"), modrm_string); break;
+ case 1: _stprintf(s, _T("fmul dword ptr %s"), modrm_string); break;
+ case 2: _stprintf(s, _T("fcom dword ptr %s"), modrm_string); break;
+ case 3: _stprintf(s, _T("fcomp dword ptr %s"), modrm_string); break;
+ case 4: _stprintf(s, _T("fsub dword ptr %s"), modrm_string); break;
+ case 5: _stprintf(s, _T("fsubr dword ptr %s"), modrm_string); break;
+ case 6: _stprintf(s, _T("fdiv dword ptr %s"), modrm_string); break;
+ case 7: _stprintf(s, _T("fdivr dword ptr %s"), modrm_string); break;
}
} else {
switch ((op2 >> 3) & 0x7)
{
- case 0: sprintf(s, "fadd st(0),st(%d)", op2 & 0x7); break;
- case 1: sprintf(s, "fcom st(0),st(%d)", op2 & 0x7); break;
- case 2: sprintf(s, "fsub st(0),st(%d)", op2 & 0x7); break;
- case 3: sprintf(s, "fdiv st(0),st(%d)", op2 & 0x7); break;
- case 4: sprintf(s, "fmul st(0),st(%d)", op2 & 0x7); break;
- case 5: sprintf(s, "fcomp st(0),st(%d)", op2 & 0x7); break;
- case 6: sprintf(s, "fsubr st(0),st(%d)", op2 & 0x7); break;
- case 7: sprintf(s, "fdivr st(0),st(%d)", op2 & 0x7); break;
+ case 0: _stprintf(s, _T("fadd st(0),st(%d)"), op2 & 0x7); break;
+ case 1: _stprintf(s, _T("fcom st(0),st(%d)"), op2 & 0x7); break;
+ case 2: _stprintf(s, _T("fsub st(0),st(%d)"), op2 & 0x7); break;
+ case 3: _stprintf(s, _T("fdiv st(0),st(%d)"), op2 & 0x7); break;
+ case 4: _stprintf(s, _T("fmul st(0),st(%d)"), op2 & 0x7); break;
+ case 5: _stprintf(s, _T("fcomp st(0),st(%d)"), op2 & 0x7); break;
+ case 6: _stprintf(s, _T("fsubr st(0),st(%d)"), op2 & 0x7); break;
+ case 7: _stprintf(s, _T("fdivr st(0),st(%d)"), op2 & 0x7); break;
}
}
break;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
{
- case 0: sprintf(s, "fld dword ptr %s", modrm_string); break;
- case 1: sprintf(s, "??? (FPU)"); break;
- case 2: sprintf(s, "fst dword ptr %s", modrm_string); break;
- case 3: sprintf(s, "fstp dword ptr %s", modrm_string); break;
- case 4: sprintf(s, "fldenv word ptr %s", modrm_string); break;
- case 5: sprintf(s, "fldcw word ptr %s", modrm_string); break;
- case 6: sprintf(s, "fstenv word ptr %s", modrm_string); break;
- case 7: sprintf(s, "fstcw word ptr %s", modrm_string); break;
+ case 0: _stprintf(s, _T("fld dword ptr %s"), modrm_string); break;
+ case 1: _stprintf(s, _T("??? (FPU)")); break;
+ case 2: _stprintf(s, _T("fst dword ptr %s"), modrm_string); break;
+ case 3: _stprintf(s, _T("fstp dword ptr %s"), modrm_string); break;
+ case 4: _stprintf(s, _T("fldenv word ptr %s"), modrm_string); break;
+ case 5: _stprintf(s, _T("fldcw word ptr %s"), modrm_string); break;
+ case 6: _stprintf(s, _T("fstenv word ptr %s"), modrm_string); break;
+ case 7: _stprintf(s, _T("fstcw word ptr %s"), modrm_string); break;
}
} else {
switch (op2 & 0x3f)
{
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
- sprintf(s, "fld st(0),st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fld st(0),st(%d)"), op2 & 0x7); break;
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
- sprintf(s, "fxch st(0),st(%d)", op2 & 0x7); break;
-
- case 0x10: sprintf(s, "fnop"); break;
- case 0x20: sprintf(s, "fchs"); break;
- case 0x21: sprintf(s, "fabs"); break;
- case 0x24: sprintf(s, "ftst"); break;
- case 0x25: sprintf(s, "fxam"); break;
- case 0x28: sprintf(s, "fld1"); break;
- case 0x29: sprintf(s, "fldl2t"); break;
- case 0x2a: sprintf(s, "fldl2e"); break;
- case 0x2b: sprintf(s, "fldpi"); break;
- case 0x2c: sprintf(s, "fldlg2"); break;
- case 0x2d: sprintf(s, "fldln2"); break;
- case 0x2e: sprintf(s, "fldz"); break;
- case 0x30: sprintf(s, "f2xm1"); break;
- case 0x31: sprintf(s, "fyl2x"); break;
- case 0x32: sprintf(s, "fptan"); break;
- case 0x33: sprintf(s, "fpatan"); break;
- case 0x34: sprintf(s, "fxtract"); break;
- case 0x35: sprintf(s, "fprem1"); break;
- case 0x36: sprintf(s, "fdecstp"); break;
- case 0x37: sprintf(s, "fincstp"); break;
- case 0x38: sprintf(s, "fprem"); break;
- case 0x39: sprintf(s, "fyl2xp1"); break;
- case 0x3a: sprintf(s, "fsqrt"); break;
- case 0x3b: sprintf(s, "fsincos"); break;
- case 0x3c: sprintf(s, "frndint"); break;
- case 0x3d: sprintf(s, "fscale"); break;
- case 0x3e: sprintf(s, "fsin"); break;
- case 0x3f: sprintf(s, "fcos"); break;
-
- default: sprintf(s, "??? (FPU)"); break;
+ _stprintf(s, _T("fxch st(0),st(%d)"), op2 & 0x7); break;
+
+ case 0x10: _stprintf(s, _T("fnop")); break;
+ case 0x20: _stprintf(s, _T("fchs")); break;
+ case 0x21: _stprintf(s, _T("fabs")); break;
+ case 0x24: _stprintf(s, _T("ftst")); break;
+ case 0x25: _stprintf(s, _T("fxam")); break;
+ case 0x28: _stprintf(s, _T("fld1")); break;
+ case 0x29: _stprintf(s, _T("fldl2t")); break;
+ case 0x2a: _stprintf(s, _T("fldl2e")); break;
+ case 0x2b: _stprintf(s, _T("fldpi")); break;
+ case 0x2c: _stprintf(s, _T("fldlg2")); break;
+ case 0x2d: _stprintf(s, _T("fldln2")); break;
+ case 0x2e: _stprintf(s, _T("fldz")); break;
+ case 0x30: _stprintf(s, _T("f2xm1")); break;
+ case 0x31: _stprintf(s, _T("fyl2x")); break;
+ case 0x32: _stprintf(s, _T("fptan")); break;
+ case 0x33: _stprintf(s, _T("fpatan")); break;
+ case 0x34: _stprintf(s, _T("fxtract")); break;
+ case 0x35: _stprintf(s, _T("fprem1")); break;
+ case 0x36: _stprintf(s, _T("fdecstp")); break;
+ case 0x37: _stprintf(s, _T("fincstp")); break;
+ case 0x38: _stprintf(s, _T("fprem")); break;
+ case 0x39: _stprintf(s, _T("fyl2xp1")); break;
+ case 0x3a: _stprintf(s, _T("fsqrt")); break;
+ case 0x3b: _stprintf(s, _T("fsincos")); break;
+ case 0x3c: _stprintf(s, _T("frndint")); break;
+ case 0x3d: _stprintf(s, _T("fscale")); break;
+ case 0x3e: _stprintf(s, _T("fsin")); break;
+ case 0x3f: _stprintf(s, _T("fcos")); break;
+
+ default: _stprintf(s, _T("??? (FPU)")); break;
}
}
break;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
{
- case 0: sprintf(s, "fiadd dword ptr %s", modrm_string); break;
- case 1: sprintf(s, "fimul dword ptr %s", modrm_string); break;
- case 2: sprintf(s, "ficom dword ptr %s", modrm_string); break;
- case 3: sprintf(s, "ficomp dword ptr %s", modrm_string); break;
- case 4: sprintf(s, "fisub dword ptr %s", modrm_string); break;
- case 5: sprintf(s, "fisubr dword ptr %s", modrm_string); break;
- case 6: sprintf(s, "fidiv dword ptr %s", modrm_string); break;
- case 7: sprintf(s, "fidivr dword ptr %s", modrm_string); break;
+ case 0: _stprintf(s, _T("fiadd dword ptr %s"), modrm_string); break;
+ case 1: _stprintf(s, _T("fimul dword ptr %s"), modrm_string); break;
+ case 2: _stprintf(s, _T("ficom dword ptr %s"), modrm_string); break;
+ case 3: _stprintf(s, _T("ficomp dword ptr %s"), modrm_string); break;
+ case 4: _stprintf(s, _T("fisub dword ptr %s"), modrm_string); break;
+ case 5: _stprintf(s, _T("fisubr dword ptr %s"), modrm_string); break;
+ case 6: _stprintf(s, _T("fidiv dword ptr %s"), modrm_string); break;
+ case 7: _stprintf(s, _T("fidivr dword ptr %s"), modrm_string); break;
}
} else {
switch (op2 & 0x3f)
{
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
- sprintf(s, "fcmovb st(0),st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fcmovb st(0),st(%d)"), op2 & 0x7); break;
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
- sprintf(s, "fcmove st(0),st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fcmove st(0),st(%d)"), op2 & 0x7); break;
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
- sprintf(s, "fcmovbe st(0),st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fcmovbe st(0),st(%d)"), op2 & 0x7); break;
case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
- sprintf(s, "fcmovu st(0),st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fcmovu st(0),st(%d)"), op2 & 0x7); break;
- default: sprintf(s, "??? (FPU)"); break;
+ default: _stprintf(s, _T("??? (FPU)")); break;
}
}
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
{
- case 0: sprintf(s, "fild dword ptr %s", modrm_string); break;
- case 1: sprintf(s, "??? (FPU)"); break;
- case 2: sprintf(s, "fist dword ptr %s", modrm_string); break;
- case 3: sprintf(s, "fistp dword ptr %s", modrm_string); break;
- case 4: sprintf(s, "??? (FPU)"); break;
- case 5: sprintf(s, "fld tword ptr %s", modrm_string); break;
- case 6: sprintf(s, "??? (FPU)"); break;
- case 7: sprintf(s, "fstp tword ptr %s", modrm_string); break;
+ case 0: _stprintf(s, _T("fild dword ptr %s"), modrm_string); break;
+ case 1: _stprintf(s, _T("??? (FPU)")); break;
+ case 2: _stprintf(s, _T("fist dword ptr %s"), modrm_string); break;
+ case 3: _stprintf(s, _T("fistp dword ptr %s"), modrm_string); break;
+ case 4: _stprintf(s, _T("??? (FPU)")); break;
+ case 5: _stprintf(s, _T("fld tword ptr %s"), modrm_string); break;
+ case 6: _stprintf(s, _T("??? (FPU)")); break;
+ case 7: _stprintf(s, _T("fstp tword ptr %s"), modrm_string); break;
}
} else {
switch (op2 & 0x3f)
{
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
- sprintf(s, "fcmovnb st(0),st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fcmovnb st(0),st(%d)"), op2 & 0x7); break;
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
- sprintf(s, "fcmovne st(0),st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fcmovne st(0),st(%d)"), op2 & 0x7); break;
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
- sprintf(s, "fcmovnbe st(0),st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fcmovnbe st(0),st(%d)"), op2 & 0x7); break;
case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
- sprintf(s, "fcmovnu st(0),st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fcmovnu st(0),st(%d)"), op2 & 0x7); break;
- case 0x22: sprintf(s, "fclex"); break;
- case 0x23: sprintf(s, "finit"); break;
+ case 0x22: _stprintf(s, _T("fclex")); break;
+ case 0x23: _stprintf(s, _T("finit")); break;
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
- sprintf(s, "fucomi st(0),st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fucomi st(0),st(%d)"), op2 & 0x7); break;
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
- sprintf(s, "fcomi st(0),st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fcomi st(0),st(%d)"), op2 & 0x7); break;
- default: sprintf(s, "??? (FPU)"); break;
+ default: _stprintf(s, _T("??? (FPU)")); break;
}
}
break;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
{
- case 0: sprintf(s, "fadd qword ptr %s", modrm_string); break;
- case 1: sprintf(s, "fmul qword ptr %s", modrm_string); break;
- case 2: sprintf(s, "fcom qword ptr %s", modrm_string); break;
- case 3: sprintf(s, "fcomp qword ptr %s", modrm_string); break;
- case 4: sprintf(s, "fsub qword ptr %s", modrm_string); break;
- case 5: sprintf(s, "fsubr qword ptr %s", modrm_string); break;
- case 6: sprintf(s, "fdiv qword ptr %s", modrm_string); break;
- case 7: sprintf(s, "fdivr qword ptr %s", modrm_string); break;
+ case 0: _stprintf(s, _T("fadd qword ptr %s"), modrm_string); break;
+ case 1: _stprintf(s, _T("fmul qword ptr %s"), modrm_string); break;
+ case 2: _stprintf(s, _T("fcom qword ptr %s"), modrm_string); break;
+ case 3: _stprintf(s, _T("fcomp qword ptr %s"), modrm_string); break;
+ case 4: _stprintf(s, _T("fsub qword ptr %s"), modrm_string); break;
+ case 5: _stprintf(s, _T("fsubr qword ptr %s"), modrm_string); break;
+ case 6: _stprintf(s, _T("fdiv qword ptr %s"), modrm_string); break;
+ case 7: _stprintf(s, _T("fdivr qword ptr %s"), modrm_string); break;
}
} else {
switch (op2 & 0x3f)
{
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
- sprintf(s, "fadd st(%d),st(0)", op2 & 0x7); break;
+ _stprintf(s, _T("fadd st(%d),st(0)"), op2 & 0x7); break;
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
- sprintf(s, "fmul st(%d),st(0)", op2 & 0x7); break;
+ _stprintf(s, _T("fmul st(%d),st(0)"), op2 & 0x7); break;
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
- sprintf(s, "fsubr st(%d),st(0)", op2 & 0x7); break;
+ _stprintf(s, _T("fsubr st(%d),st(0)"), op2 & 0x7); break;
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
- sprintf(s, "fsub st(%d),st(0)", op2 & 0x7); break;
+ _stprintf(s, _T("fsub st(%d),st(0)"), op2 & 0x7); break;
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
- sprintf(s, "fdivr st(%d),st(0)", op2 & 0x7); break;
+ _stprintf(s, _T("fdivr st(%d),st(0)"), op2 & 0x7); break;
case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f:
- sprintf(s, "fdiv st(%d),st(0)", op2 & 0x7); break;
+ _stprintf(s, _T("fdiv st(%d),st(0)"), op2 & 0x7); break;
- default: sprintf(s, "??? (FPU)"); break;
+ default: _stprintf(s, _T("??? (FPU)")); break;
}
}
break;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
{
- case 0: sprintf(s, "fld qword ptr %s", modrm_string); break;
- case 1: sprintf(s, "??? (FPU)"); break;
- case 2: sprintf(s, "fst qword ptr %s", modrm_string); break;
- case 3: sprintf(s, "fstp qword ptr %s", modrm_string); break;
- case 4: sprintf(s, "frstor %s", modrm_string); break;
- case 5: sprintf(s, "??? (FPU)"); break;
- case 6: sprintf(s, "fsave %s", modrm_string); break;
- case 7: sprintf(s, "fstsw word ptr %s", modrm_string); break;
+ case 0: _stprintf(s, _T("fld qword ptr %s"), modrm_string); break;
+ case 1: _stprintf(s, _T("??? (FPU)")); break;
+ case 2: _stprintf(s, _T("fst qword ptr %s"), modrm_string); break;
+ case 3: _stprintf(s, _T("fstp qword ptr %s"), modrm_string); break;
+ case 4: _stprintf(s, _T("frstor %s"), modrm_string); break;
+ case 5: _stprintf(s, _T("??? (FPU)")); break;
+ case 6: _stprintf(s, _T("fsave %s"), modrm_string); break;
+ case 7: _stprintf(s, _T("fstsw word ptr %s"), modrm_string); break;
}
} else {
switch (op2 & 0x3f)
{
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
- sprintf(s, "ffree st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("ffree st(%d)"), op2 & 0x7); break;
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
- sprintf(s, "fst st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fst st(%d)"), op2 & 0x7); break;
case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
- sprintf(s, "fstp st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fstp st(%d)"), op2 & 0x7); break;
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
- sprintf(s, "fucom st(%d), st(0)", op2 & 0x7); break;
+ _stprintf(s, _T("fucom st(%d), st(0)"), op2 & 0x7); break;
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
- sprintf(s, "fucomp st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fucomp st(%d)"), op2 & 0x7); break;
- default: sprintf(s, "??? (FPU)"); break;
+ default: _stprintf(s, _T("??? (FPU)")); break;
}
}
break;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
{
- case 0: sprintf(s, "fiadd word ptr %s", modrm_string); break;
- case 1: sprintf(s, "fimul word ptr %s", modrm_string); break;
- case 2: sprintf(s, "ficom word ptr %s", modrm_string); break;
- case 3: sprintf(s, "ficomp word ptr %s", modrm_string); break;
- case 4: sprintf(s, "fisub word ptr %s", modrm_string); break;
- case 5: sprintf(s, "fisubr word ptr %s", modrm_string); break;
- case 6: sprintf(s, "fidiv word ptr %s", modrm_string); break;
- case 7: sprintf(s, "fidivr word ptr %s", modrm_string); break;
+ case 0: _stprintf(s, _T("fiadd word ptr %s"), modrm_string); break;
+ case 1: _stprintf(s, _T("fimul word ptr %s"), modrm_string); break;
+ case 2: _stprintf(s, _T("ficom word ptr %s"), modrm_string); break;
+ case 3: _stprintf(s, _T("ficomp word ptr %s"), modrm_string); break;
+ case 4: _stprintf(s, _T("fisub word ptr %s"), modrm_string); break;
+ case 5: _stprintf(s, _T("fisubr word ptr %s"), modrm_string); break;
+ case 6: _stprintf(s, _T("fidiv word ptr %s"), modrm_string); break;
+ case 7: _stprintf(s, _T("fidivr word ptr %s"), modrm_string); break;
}
} else {
switch (op2 & 0x3f)
{
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
- sprintf(s, "faddp st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("faddp st(%d)"), op2 & 0x7); break;
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
- sprintf(s, "fmulp st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fmulp st(%d)"), op2 & 0x7); break;
- case 0x19: sprintf(s, "fcompp"); break;
+ case 0x19: _stprintf(s, _T("fcompp")); break;
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
- sprintf(s, "fsubrp st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fsubrp st(%d)"), op2 & 0x7); break;
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
- sprintf(s, "fsubp st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fsubp st(%d)"), op2 & 0x7); break;
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
- sprintf(s, "fdivrp st(%d), st(0)", op2 & 0x7); break;
+ _stprintf(s, _T("fdivrp st(%d), st(0)"), op2 & 0x7); break;
case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f:
- sprintf(s, "fdivp st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fdivp st(%d)"), op2 & 0x7); break;
- default: sprintf(s, "??? (FPU)"); break;
+ default: _stprintf(s, _T("??? (FPU)")); break;
}
}
break;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
{
- case 0: sprintf(s, "fild word ptr %s", modrm_string); break;
- case 1: sprintf(s, "??? (FPU)"); break;
- case 2: sprintf(s, "fist word ptr %s", modrm_string); break;
- case 3: sprintf(s, "fistp word ptr %s", modrm_string); break;
- case 4: sprintf(s, "fbld %s", modrm_string); break;
- case 5: sprintf(s, "fild qword ptr %s", modrm_string); break;
- case 6: sprintf(s, "fbstp %s", modrm_string); break;
- case 7: sprintf(s, "fistp qword ptr %s", modrm_string); break;
+ case 0: _stprintf(s, _T("fild word ptr %s"), modrm_string); break;
+ case 1: _stprintf(s, _T("??? (FPU)")); break;
+ case 2: _stprintf(s, _T("fist word ptr %s"), modrm_string); break;
+ case 3: _stprintf(s, _T("fistp word ptr %s"), modrm_string); break;
+ case 4: _stprintf(s, _T("fbld %s"), modrm_string); break;
+ case 5: _stprintf(s, _T("fild qword ptr %s"), modrm_string); break;
+ case 6: _stprintf(s, _T("fbstp %s"), modrm_string); break;
+ case 7: _stprintf(s, _T("fistp qword ptr %s"), modrm_string); break;
}
} else {
switch (op2 & 0x3f)
{
- case 0x20: sprintf(s, "fstsw aw"); break;
+ case 0x20: _stprintf(s, _T("fstsw aw")); break;
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
- sprintf(s, "fucomip st(%d)", op2 & 0x7); break;
+ _stprintf(s, _T("fucomip st(%d)"), op2 & 0x7); break;
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
- sprintf(s, "fcomip st(%d),st(0)", op2 & 0x7); break;
+ _stprintf(s, _T("fcomip st(%d),st(0)"), op2 & 0x7); break;
- default: sprintf(s, "??? (FPU)"); break;
+ default: _stprintf(s, _T("??? (FPU)")); break;
}
}
break;
}
}
-static void decode_opcode(char *s, const I386_OPCODE *op, UINT8 op1 )
+static void decode_opcode(_TCHAR *s, const I386_OPCODE *op, UINT8 op1 )
{
int i;
UINT8 op2;
return;
case PREFIX:
- s += sprintf( s, "%-8s", op->mnemonic );
+ s += _stprintf( s, _T("%-8s"), op->mnemonic );
op2 = FETCHD();
decode_opcode( s, &necv_opcode_table1[op2], op1 );
return;
case GROUP:
handle_modrm( modrm_string );
for( i=0; i < ARRAY_LENGTH(group_op_table); i++ ) {
- if( strcmp(op->mnemonic, group_op_table[i].mnemonic) == 0 )
+ if( _tcscmp(op->mnemonic, group_op_table[i].mnemonic) == 0 )
{
decode_opcode( s, &group_op_table[i].opcode[MODRM_REG1], op1 );
return;
break;
}
- s += sprintf( s, "%-8s", op->mnemonic );
+ s += _stprintf( s, _T("%-8s"), op->mnemonic );
dasm_flags = op->dasm_flags;
if( op->param1 != 0 ) {
}
if( op->param2 != 0 ) {
- s += sprintf( s, "," );
+ s += _stprintf( s, _T(",") );
s = handle_param( s, op->param2 );
}
if( op->param3 != 0 ) {
- s += sprintf( s, "," );
+ s += _stprintf( s, _T(",") );
s = handle_param( s, op->param3 );
}
return;
handle_unknown:
- sprintf(s, "???");
+ _stprintf(s, _T("???"));
}
-int necv_dasm_one(char *buffer, UINT32 eip, const UINT8 *oprom)
+int necv_dasm_one(_TCHAR *buffer, UINT32 eip, const UINT8 *oprom)
{
UINT8 op;
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