Author : Takeda.Toshiya
Date : 2010.08.31-
- [ main ]
+ [ main pcb ]
*/
#ifndef _MAIN_H_
class MAIN : public DEVICE
{
private:
- DEVICE *d_cpu, *d_subcpu, *d_fdc;
+ DEVICE *d_maincpu, *d_subcpu, *d_fdc;
uint8_t* rbank[32]; // 64KB / 2KB
uint8_t* wbank[32];
void update_bank();
public:
- MAIN(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
+ MAIN(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
{
intfd = int0 = int1 = int2 = int3 = int4 = false;
me = e1 = false;
+ set_device_name(_T("Memory Bus(MAIN)"));
}
~MAIN() {}
void write_io8(uint32_t addr, uint32_t data);
uint32_t read_io8(uint32_t addr);
void write_signal(int id, uint32_t data, uint32_t mask);
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ bool process_state(FILEIO* state_fio, bool loading);
// unique functions
- void set_context_cpu(DEVICE* device)
+ void set_context_maincpu(DEVICE* device)
{
- d_cpu = device;
+ d_maincpu = device;
}
void set_context_subcpu(DEVICE* device)
{