}
delete fio;
- cmos_crc32 = getcrc32(cmos, sizeof(cmos));
+ cmos_crc32 = get_crc32(cmos, sizeof(cmos));
}
void MEMORY::release()
{
- if(cmos_crc32 != getcrc32(cmos, sizeof(cmos))) {
+ if(cmos_crc32 != get_crc32(cmos, sizeof(cmos))) {
FILEIO* fio = new FILEIO();
if(fio->Fopen(create_local_path(_T("CMOS.BIN")), FILEIO_WRITE_BINARY)) {
fio->Fwrite(cmos, sizeof(cmos), 1);
fdc_irq = motor = false;
}
-void MEMORY::write_data8(uint32 addr, uint32 data)
+void MEMORY::write_data8(uint32_t addr, uint32_t data)
{
addr &= 0xffff;
wbank[addr >> 11][addr & 0x7ff] = data;
}
-uint32 MEMORY::read_data8(uint32 addr)
+uint32_t MEMORY::read_data8(uint32_t addr)
{
addr &= 0xffff;
return rbank[addr >> 11][addr & 0x7ff];
}
-void MEMORY::write_io8(uint32 addr, uint32 data)
+void MEMORY::write_io8(uint32_t addr, uint32_t data)
{
switch(addr & 0xff) {
case 0x18: case 0x19: case 0x1a: case 0x1b:
update_map();
}
-uint32 MEMORY::read_io8(uint32 addr)
+uint32_t MEMORY::read_io8(uint32_t addr)
{
switch(addr & 0xff) {
case 0x18: case 0x19: case 0x1a: case 0x1b:
return ~config.dipswitch & 0xff;
case 0x30: case 0x31: case 0x32: case 0x33:
- return (bank & 0xf0) | (d_fdc->disk_inserted() ? 8 : 0) | (motor ? 0 : 2) | (fdc_irq ? 1 : 0);
+ return (bank & 0xf0) | (d_fdc->is_disk_inserted() ? 8 : 0) | (motor ? 0 : 2) | (fdc_irq ? 1 : 0);
}
return 0xff;
}
8000-87FF : CMOS
*/
-void MEMORY::write_signal(int id, uint32 data, uint32 mask)
+void MEMORY::write_signal(int id, uint32_t data, uint32_t mask)
{
if(id == SIG_MEMORY_PCM) {
// pcm on from pit