#define SIG_MEMORY_SEL 0
+namespace SC3000 {
+
class MEMORY : public DEVICE
{
private:
// memory
- uint8 cart[0x8000];
- uint8 ipl[0x2000]; // sf7000
- uint8 ram[0x10000];
+ uint8_t cart[0x20000];
+ uint8_t ipl[0x2000]; // sf7000
+ uint8_t ram[0x10000];
- uint8 wdmy[0x1000];
- uint8 rdmy[0x1000];
- uint8* wbank[16];
- uint8* rbank[16];
+ uint8_t wdmy[0x1000];
+ uint8_t rdmy[0x1000];
+ uint8_t* wbank[16];
+ uint8_t* rbank[16];
bool inserted;
bool ram_selected;
+ uint8_t bank[3];
+
+ void update_bank();
public:
- MEMORY(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu) {}
+ MEMORY(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
+ {
+ set_device_name(_T("Memory Bus"));
+ }
~MEMORY() {}
// common functions
void initialize();
- void write_data8(uint32 addr, uint32 data);
- uint32 read_data8(uint32 addr);
- void write_signal(int id, uint32 data, uint32 mask);
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+ void __FASTCALL write_data8(uint32_t addr, uint32_t data);
+ uint32_t __FASTCALL read_data8(uint32_t addr);
+ void __FASTCALL write_signal(int id, uint32_t data, uint32_t mask);
+ bool process_state(FILEIO* state_fio, bool loading);
// unique functions
void open_cart(const _TCHAR* file_path);
}
};
+}
#endif