void SCSI_HOST::reset()
{
data_reg = 0;
- bsy_status = cd_status = io_status = msg_status = req_status = false;
+ bsy_status = cd_status = io_status = msg_status = req_status = 0;
access = false;
set_irq(false);
write_signals(&outputs_dat, data);
#ifdef SCSI_HOST_AUTO_ACK
+ // set ack to clear req signal immediately
if(bsy_status && !io_status) {
this->write_signal(SIG_SCSI_ACK, 1, 1);
}
emu->force_out_debug_log(_T("[SCSI_HOST] Read %02X\n"), value);
#endif
#ifdef SCSI_HOST_AUTO_ACK
+ // set ack to clear req signal immediately
if(bsy_status && io_status) {
this->write_signal(SIG_SCSI_ACK, 1, 1);
}
switch(id) {
// from initiator
case SIG_SCSI_SEL:
+ #ifdef _SCSI_DEBUG_LOG
+ emu->out_debug_log(_T("[SCSI_HOST] SEL = %d\n"), (data & mask) ? 1 : 0);
+ #endif
write_signals(&outputs_sel, (data & mask) ? 0xffffffff : 0);
break;
case SIG_SCSI_ATN:
+ #ifdef _SCSI_DEBUG_LOG
+// emu->out_debug_log(_T("[SCSI_HOST] ATN = %d\n"), (data & mask) ? 1 : 0);
+ #endif
write_signals(&outputs_atn, (data & mask) ? 0xffffffff : 0);
break;
case SIG_SCSI_ACK:
+ #ifdef _SCSI_DEBUG_LOG
+ emu->out_debug_log(_T("[SCSI_HOST] ACK = %d\n"), (data & mask) ? 1 : 0);
+ #endif
write_signals(&outputs_ack, (data & mask) ? 0xffffffff : 0);
break;
case SIG_SCSI_RST:
+ #ifdef _SCSI_DEBUG_LOG
+ emu->out_debug_log(_T("[SCSI_HOST] RST = %d\n"), (data & mask) ? 1 : 0);
+ #endif
write_signals(&outputs_rst, (data & mask) ? 0xffffffff : 0);
break;
case SIG_SCSI_BSY:
bsy_status &= ~mask;
bsy_status |= (data & mask);
+ write_signals(&outputs_bsy, bsy_status ? 0xffffffff : 0);
break;
case SIG_SCSI_CD:
// data phase
set_drq(true);
access = true;
- }
- else if (cd_status) {
+ } else if (cd_status) {
// command/status/message phase
set_irq(true);
}