-/*\r
- Skelton for retropc emulator\r
-\r
- Origin : MAME TMS99xx Core\r
- Author : Takeda.Toshiya\r
- Date : 2007.07.14 -\r
-\r
- [ TMS9995 ]\r
-*/\r
-\r
-#ifndef _TMS9995_\r
-#define _TMS9995_\r
-\r
-#include "vm.h"\r
-#include "../emu.h"\r
-#include "device.h"\r
-\r
-#define SIG_TMS9995_NMI 0\r
-#define SIG_TMS9995_INT1 1\r
-#define SIG_TMS9995_INT4 2\r
-\r
-class TMS9995 : public DEVICE\r
-{\r
-private:\r
- // contexts\r
- DEVICE *d_mem, *d_io;\r
- \r
- // clocks\r
- int count, period;\r
- // register\r
- uint16 WP, PC, prevPC, ST;\r
- uint8 RAM[256];\r
- // interrupt\r
- uint8 irq_level, int_state, int_latch;\r
- bool int_pending, int_enabled;\r
- // counter/timer\r
- uint16 dec_count, dec_interval;\r
- int dec_timer;\r
- bool dec_enabled;\r
- // status\r
- uint16 mode;\r
- uint8 lastparity;\r
- bool nmi, mid, idle;\r
- \r
- // memory functions\r
- uint16 RM16(uint16 addr);\r
- void WM16(uint16 addr, uint16 val);\r
- uint8 RM8(uint16 addr);\r
- void WM8(uint32 addr, uint8 val);\r
- inline uint16 FETCH16();\r
- \r
- // i/o functions\r
- uint16 IN8(int addr);\r
- void OUT8(uint16 addr, uint16 val);\r
- inline void EXTOUT8(uint16 addr);\r
- uint16 RCRU(uint16 addr, int bits);\r
- void WCRU(uint16 addr, int bits, uint16 val);\r
- \r
- // cpu internal control\r
- void set_irq_line(int irqline, bool state);\r
- void update_int();\r
- void update_dec();\r
- void contextswitch(uint16 addr);\r
- \r
- // opecode functions\r
- void run_one_opecode();\r
- void execute(uint16 op);\r
- void h0040(uint16 op);\r
- void h0100(uint16 op);\r
- void h0200(uint16 op);\r
- void h0400(uint16 op);\r
- void h0800(uint16 op);\r
- void h1000(uint16 op);\r
- void h2000(uint16 op);\r
- void xop(uint16 op);\r
- void ldcr_stcr(uint16 op);\r
- void h4000w(uint16 op);\r
- void h4000b(uint16 op);\r
- void illegal(uint16 op);\r
- uint16 decipheraddr(uint16 op);\r
- uint16 decipheraddrbyte(uint16 op);\r
- \r
- // status functions\r
- inline void setstat();\r
- inline void getstat();\r
- inline uint16 logical_right_shift(uint16 val, int c);\r
- inline int16 arithmetic_right_shift(int16 val, int c);\r
- inline void setst_lae(int16 val);\r
- inline void setst_byte_laep(int8 val);\r
- inline void setst_e(uint16 val, uint16 to);\r
- inline void setst_c_lae(uint16 to, uint16 val);\r
- inline int16 setst_add_laeco(int a, int b);\r
- inline int16 setst_sub_laeco(int a, int b);\r
- inline int8 setst_addbyte_laecop(int a, int b);\r
- inline int8 setst_subbyte_laecop(int a, int b);\r
- inline void setst_laeo(int16 val);\r
- inline uint16 setst_sra_laec(int16 a, uint16 c);\r
- inline uint16 setst_srl_laec(uint16 a,uint16 c);\r
- inline uint16 setst_src_laec(uint16 a,uint16 c);\r
- inline uint16 setst_sla_laeco(uint16 a, uint16 c);\r
- \r
-public:\r
- TMS9995(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)\r
- {\r
- // init registers\r
- WP = PC = ST = 0;\r
- memset(RAM, 0, sizeof(RAM));\r
- irq_level = int_state = int_latch = 0;\r
- int_pending = false;\r
- int_enabled = true;\r
- dec_count = dec_interval = 0;\r
- dec_timer = 0;\r
- dec_enabled = false;\r
- mode = 0;\r
- lastparity = 0;\r
- nmi = mid = idle = false;\r
- }\r
- ~TMS9995() {}\r
- \r
- // common function\r
- void reset();\r
- int run(int clock);\r
- void write_signal(int id, uint32 data, uint32 mask);\r
- uint32 get_pc()\r
- {\r
- return prevPC;\r
- }\r
- \r
- // unique function\r
- void set_context_mem(DEVICE* device)\r
- {\r
- d_mem = device;\r
- }\r
- void set_context_io(DEVICE* device)\r
- {\r
- d_io = device;\r
- }\r
-};\r
-\r
-#endif\r
+/*
+ Skelton for retropc emulator
+
+ Origin : MAME TMS99xx Core
+ Author : Takeda.Toshiya
+ Date : 2007.07.14 -
+
+ [ TMS9995 ]
+*/
+
+#ifndef _TMS9995_
+#define _TMS9995_
+
+#include "vm.h"
+#include "../emu.h"
+#include "device.h"
+
+#define SIG_TMS9995_NMI 0
+#define SIG_TMS9995_INT1 1
+#define SIG_TMS9995_INT4 2
+
+#ifdef USE_DEBUGGER
+class DEBUGGER;
+#endif
+
+class TMS9995 : public DEVICE
+{
+private:
+ // contexts
+ DEVICE *d_mem, *d_io;
+#ifdef USE_DEBUGGER
+ DEBUGGER *d_debugger;
+ DEVICE *d_mem_tmp, *d_io_tmp;
+#endif
+
+ // clocks
+#ifdef USE_DEBUGGER
+ uint64_t total_count;
+ uint64_t prev_total_count;
+#endif
+ int count, period;
+ // register
+ uint16_t WP, PC, prevPC, ST;
+ uint8_t RAM[256];
+ // interrupt
+ uint8_t irq_level, int_state, int_latch;
+ bool int_pending, int_enabled;
+ // counter/timer
+ uint16_t dec_count, dec_interval;
+ int dec_timer;
+ bool dec_enabled;
+ // status
+ uint16_t mode;
+ uint8_t lastparity;
+ bool nmi, mid, idle;
+
+ // memory functions
+ uint16_t RM16(uint16_t addr);
+ void WM16(uint16_t addr, uint16_t val);
+ uint8_t RM8(uint16_t addr);
+ void WM8(uint32_t addr, uint8_t val);
+ inline uint16_t FETCH16();
+
+ // i/o functions
+ uint16_t IN8(int addr);
+ void OUT8(uint16_t addr, uint16_t val);
+ inline void EXTOUT8(uint16_t addr);
+ uint16_t RCRU(uint16_t addr, int bits);
+ void WCRU(uint16_t addr, int bits, uint16_t val);
+
+ // cpu internal control
+ void set_irq_line(int irqline, bool state);
+ void update_int();
+ void update_dec();
+ void contextswitch(uint16_t addr);
+
+ // opecode functions
+ void run_one_opecode();
+#ifdef USE_DEBUGGER
+ void run_one_opecode_tmp();
+#endif
+ void execute(uint16_t op);
+ void h0040(uint16_t op);
+ void h0100(uint16_t op);
+ void h0200(uint16_t op);
+ void h0400(uint16_t op);
+ void h0800(uint16_t op);
+ void h1000(uint16_t op);
+ void h2000(uint16_t op);
+ void xop(uint16_t op);
+ void ldcr_stcr(uint16_t op);
+ void h4000w(uint16_t op);
+ void h4000b(uint16_t op);
+ void illegal(uint16_t op);
+ uint16_t decipheraddr(uint16_t op);
+ uint16_t decipheraddrbyte(uint16_t op);
+
+ // status functions
+ inline void setstat();
+ inline void getstat();
+ inline uint16_t logical_right_shift(uint16_t val, int c);
+ inline int16_t arithmetic_right_shift(int16_t val, int c);
+ inline void setst_lae(int16_t val);
+ inline void setst_byte_laep(int8_t val);
+ inline void setst_e(uint16_t val, uint16_t to);
+ inline void setst_c_lae(uint16_t to, uint16_t val);
+ inline int16_t setst_add_laeco(int a, int b);
+ inline int16_t setst_sub_laeco(int a, int b);
+ inline int8_t setst_addbyte_laecop(int a, int b);
+ inline int8_t setst_subbyte_laecop(int a, int b);
+ inline void setst_laeo(int16_t val);
+ inline uint16_t setst_sra_laec(int16_t a, uint16_t c);
+ inline uint16_t setst_srl_laec(uint16_t a,uint16_t c);
+ inline uint16_t setst_src_laec(uint16_t a,uint16_t c);
+ inline uint16_t setst_sla_laeco(uint16_t a, uint16_t c);
+
+public:
+ TMS9995(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
+ {
+ // init registers
+#ifdef USE_DEBUGGER
+ total_count = prev_total_count = 0;
+#endif
+ WP = PC = ST = 0;
+ memset(RAM, 0, sizeof(RAM));
+ irq_level = int_state = int_latch = 0;
+ int_pending = false;
+ int_enabled = true;
+ dec_count = dec_interval = 0;
+ dec_timer = 0;
+ dec_enabled = false;
+ mode = 0;
+ lastparity = 0;
+ nmi = mid = idle = false;
+ set_device_name(_T("TMS9995 CPU"));
+ }
+ ~TMS9995() {}
+
+ // common functions
+ void initialize();
+ void reset();
+ int run(int clock);
+ void write_signal(int id, uint32_t data, uint32_t mask);
+ uint32_t get_pc()
+ {
+ return prevPC;
+ }
+ uint32_t get_next_pc()
+ {
+ return PC;
+ }
+#ifdef USE_DEBUGGER
+ bool is_cpu()
+ {
+ return true;
+ }
+ bool is_debugger_available()
+ {
+ return true;
+ }
+ void *get_debugger()
+ {
+ return d_debugger;
+ }
+ uint32_t get_debug_prog_addr_mask()
+ {
+ return 0xffff;
+ }
+ uint32_t get_debug_data_addr_mask()
+ {
+ return 0xffff;
+ }
+ void write_data8(uint32_t addr, uint32_t data);
+ uint32_t read_data8(uint32_t addr);
+ void write_data16(uint32_t addr, uint32_t data);
+ uint32_t read_data16(uint32_t addr);
+ void write_io8(uint32_t addr, uint32_t data);
+ uint32_t read_io8(uint32_t addr);
+ void write_debug_data8(uint32_t addr, uint32_t data);
+ uint32_t read_debug_data8(uint32_t addr);
+ void write_debug_data16(uint32_t addr, uint32_t data);
+ uint32_t read_debug_data16(uint32_t addr);
+ void write_debug_io8(uint32_t addr, uint32_t data);
+ uint32_t read_debug_io8(uint32_t addr);
+ bool write_debug_reg(const _TCHAR *reg, uint32_t data);
+ bool get_debug_regs_info(_TCHAR *buffer, size_t buffer_len);
+ int debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len);
+#endif
+ bool process_state(FILEIO* state_fio, bool loading);
+ // unique functions
+ void set_context_mem(DEVICE* device)
+ {
+ d_mem = device;
+ }
+ void set_context_io(DEVICE* device)
+ {
+ d_io = device;
+ }
+#ifdef USE_DEBUGGER
+ void set_context_debugger(DEBUGGER* device)
+ {
+ d_debugger = device;
+ }
+#endif
+};
+
+#endif
OSDN Git Service
