[VM][DEVICE] Use __FASTCALL with interfaces, read_*() ,write_*(), fetch_op() and...

[csp-qt/common_source_project-fm7.git] / source / src / vm / z80sio.h

diff --git a/source/src/vm/z80sio.h b/source/src/vm/z80sio.h
index 6116969..5814dfb 100644 (file)
--- a/source/src/vm/z80sio.h
+++ b/source/src/vm/z80sio.h
@@ -10,8 +10,8 @@
 #ifndef _Z80SIO_H_
 #define _Z80SIO_H_
 
-#include "vm.h"
-#include "../emu.h"
+//#include "vm.h"
+//#include "../emu.h"
 #include "device.h"
 
 #define SIG_Z80SIO_RECV_CH0    0
@@ -39,20 +39,20 @@ class Z80SIO : public DEVICE
 private:
        struct {
                int pointer;
-               uint8 wr[8];
-               uint8 vector;
-               uint8 affect;
+               uint8_t wr[8];
+               uint8_t vector;
+               uint8_t affect;
                bool nextrecv_intr;
                bool first_data;
                bool over_flow;
                bool under_run;
                bool abort;
                bool sync;
-               uint8 sync_bit;
-#ifdef HAS_UPD7201
-               uint16 tx_count;
-               uint8 tx_count_hi;
-#endif
+               uint8_t sync_bit;
+//#ifdef HAS_UPD7201
+               uint16_t tx_count;
+               uint8_t tx_count_hi;
+//#endif
                double tx_clock, tx_interval;
                double rx_clock, rx_interval;
                int tx_data_bits;
@@ -86,18 +86,21 @@ private:
                outputs_t outputs_txdone;
                outputs_t outputs_rxdone;
        } port[2];
-
-       void update_tx_timing(int ch);
-       void update_rx_timing(int ch);
-
+       
+       void __FASTCALL update_tx_timing(int ch);
+       void __FASTCALL update_rx_timing(int ch);
+       
        // daisy chain
        DEVICE *d_cpu, *d_child;
        bool iei, oei;
-       uint32 intr_bit;
-       void update_intr();
+       uint32_t intr_bit;
+
+       bool __HAS_UPD7201;
+       bool __SIO_DEBUG;
+       void __FASTCALL update_intr();
        
 public:
-       Z80SIO(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
+       Z80SIO(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
        {
                memset(port, 0, sizeof(port));
                for(int i = 0; i < 2; i++) {
@@ -113,6 +116,9 @@ public:
                        initialize_output_signals(&port[i].outputs_rxdone);
                }
                d_cpu = d_child = NULL;
+               __HAS_UPD7201 = false;
+               __SIO_DEBUG = false;
+               set_device_name(_T("Z80 SIO"));
        }
        ~Z80SIO() {}
        
@@ -120,15 +126,13 @@ public:
        void initialize();
        void reset();
        void release();
-       void write_io8(uint32 addr, uint32 data);
-       uint32 read_io8(uint32 addr);
-       void write_signal(int id, uint32 data, uint32 mask);
+       void __FASTCALL write_io8(uint32_t addr, uint32_t data);
+       uint32_t __FASTCALL read_io8(uint32_t addr);
+       void __FASTCALL write_signal(int id, uint32_t data, uint32_t mask);
        void event_callback(int event_id, int err);
-       void save_state(FILEIO* state_fio);
-       bool load_state(FILEIO* state_fio);
-       
+       bool process_state(FILEIO* state_fio, bool loading);
        // interrupt common functions
-       void set_context_intr(DEVICE* device, uint32 bit)
+       void set_context_intr(DEVICE* device, uint32_t bit)
        {
                d_cpu = device;
                intr_bit = bit;
@@ -137,16 +141,20 @@ public:
        {
                d_child = device;
        }
+       DEVICE *get_context_child()
+       {
+               return d_child;
+       }
        void set_intr_iei(bool val);
-       uint32 get_intr_ack();
+       uint32_t get_intr_ack();
        void notify_intr_reti();
        
        // unique functions
-       void set_context_rts(int ch, DEVICE* device, int id, uint32 mask)
+       void set_context_rts(int ch, DEVICE* device, int id, uint32_t mask)
        {
                register_output_signal(&port[ch].outputs_rts, device, id, mask);
        }
-       void set_context_dtr(int ch, DEVICE* device, int id, uint32 mask)
+       void set_context_dtr(int ch, DEVICE* device, int id, uint32_t mask)
        {
                register_output_signal(&port[ch].outputs_dtr, device, id, mask);
        }
@@ -154,36 +162,36 @@ public:
        {
                register_output_signal(&port[ch].outputs_send, device, id, 0xff);
        }
-       void set_context_sync(int ch, DEVICE* device, int id, uint32 mask)
+       void set_context_sync(int ch, DEVICE* device, int id, uint32_t mask)
        {
                register_output_signal(&port[ch].outputs_sync, device, id, mask);
        }
-       void set_context_break(int ch, DEVICE* device, int id, uint32 mask)
+       void set_context_break(int ch, DEVICE* device, int id, uint32_t mask)
        {
                register_output_signal(&port[ch].outputs_break, device, id, mask);
        }
-       void set_context_rxdone(int ch, DEVICE* device, int id, uint32 mask)
+       void set_context_rxdone(int ch, DEVICE* device, int id, uint32_t mask)
        {
                register_output_signal(&port[ch].outputs_rxdone, device, id, mask);
        }
-       void set_context_txdone(int ch, DEVICE* device, int id, uint32 mask)
-       {
+       void set_context_txdone(int ch, DEVICE* device, int id, uint32_t mask)
+       {
                register_output_signal(&port[ch].outputs_txdone, device, id, mask);
-       }
+       }
        void set_tx_clock(int ch, double clock)
-       {
+       {
                if(port[ch].tx_clock != clock) {
                        port[ch].tx_clock = clock;
                        update_tx_timing(ch);
                }
        }
        void set_rx_clock(int ch, double clock)
-       {
+       {
                if(port[ch].rx_clock != clock) {
                        port[ch].rx_clock = clock;
                        update_rx_timing(ch);
                }
-       }
+       }
 };
 
 #endif