/*
- * Copyright © 2012 Intel Corporation
+ * Copyright © 2010-2012 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* Authors:
* Zhao Yakui <yakui.zhao@intel.com>
* Xiang Haihao <haihao.xiang@intel.com>
+ *
*/
-#include <stdio.h>
-#include <stdlib.h>
-#include <stdbool.h>
-#include <string.h>
-#include <assert.h>
+#include "sysdeps.h"
#include "intel_batchbuffer.h"
#include "intel_driver.h"
#include "gen6_vme.h"
#include "gen6_mfc.h"
-#define SURFACE_STATE_PADDED_SIZE_0_GEN7 ALIGN(sizeof(struct gen7_surface_state), 32)
-#define SURFACE_STATE_PADDED_SIZE_1_GEN7 ALIGN(sizeof(struct gen7_surface_state2), 32)
-#define SURFACE_STATE_PADDED_SIZE_GEN7 MAX(SURFACE_STATE_PADDED_SIZE_0_GEN7, SURFACE_STATE_PADDED_SIZE_1_GEN7)
-
-#define SURFACE_STATE_PADDED_SIZE_0_GEN6 ALIGN(sizeof(struct i965_surface_state), 32)
-#define SURFACE_STATE_PADDED_SIZE_1_GEN6 ALIGN(sizeof(struct i965_surface_state2), 32)
-#define SURFACE_STATE_PADDED_SIZE_GEN6 MAX(SURFACE_STATE_PADDED_SIZE_0_GEN6, SURFACE_STATE_PADDED_SIZE_1_GEN6)
-
#define SURFACE_STATE_PADDED_SIZE MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7)
#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index)
#define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index)
#define VME_INTRA_SHADER 0
#define VME_INTER_SHADER 1
-#define VME_BINTER_SHADER 3
+#define VME_BINTER_SHADER 3
#define VME_BATCHBUFFER 2
#define CURBE_ALLOCATION_SIZE 37 /* in 256-bit */
#define CURBE_TOTAL_DATA_LENGTH (4 * 32) /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */
#define CURBE_URB_ENTRY_LENGTH 4 /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */
-#define VME_MSG_LENGTH 32
-
+#define VME_MSG_LENGTH 32
+
static const uint32_t gen75_vme_intra_frame[][4] = {
#include "shaders/vme/intra_frame_haswell.g75b"
};
{
"VME Intra Frame",
VME_INTRA_SHADER, /*index*/
- gen75_vme_intra_frame,
- sizeof(gen75_vme_intra_frame),
+ gen75_vme_intra_frame,
+ sizeof(gen75_vme_intra_frame),
NULL
},
{
};
static const uint32_t gen75_vme_mpeg2_inter_frame[][4] = {
-#include "shaders/vme/mpeg2_inter_frame_haswell.g75b"
+#include "shaders/vme/mpeg2_inter_haswell.g75b"
};
static const uint32_t gen75_vme_mpeg2_batchbuffer[][4] = {
{
"VME Intra Frame",
VME_INTRA_SHADER, /*index*/
- gen75_vme_mpeg2_intra_frame,
- sizeof(gen75_vme_mpeg2_intra_frame),
+ gen75_vme_mpeg2_intra_frame,
+ sizeof(gen75_vme_mpeg2_intra_frame),
NULL
},
{
};
/* only used for VME source surface state */
-static void
+static void
gen75_vme_source_surface_state(VADriverContextP ctx,
int index,
struct object_surface *obj_surface,
&vme_context->gpe_context,
obj_surface,
BINDING_TABLE_OFFSET(index),
- SURFACE_STATE_OFFSET(index));
+ SURFACE_STATE_OFFSET(index),
+ 0);
}
static void
&vme_context->gpe_context,
obj_surface,
BINDING_TABLE_OFFSET(index),
- SURFACE_STATE_OFFSET(index));
+ SURFACE_STATE_OFFSET(index),
+ 0);
}
static void
* 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
*/
- vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
+ vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
"VME output buffer",
vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
0x1000);
vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
vme_context->vme_batchbuffer.pitch = 16;
- vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
+ vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
"VME batchbuffer",
vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
0x1000);
}
static VAStatus
-gen75_vme_surface_setup(VADriverContextP ctx,
+gen75_vme_surface_setup(VADriverContextP ctx,
struct encode_state *encode_state,
int is_intra,
struct intel_encoder_context *encoder_context)
gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context);
if (!is_intra) {
- /* reference 0 */
- obj_surface = encode_state->reference_objects[0];
+ VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
+ int slice_type;
- if (obj_surface && obj_surface->bo)
- gen75_vme_source_surface_state(ctx, 1, obj_surface, encoder_context);
+ slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
+ assert(slice_type != SLICE_TYPE_I && slice_type != SLICE_TYPE_SI);
- /* reference 1 */
- obj_surface = encode_state->reference_objects[1];
+ intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 0, 1, gen75_vme_source_surface_state);
- if (obj_surface && obj_surface->bo)
- gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
+ if (slice_type == SLICE_TYPE_B)
+ intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 1, 2, gen75_vme_source_surface_state);
}
/* VME output */
gen75_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context);
gen75_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context);
+ intel_h264_setup_cost_surface(ctx, encode_state, encoder_context,
+ BINDING_TABLE_OFFSET(INTEL_COST_TABLE_OFFSET),
+ SURFACE_STATE_OFFSET(INTEL_COST_TABLE_OFFSET));
return VA_STATUS_SUCCESS;
}
-static VAStatus gen75_vme_interface_setup(VADriverContextP ctx,
+static VAStatus gen75_vme_interface_setup(VADriverContextP ctx,
struct encode_state *encode_state,
struct intel_encoder_context *encoder_context)
{
struct gen6_vme_context *vme_context = encoder_context->vme_context;
- struct gen6_interface_descriptor_data *desc;
+ struct gen6_interface_descriptor_data *desc;
int i;
dri_bo *bo;
desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5);
desc->desc4.constant_urb_entry_read_offset = 0;
desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH;
-
+
/*kernel start*/
- dri_bo_emit_reloc(bo,
+ dri_bo_emit_reloc(bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
0,
i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0),
return VA_STATUS_SUCCESS;
}
-static VAStatus gen75_vme_constant_setup(VADriverContextP ctx,
+static VAStatus gen75_vme_constant_setup(VADriverContextP ctx,
struct encode_state *encode_state,
- struct intel_encoder_context *encoder_context)
+ struct intel_encoder_context *encoder_context,
+ int denom)
{
struct gen6_vme_context *vme_context = encoder_context->vme_context;
unsigned char *constant_buffer;
vme_state_message = (unsigned int *)vme_context->vme_state_message;
- if (encoder_context->profile == VAProfileH264Baseline ||
- encoder_context->profile == VAProfileH264Main ||
- encoder_context->profile == VAProfileH264High) {
+ if (encoder_context->codec == CODEC_H264 ||
+ encoder_context->codec == CODEC_H264_MVC) {
if (vme_context->h264_level >= 30) {
- mv_num = 16;
-
+ mv_num = 16 / denom;
+
if (vme_context->h264_level >= 31)
- mv_num = 8;
- }
- } else if (encoder_context->profile == VAProfileMPEG2Simple ||
- encoder_context->profile == VAProfileMPEG2Main) {
- mv_num = 2;
+ mv_num = 8 / denom;
+ }
+ } else if (encoder_context->codec == CODEC_MPEG2) {
+ mv_num = 2 / denom;
}
vme_state_message[31] = mv_num;
* in the GPU shader.
*/
memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128);
-
+
dri_bo_unmap(vme_context->gpe_context.curbe.bo);
return VA_STATUS_SUCCESS;
if (encoder_context->rate_control_mode == VA_RC_CQP)
vme_state_message[0] = intra_mb_mode_cost_table[pic_param->pic_init_qp + slice_param->slice_qp_delta];
else
- vme_state_message[0] = intra_mb_mode_cost_table[mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY];
+ vme_state_message[0] = intra_mb_mode_cost_table[mfc_context->brc.qp_prime_y[encoder_context->layer.curr_frame_layer_id][SLICE_TYPE_I]];
}
static VAStatus gen75_vme_vme_state_setup(VADriverContextP ctx,
struct gen6_vme_context *vme_context = encoder_context->vme_context;
unsigned int *vme_state_message;
int i;
-
+
//pass the MV/Mb cost into VME message on HASWell
assert(vme_context->vme_state_message);
vme_state_message = (unsigned int *)vme_context->vme_state_message;
vme_state_message[3] = 0x22120200;
vme_state_message[4] = 0x62524232;
- for (i=5; i < 8; i++) {
- vme_state_message[i] = 0;
+ for (i = 5; i < 8; i++) {
+ vme_state_message[i] = 0;
}
- switch (encoder_context->profile) {
- case VAProfileH264Baseline:
- case VAProfileH264Main:
- case VAProfileH264High:
+ switch (encoder_context->codec) {
+ case CODEC_H264:
+ case CODEC_H264_MVC:
gen75_vme_state_setup_fixup(ctx, encode_state, encoder_context, vme_state_message);
break;
return VA_STATUS_SUCCESS;
}
-
static void
-gen75_vme_fill_vme_batchbuffer(VADriverContextP ctx,
+gen75_vme_fill_vme_batchbuffer(VADriverContextP ctx,
struct encode_state *encode_state,
int mb_width, int mb_height,
int kernel,
int mb_x = 0, mb_y = 0;
int i, s;
unsigned int *command_ptr;
+ struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
+ VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
+ VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
+ int qp;
+ int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
+ int qp_mb, qp_index;
+
+ if (encoder_context->rate_control_mode == VA_RC_CQP)
+ qp = pic_param->pic_init_qp + slice_param->slice_qp_delta;
+ else
+ qp = mfc_context->brc.qp_prime_y[encoder_context->layer.curr_frame_layer_id][slice_type];
dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
command_ptr = vme_context->vme_batchbuffer.bo->virtual;
for (s = 0; s < encode_state->num_slice_params_ext; s++) {
- VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
+ VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
int slice_mb_begin = pSliceParameter->macroblock_address;
int slice_mb_number = pSliceParameter->num_macroblocks;
unsigned int mb_intra_ub;
- int slice_mb_x = pSliceParameter->macroblock_address % mb_width;
- for (i = 0; i < slice_mb_number; ) {
- int mb_count = i + slice_mb_begin;
+ int slice_mb_x = pSliceParameter->macroblock_address % mb_width;
+ for (i = 0; i < slice_mb_number;) {
+ int mb_count = i + slice_mb_begin;
mb_x = mb_count % mb_width;
mb_y = mb_count / mb_width;
- mb_intra_ub = 0;
- if (mb_x != 0) {
- mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
- }
- if (mb_y != 0) {
- mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
- if (mb_x != 0)
+ mb_intra_ub = 0;
+ if (mb_x != 0) {
+ mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE;
+ }
+ if (mb_y != 0) {
+ mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B;
+ if (mb_x != 0)
mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
- if (mb_x != (mb_width -1))
+ if (mb_x != (mb_width - 1))
mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
- }
- if (i < mb_width) {
- if (i == 0)
+ }
+ if (i < mb_width) {
+ if (i == 0)
mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE);
- mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
- if ((i == (mb_width - 1)) && slice_mb_x) {
+ mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK);
+ if ((i == (mb_width - 1)) && slice_mb_x) {
mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
- }
- }
-
- if ((i == mb_width) && slice_mb_x) {
- mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
- }
- *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2));
+ }
+ }
+
+ if ((i == mb_width) && slice_mb_x) {
+ mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
+ }
+ *command_ptr++ = (CMD_MEDIA_OBJECT | (9 - 2));
*command_ptr++ = kernel;
*command_ptr++ = 0;
*command_ptr++ = 0;
*command_ptr++ = 0;
*command_ptr++ = 0;
-
+
/*inline data */
*command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
- *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
+ *command_ptr++ = ((encoder_context->quality_level << 24) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
+ /* qp occupies one byte */
+ if (vme_context->roi_enabled) {
+ qp_index = mb_y * mb_width + mb_x;
+ qp_mb = *(vme_context->qp_per_mb + qp_index);
+ } else
+ qp_mb = qp;
+ *command_ptr++ = qp_mb;
i += 1;
- }
+ }
}
*command_ptr++ = 0;
vme_context->vme_state.bo = NULL;
}
-static void gen75_vme_pipeline_programing(VADriverContextP ctx,
+static void gen75_vme_pipeline_programing(VADriverContextP ctx,
struct encode_state *encode_state,
struct intel_encoder_context *encoder_context)
{
int kernel_shader;
bool allow_hwscore = true;
int s;
-
- for (s = 0; s < encode_state->num_slice_params_ext; s++) {
- pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
- if ((pSliceParameter->macroblock_address % width_in_mbs)) {
- allow_hwscore = false;
- break;
- }
+ unsigned int is_low_quality = (encoder_context->quality_level == ENCODER_LOW_QUALITY);
+
+ if (is_low_quality)
+ allow_hwscore = false;
+ else {
+ for (s = 0; s < encode_state->num_slice_params_ext; s++) {
+ pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
+ if ((pSliceParameter->macroblock_address % width_in_mbs)) {
+ allow_hwscore = false;
+ break;
+ }
+ }
}
+
if ((pSliceParameter->slice_type == SLICE_TYPE_I) ||
- (pSliceParameter->slice_type == SLICE_TYPE_I)) {
- kernel_shader = VME_INTRA_SHADER;
- } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) ||
- (pSliceParameter->slice_type == SLICE_TYPE_SP)) {
- kernel_shader = VME_INTER_SHADER;
- } else {
- kernel_shader = VME_BINTER_SHADER;
- if (!allow_hwscore)
- kernel_shader = VME_INTER_SHADER;
- }
+ (pSliceParameter->slice_type == SLICE_TYPE_SI)) {
+ kernel_shader = VME_INTRA_SHADER;
+ } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) ||
+ (pSliceParameter->slice_type == SLICE_TYPE_SP)) {
+ kernel_shader = VME_INTER_SHADER;
+ } else {
+ kernel_shader = VME_BINTER_SHADER;
+ if (!allow_hwscore)
+ kernel_shader = VME_INTER_SHADER;
+ }
if (allow_hwscore)
- gen7_vme_walker_fill_vme_batchbuffer(ctx,
- encode_state,
- width_in_mbs, height_in_mbs,
- kernel_shader,
- pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
- encoder_context);
+ gen7_vme_walker_fill_vme_batchbuffer(ctx,
+ encode_state,
+ width_in_mbs, height_in_mbs,
+ kernel_shader,
+ pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
+ encoder_context);
else
- gen75_vme_fill_vme_batchbuffer(ctx,
- encode_state,
- width_in_mbs, height_in_mbs,
- kernel_shader,
- pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
- encoder_context);
+ gen75_vme_fill_vme_batchbuffer(ctx,
+ encode_state,
+ width_in_mbs, height_in_mbs,
+ kernel_shader,
+ pPicParameter->pic_fields.bits.transform_8x8_mode_flag,
+ encoder_context);
intel_batchbuffer_start_atomic(batch, 0x1000);
gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
BEGIN_BATCH(batch, 2);
- OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
+ OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8));
OUT_RELOC(batch,
vme_context->vme_batchbuffer.bo,
- I915_GEM_DOMAIN_COMMAND, 0,
+ I915_GEM_DOMAIN_COMMAND, 0,
0);
ADVANCE_BATCH(batch);
- intel_batchbuffer_end_atomic(batch);
+ intel_batchbuffer_end_atomic(batch);
}
-static VAStatus gen75_vme_prepare(VADriverContextP ctx,
+static VAStatus gen75_vme_prepare(VADriverContextP ctx,
struct encode_state *encode_state,
struct intel_encoder_context *encoder_context)
{
if (!vme_context->h264_level ||
(vme_context->h264_level != pSequenceParameter->level_idc)) {
- vme_context->h264_level = pSequenceParameter->level_idc;
- }
+ vme_context->h264_level = pSequenceParameter->level_idc;
+ }
intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context);
-
+ intel_h264_initialize_mbmv_cost(ctx, encode_state, encoder_context);
+ intel_h264_enc_roi_config(ctx, encode_state, encoder_context);
+
/*Setup all the memory object*/
gen75_vme_surface_setup(ctx, encode_state, is_intra, encoder_context);
gen75_vme_interface_setup(ctx, encode_state, encoder_context);
//gen75_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context);
- gen75_vme_constant_setup(ctx, encode_state, encoder_context);
+ gen75_vme_constant_setup(ctx, encode_state, encoder_context, (pSliceParameter->slice_type == SLICE_TYPE_B) ? 2 : 1);
/*Programing media pipeline*/
gen75_vme_pipeline_programing(ctx, encode_state, encoder_context);
return vaStatus;
}
-static VAStatus gen75_vme_run(VADriverContextP ctx,
+static VAStatus gen75_vme_run(VADriverContextP ctx,
struct encode_state *encode_state,
struct intel_encoder_context *encoder_context)
{
return VA_STATUS_SUCCESS;
}
-static VAStatus gen75_vme_stop(VADriverContextP ctx,
+static VAStatus gen75_vme_stop(VADriverContextP ctx,
struct encode_state *encode_state,
struct intel_encoder_context *encoder_context)
{
* 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24.
*/
- vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
+ vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr,
"VME output buffer",
vme_context->vme_output.num_blocks * vme_context->vme_output.size_block,
0x1000);
vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1;
vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */
vme_context->vme_batchbuffer.pitch = 16;
- vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
+ vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr,
"VME batchbuffer",
vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block,
0x1000);
}
static VAStatus
-gen75_vme_mpeg2_surface_setup(VADriverContextP ctx,
+gen75_vme_mpeg2_surface_setup(VADriverContextP ctx,
struct encode_state *encode_state,
int is_intra,
struct intel_encoder_context *encoder_context)
/* reference 1 */
obj_surface = encode_state->reference_objects[1];
- if (obj_surface && obj_surface->bo != NULL)
+ if (obj_surface && obj_surface->bo != NULL)
gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context);
}
}
static void
-gen75_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx,
+gen75_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx,
struct encode_state *encode_state,
int mb_width, int mb_height,
int kernel,
int slice_mb_x = slice_param->macroblock_address % mb_width;
for (i = 0; i < slice_mb_number;) {
- int mb_count = i + slice_mb_begin;
+ int mb_count = i + slice_mb_begin;
mb_x = mb_count % mb_width;
mb_y = mb_count / mb_width;
if (mb_x != 0)
mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D;
- if (mb_x != (mb_width -1))
+ if (mb_x != (mb_width - 1))
mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
}
mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C;
}
}
-
+
if ((i == mb_width) && slice_mb_x) {
mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D);
}
*command_ptr++ = 0;
*command_ptr++ = 0;
*command_ptr++ = 0;
-
+
/*inline data */
*command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
- *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
+ *command_ptr++ = ((1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
i += 1;
}
}
static void
-gen75_vme_mpeg2_pipeline_programing(VADriverContextP ctx,
+gen75_vme_mpeg2_pipeline_programing(VADriverContextP ctx,
struct encode_state *encode_state,
int is_intra,
struct intel_encoder_context *encoder_context)
{
struct gen6_vme_context *vme_context = encoder_context->vme_context;
struct intel_batchbuffer *batch = encoder_context->base.batch;
+ VAEncPictureParameterBufferMPEG2 *pic_param = NULL;
VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16;
int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16;
+ bool allow_hwscore = true;
+ int s;
+ int kernel_shader;
- gen75_vme_mpeg2_fill_vme_batchbuffer(ctx,
- encode_state,
- width_in_mbs, height_in_mbs,
- is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER,
- 0,
- encoder_context);
+ pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer;
+
+ for (s = 0; s < encode_state->num_slice_params_ext; s++) {
+ int j;
+ VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer;
+
+ for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) {
+ if (slice_param->macroblock_address % width_in_mbs) {
+ allow_hwscore = false;
+ break;
+ }
+ }
+ }
+
+ pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer;
+ if (pic_param->picture_type == VAEncPictureTypeIntra) {
+ allow_hwscore = false;
+ kernel_shader = VME_INTRA_SHADER;
+ } else {
+ kernel_shader = VME_INTER_SHADER;
+ }
+
+ if (allow_hwscore)
+ gen7_vme_mpeg2_walker_fill_vme_batchbuffer(ctx,
+ encode_state,
+ width_in_mbs, height_in_mbs,
+ kernel_shader,
+ encoder_context);
+ else
+ gen75_vme_mpeg2_fill_vme_batchbuffer(ctx,
+ encode_state,
+ width_in_mbs, height_in_mbs,
+ kernel_shader,
+ 0,
+ encoder_context);
intel_batchbuffer_start_atomic(batch, 0x1000);
gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
BEGIN_BATCH(batch, 2);
- OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6));
+ OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8));
OUT_RELOC(batch,
vme_context->vme_batchbuffer.bo,
- I915_GEM_DOMAIN_COMMAND, 0,
+ I915_GEM_DOMAIN_COMMAND, 0,
0);
ADVANCE_BATCH(batch);
- intel_batchbuffer_end_atomic(batch);
+ intel_batchbuffer_end_atomic(batch);
}
-static VAStatus
-gen75_vme_mpeg2_prepare(VADriverContextP ctx,
+static VAStatus
+gen75_vme_mpeg2_prepare(VADriverContextP ctx,
struct encode_state *encode_state,
struct intel_encoder_context *encoder_context)
{
VAStatus vaStatus = VA_STATUS_SUCCESS;
VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer;
-
+
+ VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer;
+ struct gen6_vme_context *vme_context = encoder_context->vme_context;
+
+ if ((!vme_context->mpeg2_level) ||
+ (vme_context->mpeg2_level != (seq_param->sequence_extension.bits.profile_and_level_indication & MPEG2_LEVEL_MASK))) {
+ vme_context->mpeg2_level = seq_param->sequence_extension.bits.profile_and_level_indication & MPEG2_LEVEL_MASK;
+ }
+
/*Setup all the memory object*/
gen75_vme_mpeg2_surface_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
gen75_vme_interface_setup(ctx, encode_state, encoder_context);
gen75_vme_vme_state_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
- gen75_vme_constant_setup(ctx, encode_state, encoder_context);
+ intel_vme_mpeg2_state_setup(ctx, encode_state, encoder_context);
+ gen75_vme_constant_setup(ctx, encode_state, encoder_context, 1);
/*Programing media pipeline*/
gen75_vme_mpeg2_pipeline_programing(ctx, encode_state, slice_param->is_intra_slice, encoder_context);
dri_bo_unreference(vme_context->vme_batchbuffer.bo);
vme_context->vme_batchbuffer.bo = NULL;
- if (vme_context->vme_state_message) {
- free(vme_context->vme_state_message);
- vme_context->vme_state_message = NULL;
- }
+ free(vme_context->vme_state_message);
+ vme_context->vme_state_message = NULL;
+
+ dri_bo_unreference(vme_context->i_qp_cost_table);
+ vme_context->i_qp_cost_table = NULL;
+
+ dri_bo_unreference(vme_context->p_qp_cost_table);
+ vme_context->p_qp_cost_table = NULL;
+
+ dri_bo_unreference(vme_context->b_qp_cost_table);
+ vme_context->b_qp_cost_table = NULL;
+
+ free(vme_context->qp_per_mb);
+ vme_context->qp_per_mb = NULL;
free(vme_context);
}
{
struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context));
struct i965_kernel *vme_kernel_list = NULL;
- int i965_kernel_num;
+ int i965_kernel_num;
- switch (encoder_context->profile) {
- case VAProfileH264Baseline:
- case VAProfileH264Main:
- case VAProfileH264High:
+ switch (encoder_context->codec) {
+ case CODEC_H264:
+ case CODEC_H264_MVC:
vme_kernel_list = gen75_vme_kernels;
encoder_context->vme_pipeline = gen75_vme_pipeline;
- i965_kernel_num = sizeof(gen75_vme_kernels) / sizeof(struct i965_kernel);
+ i965_kernel_num = sizeof(gen75_vme_kernels) / sizeof(struct i965_kernel);
break;
- case VAProfileMPEG2Simple:
- case VAProfileMPEG2Main:
+ case CODEC_MPEG2:
vme_kernel_list = gen75_vme_mpeg2_kernels;
encoder_context->vme_pipeline = gen75_vme_mpeg2_pipeline;
- i965_kernel_num = sizeof(gen75_vme_mpeg2_kernels) / sizeof(struct i965_kernel);
+ i965_kernel_num = sizeof(gen75_vme_mpeg2_kernels) / sizeof(struct i965_kernel);
break;
break;
}
+
+ assert(vme_context);
vme_context->vme_kernel_sum = i965_kernel_num;
vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH;
vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
- vme_context->gpe_context.vfe_state.num_urb_entries = 16;
+ vme_context->gpe_context.vfe_state.num_urb_entries = 64;
vme_context->gpe_context.vfe_state.gpgpu_mode = 0;
- vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1;
+ vme_context->gpe_context.vfe_state.urb_entry_size = 16;
vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1;
gen7_vme_scoreboard_init(ctx, vme_context);
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