int target_frame_size[3]; // I,P,B
double bits_per_frame;
double qpf_rounding_accumulator;
-
- double saved_bps;
- double saved_fps;
- int saved_intra_period;
- int saved_ip_period;
- int saved_idr_period;
} brc;
struct {
int frame_bits);
extern void intel_hcpe_hrd_context_update(struct encode_state *encode_state,
- struct gen9_hcpe_context *hcpe_context);
+ struct gen9_hcpe_context *hcpe_context);
extern int intel_hcpe_interlace_check(VADriverContextP ctx,
struct encode_state *encode_state,
/* HEVC HCP pipeline */
extern void intel_hcpe_hevc_pipeline_header_programing(VADriverContextP ctx,
- struct encode_state *encode_state,
- struct intel_encoder_context *encoder_context,
- struct intel_batchbuffer *slice_batch);
+ struct encode_state *encode_state,
+ struct intel_encoder_context *encoder_context,
+ struct intel_batchbuffer *slice_batch);
extern VAStatus intel_hcpe_hevc_prepare(VADriverContextP ctx,
struct encode_state *encode_state,