ENC:disable SVC feature of AVC encoder on SKL/APL/KBL

[android-x86/hardware-intel-common-vaapi.git] / src / gen9_mfd.c

diff --git a/src/gen9_mfd.c b/src/gen9_mfd.c
index f178c03..fed1bc1 100644 (file)
--- a/src/gen9_mfd.c
+++ b/src/gen9_mfd.c
@@ -43,17 +43,17 @@
 
 #define OUT_BUFFER(buf_bo, is_target, ma)  do {                         \
         if (buf_bo) {                                                   \
-            OUT_BCS_RELOC(batch,                                        \
+            OUT_BCS_RELOC64(batch,                                        \
                           buf_bo,                                       \
                           I915_GEM_DOMAIN_RENDER,                       \
                           is_target ? I915_GEM_DOMAIN_RENDER : 0,       \
                           0);                                           \
         } else {                                                        \
             OUT_BCS_BATCH(batch, 0);                                    \
+            OUT_BCS_BATCH(batch, 0);                                    \
         }                                                               \
-        OUT_BCS_BATCH(batch, 0);                                        \
         if (ma)                                                         \
-            OUT_BCS_BATCH(batch, 0);                                    \
+            OUT_BCS_BATCH(batch, i965->intel.mocs_state);                                    \
     } while (0)
 
 #define OUT_BUFFER_MA_TARGET(buf_bo)       OUT_BUFFER(buf_bo, 1, 1)
@@ -269,6 +269,7 @@ gen9_hcpd_pipe_buf_addr_state(VADriverContextP ctx,
                               struct decode_state *decode_state,
                               struct gen9_hcpd_context *gen9_hcpd_context)
 {
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
     struct object_surface *obj_surface;
     GenHevcSurface *gen9_hevc_surface;
@@ -338,6 +339,7 @@ gen9_hcpd_ind_obj_base_addr_state(VADriverContextP ctx,
                                   dri_bo *slice_data_bo,
                                   struct gen9_hcpd_context *gen9_hcpd_context)
 {
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
 
     BEGIN_BCS_BATCH(batch, 14);
@@ -1396,6 +1398,7 @@ gen9_hcpd_vp9_pipe_buf_addr_state(VADriverContextP ctx,
                               struct decode_state *decode_state,
                               struct gen9_hcpd_context *gen9_hcpd_context)
 {
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
     struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
     struct object_surface *obj_surface;
     int i=0;
@@ -1989,3 +1992,17 @@ gen9_dec_hw_context_init(VADriverContextP ctx, struct object_config *obj_config)
         return gen8_dec_hw_context_init(ctx, obj_config);
     }
 }
+
+void gen9_max_resolution(struct i965_driver_data *i965,
+                         struct object_config *obj_config,
+                         int *w,                                /* out */
+                         int *h)                                /* out */
+{
+    if (obj_config->profile == VAProfileJPEGBaseline) {
+        *w = 8192;
+        *h = 8192;
+    } else {
+        *w = i965->codec_info->max_width;
+        *h = i965->codec_info->max_height;
+    }
+}