Fix the incorrect ver-coord for VDENC encoding

[android-x86/hardware-intel-common-vaapi.git] / src / gen9_vme.c

diff --git a/src/gen9_vme.c b/src/gen9_vme.c
index 5a3bd38..e98dc71 100644 (file)
--- a/src/gen9_vme.c
+++ b/src/gen9_vme.c
@@ -43,6 +43,7 @@
 #include "gen9_mfc.h"
 #include "intel_media.h"
 #include "gen9_vp9_encapi.h"
+#include "i965_post_processing.h"
 
 #ifdef SURFACE_STATE_PADDED_SIZE
 #undef SURFACE_STATE_PADDED_SIZE
@@ -375,10 +376,10 @@ static VAStatus gen9_vme_interface_setup(VADriverContextP ctx,
     dri_bo *bo;
     unsigned char *desc_ptr;
 
-    bo = vme_context->gpe_context.dynamic_state.bo;
+    bo = vme_context->gpe_context.idrt.bo;
     dri_bo_map(bo, 1);
     assert(bo->virtual);
-    desc_ptr = (unsigned char *)bo->virtual + vme_context->gpe_context.idrt_offset;
+    desc_ptr = (unsigned char *)bo->virtual + vme_context->gpe_context.idrt.offset;
 
     desc = (struct gen8_interface_descriptor_data *)desc_ptr;
 
@@ -437,10 +438,10 @@ static VAStatus gen9_vme_constant_setup(VADriverContextP ctx,
 
     vme_state_message[31] = mv_num;
 
-    dri_bo_map(vme_context->gpe_context.dynamic_state.bo, 1);
-    assert(vme_context->gpe_context.dynamic_state.bo->virtual);
-    constant_buffer = (unsigned char *)vme_context->gpe_context.dynamic_state.bo->virtual +
-                                         vme_context->gpe_context.curbe_offset;
+    dri_bo_map(vme_context->gpe_context.curbe.bo, 1);
+    assert(vme_context->gpe_context.curbe.bo->virtual);
+    constant_buffer = (unsigned char *)vme_context->gpe_context.curbe.bo->virtual +
+                                         vme_context->gpe_context.curbe.offset;
 
     /* VME MV/Mb cost table is passed by using const buffer */
     /* Now it uses the fixed search path. So it is constructed directly
@@ -448,7 +449,7 @@ static VAStatus gen9_vme_constant_setup(VADriverContextP ctx,
      */
     memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128);
 
-    dri_bo_unmap(vme_context->gpe_context.dynamic_state.bo);
+    dri_bo_unmap(vme_context->gpe_context.curbe.bo);
 
     return VA_STATUS_SUCCESS;
 }
@@ -623,7 +624,7 @@ gen9_vme_fill_vme_batchbuffer(VADriverContextP ctx,
     if (encoder_context->rate_control_mode == VA_RC_CQP)
         qp = pic_param->pic_init_qp + slice_param->slice_qp_delta;
     else
-        qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
+        qp = mfc_context->brc.qp_prime_y[encoder_context->layer.curr_frame_layer_id][slice_type];
 
     dri_bo_map(vme_context->vme_batchbuffer.bo, 1);
     command_ptr = vme_context->vme_batchbuffer.bo->virtual;
@@ -767,11 +768,10 @@ static void gen9_vme_pipeline_programing(VADriverContextP ctx,
     gen9_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
     BEGIN_BATCH(batch, 3);
     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0));
-    OUT_RELOC(batch,
+    OUT_RELOC64(batch,
               vme_context->vme_batchbuffer.bo,
               I915_GEM_DOMAIN_COMMAND, 0,
               0);
-    OUT_BATCH(batch, 0);
     ADVANCE_BATCH(batch);
 
     gen9_gpe_pipeline_end(ctx, &vme_context->gpe_context, batch);
@@ -1161,12 +1161,11 @@ gen9_vme_mpeg2_pipeline_programing(VADriverContextP ctx,
     gen9_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
     BEGIN_BATCH(batch, 4);
     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0));
-    OUT_RELOC(batch,
+    OUT_RELOC64(batch,
               vme_context->vme_batchbuffer.bo,
               I915_GEM_DOMAIN_COMMAND, 0,
               0);
     OUT_BATCH(batch, 0);
-    OUT_BATCH(batch, 0);
     ADVANCE_BATCH(batch);
 
     gen9_gpe_pipeline_end(ctx, &vme_context->gpe_context, batch);
@@ -1302,12 +1301,11 @@ gen9_vme_vp8_pipeline_programing(VADriverContextP ctx,
     gen9_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
     BEGIN_BATCH(batch, 4);
     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0));
-    OUT_RELOC(batch,
+    OUT_RELOC64(batch,
               vme_context->vme_batchbuffer.bo,
               I915_GEM_DOMAIN_COMMAND, 0,
               0);
     OUT_BATCH(batch, 0);
-    OUT_BATCH(batch, 0);
     ADVANCE_BATCH(batch);
 
     gen9_gpe_pipeline_end(ctx, &vme_context->gpe_context, batch);
@@ -1736,11 +1734,10 @@ static void gen9_vme_hevc_pipeline_programing(VADriverContextP ctx,
     gen9_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch);
     BEGIN_BATCH(batch, 3);
     OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0));
-    OUT_RELOC(batch,
+    OUT_RELOC64(batch,
               vme_context->vme_batchbuffer.bo,
               I915_GEM_DOMAIN_COMMAND, 0,
               0);
-    OUT_BATCH(batch, 0);
     ADVANCE_BATCH(batch);
 
     gen9_gpe_pipeline_end(ctx, &vme_context->gpe_context, batch);
@@ -1840,7 +1837,6 @@ static VAStatus gen9_intel_init_hevc_surface(VADriverContextP ctx,
             &rect);
         assert(status == VA_STATUS_SUCCESS);
         hevc_encoder_surface->has_p010_to_nv12_done = 1;
-        i965_SyncSurface(ctx,hevc_encoder_surface->nv12_surface_id);
     }
     return VA_STATUS_SUCCESS;
 }
@@ -1854,6 +1850,7 @@ static VAStatus gen9_intel_hevc_input_check(VADriverContextP ctx,
     struct object_surface *obj_surface;
     GenHevcSurface *hevc_encoder_surface = NULL;
     int i;
+    int fourcc;
 
     obj_surface = SURFACE(encode_state->current_render_target);
     assert(obj_surface && obj_surface->bo);
@@ -1862,8 +1859,13 @@ static VAStatus gen9_intel_hevc_input_check(VADriverContextP ctx,
         hevc_encoder_surface->has_p010_to_nv12_done = 0;
     gen9_intel_init_hevc_surface(ctx,encoder_context,encode_state,obj_surface);
 
+    fourcc = obj_surface->fourcc;
     /* Setup current frame and current direct mv buffer*/
     obj_surface = encode_state->reconstructed_object;
+    if(fourcc == VA_FOURCC_P010)
+        i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_P010, SUBSAMPLE_YUV420);
+    else
+        i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420);
     hevc_encoder_surface = NULL;
     hevc_encoder_surface = (GenHevcSurface *) obj_surface->private_data;
     if(hevc_encoder_surface)
@@ -1972,6 +1974,7 @@ gen9_vme_context_destroy(void *context)
 
 Bool gen9_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
 {
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
     struct gen6_vme_context *vme_context;
     struct i965_kernel *vme_kernel_list = NULL;
     int i965_kernel_num;
@@ -2025,12 +2028,18 @@ Bool gen9_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *e
     vme_context->vme_kernel_sum = i965_kernel_num;
     vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6;
 
-    vme_context->gpe_context.idrt_size = sizeof(struct gen8_interface_descriptor_data) * MAX_INTERFACE_DESC_GEN6;
-    vme_context->gpe_context.curbe_size = CURBE_TOTAL_DATA_LENGTH;
-    vme_context->gpe_context.sampler_size = 0;
+    vme_context->gpe_context.idrt.entry_size = ALIGN(sizeof(struct gen8_interface_descriptor_data), 64);
+    vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6;
+    vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH;
+    vme_context->gpe_context.sampler.entry_size = 0;
+    vme_context->gpe_context.sampler.max_entries = 0;
 
+    if (i965->intel.eu_total > 0) {
+        vme_context->gpe_context.vfe_state.max_num_threads = 6 *
+                              i965->intel.eu_total;
+    } else
+        vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
 
-    vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1;
     vme_context->gpe_context.vfe_state.num_urb_entries = 64;
     vme_context->gpe_context.vfe_state.gpgpu_mode = 0;
     vme_context->gpe_context.vfe_state.urb_entry_size = 16;