/*
- * Copyright © 2009 Intel Corporation
+ * Copyright ?2009 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
#include <va/va.h>
#include <va/va_enc_h264.h>
#include <va/va_enc_mpeg2.h>
+#include <va/va_enc_hevc.h>
+#include <va/va_enc_jpeg.h>
+#include <va/va_enc_vp8.h>
#include <va/va_vpp.h>
#include <va/va_backend.h>
#include <va/va_backend_vpp.h>
#define I965_MAX_PROFILES 20
#define I965_MAX_ENTRYPOINTS 5
-#define I965_MAX_CONFIG_ATTRIBUTES 10
+#define I965_MAX_CONFIG_ATTRIBUTES 32
#define I965_MAX_IMAGE_FORMATS 10
#define I965_MAX_SUBPIC_FORMATS 6
#define I965_MAX_SUBPIC_SUM 4
#define DEFAULT_SATURATION 50
#define ENCODER_QUALITY_RANGE 2
+#define ENCODER_QUALITY_RANGE_AVC 8
#define ENCODER_DEFAULT_QUALITY 1
+#define ENCODER_DEFAULT_QUALITY_AVC 4
#define ENCODER_HIGH_QUALITY ENCODER_DEFAULT_QUALITY
#define ENCODER_LOW_QUALITY 2
+#define I965_MAX_NUM_ROI_REGIONS 8
+
+#define ENCODER_LP_QUALITY_RANGE 8
+
+#define HAS_MPEG2_DECODING(ctx) ((ctx)->codec_info->has_mpeg2_decoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_MPEG2_ENCODING(ctx) ((ctx)->codec_info->has_mpeg2_encoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_H264_DECODING(ctx) ((ctx)->codec_info->has_h264_decoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_H264_ENCODING(ctx) ((ctx)->codec_info->has_h264_encoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_LP_H264_ENCODING(ctx) ((ctx)->codec_info->has_lp_h264_encoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_VC1_DECODING(ctx) ((ctx)->codec_info->has_vc1_decoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_JPEG_DECODING(ctx) ((ctx)->codec_info->has_jpeg_decoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_JPEG_ENCODING(ctx) ((ctx)->codec_info->has_jpeg_encoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_VPP(ctx) ((ctx)->codec_info->has_vpp)
+
+#define HAS_ACCELERATED_GETIMAGE(ctx) ((ctx)->codec_info->has_accelerated_getimage)
+
+#define HAS_ACCELERATED_PUTIMAGE(ctx) ((ctx)->codec_info->has_accelerated_putimage)
+
+#define HAS_TILED_SURFACE(ctx) ((ctx)->codec_info->has_tiled_surface)
+
+#define HAS_VP8_DECODING(ctx) ((ctx)->codec_info->has_vp8_decoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_VP8_ENCODING(ctx) ((ctx)->codec_info->has_vp8_encoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_H264_MVC_DECODING(ctx) \
+ (HAS_H264_DECODING(ctx) && (ctx)->codec_info->h264_mvc_dec_profiles)
+
+#define HAS_H264_MVC_DECODING_PROFILE(ctx, profile) \
+ (HAS_H264_MVC_DECODING(ctx) && \
+ ((ctx)->codec_info->h264_mvc_dec_profiles & (1U << profile)))
+
+#define HAS_H264_MVC_ENCODING(ctx) ((ctx)->codec_info->has_h264_mvc_encoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_HEVC_DECODING(ctx) ((ctx)->codec_info->has_hevc_decoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_HEVC_ENCODING(ctx) ((ctx)->codec_info->has_hevc_encoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_VP9_DECODING(ctx) ((ctx)->codec_info->has_vp9_decoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_VP9_DECODING_PROFILE(ctx, profile) \
+ (HAS_VP9_DECODING(ctx) && \
+ ((ctx)->codec_info->vp9_dec_profiles & (1U << (profile - VAProfileVP9Profile0))))
+
+#define HAS_HEVC10_DECODING(ctx) ((ctx)->codec_info->has_hevc10_decoding && \
+ (ctx)->intel.has_bsd)
+#define HAS_HEVC10_ENCODING(ctx) ((ctx)->codec_info->has_hevc10_encoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_VPP_P010(ctx) ((ctx)->codec_info->has_vpp_p010 && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_VP9_ENCODING(ctx) ((ctx)->codec_info->has_vp9_encoding && \
+ (ctx)->intel.has_bsd)
+
+#define HAS_VP9_ENCODING_PROFILE(ctx, profile) \
+ (HAS_VP9_ENCODING(ctx) && \
+ ((ctx)->codec_info->vp9_enc_profiles & (1U << (profile - VAProfileVP9Profile0))))
+
struct i965_surface
{
struct object_base *base;
VAEntrypoint entrypoint;
VAConfigAttrib attrib_list[I965_MAX_CONFIG_ATTRIBUTES];
int num_attribs;
+
+ VAGenericID wrapper_config;
};
#define NUM_SLICES 10
struct encode_state
{
struct codec_state_base base;
- struct buffer_store *seq_param;
- struct buffer_store *pic_param;
- struct buffer_store *pic_control;
struct buffer_store *iq_matrix;
struct buffer_store *q_matrix;
- struct buffer_store **slice_params;
- int max_slice_params;
- int num_slice_params;
+ struct buffer_store *huffman_table;
/* for ext */
struct buffer_store *seq_param_ext;
struct buffer_store *pic_param_ext;
- struct buffer_store *packed_header_param[4];
- struct buffer_store *packed_header_data[4];
+ struct buffer_store *packed_header_param[5];
+ struct buffer_store *packed_header_data[5];
struct buffer_store **slice_params_ext;
+ struct buffer_store *encmb_map;
int max_slice_params_ext;
int num_slice_params_ext;
int max_packed_header_data_ext;
int num_packed_header_data_ext;
+ /* the index of current vps and sps ,special for HEVC*/
+ int vps_sps_seq_index;
/* the index of current slice */
int slice_index;
/* the array is determined by max_slice_params_ext */
int last_packed_header_type;
- struct buffer_store *misc_param[16];
+ int has_layers;
+
+ struct buffer_store *misc_param[16][8];
VASurfaceID current_render_target;
struct object_surface *input_yuv_object;
union codec_state *codec_state,
struct hw_context *hw_context);
void (*destroy)(void *);
+ VAStatus (*get_status)(VADriverContextP ctx,
+ struct hw_context *hw_context,
+ void *buffer);
struct intel_batchbuffer *batch;
};
int codec_type;
union codec_state codec_state;
struct hw_context *hw_context;
+
+ VAGenericID wrapper_context;
};
#define SURFACE_REFERENCED (1 << 0)
int flags;
unsigned int fourcc;
dri_bo *bo;
+ unsigned int expected_format;
VAImageID locked_image_id;
+ VAImageID derived_image_id;
void (*free_private_data)(void **data);
void *private_data;
unsigned int subsampling;
uint32_t user_disable_tiling : 1;
uint32_t user_h_stride_set : 1;
uint32_t user_v_stride_set : 1;
+ /* we need clear right and bottom border for NV12.
+ * to avoid encode run to run issue*/
+ uint32_t border_cleared : 1;
+
+ VAGenericID wrapper_surface;
+
+ int exported_primefd;
};
struct object_buffer
/* Export state */
unsigned int export_refcount;
VABufferInfo export_state;
+
+ VAGenericID wrapper_buffer;
+ VAContextID context_id;
};
struct object_image
int ring;
};
+struct i965_driver_data;
+
struct hw_codec_info
{
struct hw_context *(*dec_hw_context_init)(VADriverContextP, struct object_config *);
struct hw_context *(*proc_hw_context_init)(VADriverContextP, struct object_config *);
bool (*render_init)(VADriverContextP);
void (*post_processing_context_init)(VADriverContextP, void *, struct intel_batchbuffer *);
+ void (*preinit_hw_codec)(VADriverContextP, struct hw_codec_info *);
+
+ /**
+ * Allows HW info to support per-codec max resolution. If this functor is
+ * not initialized, then @max_width and @max_height will be used as the
+ * default maximum resolution for all codecs on this HW info.
+ */
+ void (*max_resolution)(struct i965_driver_data *, struct object_config *, int *, int *);
int max_width;
int max_height;
int min_linear_hpitch;
unsigned int h264_mvc_dec_profiles;
+ unsigned int vp9_dec_profiles;
+ unsigned int vp9_enc_profiles;
+
unsigned int h264_dec_chroma_formats;
unsigned int jpeg_dec_chroma_formats;
+ unsigned int jpeg_enc_chroma_formats;
+ unsigned int hevc_dec_chroma_formats;
+ unsigned int vp9_dec_chroma_formats;
unsigned int has_mpeg2_decoding:1;
unsigned int has_mpeg2_encoding:1;
unsigned int has_vp8_decoding:1;
unsigned int has_vp8_encoding:1;
unsigned int has_h264_mvc_encoding:1;
+ unsigned int has_hevc_decoding:1;
+ unsigned int has_hevc_encoding:1;
+ unsigned int has_hevc10_encoding:1;
+ unsigned int has_hevc10_decoding:1;
+ unsigned int has_vp9_decoding:1;
+ unsigned int has_vpp_p010:1;
+ unsigned int has_lp_h264_encoding:1;
+ unsigned int has_vp9_encoding:1;
+
+ unsigned int lp_h264_brc_mode;
unsigned int num_filters;
struct i965_filter filters[VAProcFilterCount];
#include "i965_render.h"
+#include "i965_gpe_utils.h"
struct i965_driver_data
{
struct object_heap buffer_heap;
struct object_heap image_heap;
struct object_heap subpic_heap;
- const struct hw_codec_info *codec_info;
+ struct hw_codec_info *codec_info;
_I965Mutex render_mutex;
_I965Mutex pp_mutex;
/* VA/Wayland specific data */
struct va_wl_output *wl_output;
+
+ VADriverContextP wrapper_pdrvctx;
+
+ struct i965_gpe_table gpe_table;
};
#define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);
#define CODEC_H264 0
#define CODEC_MPEG2 1
#define CODEC_H264_MVC 2
+#define CODEC_JPEG 3
+#define CODEC_VP8 4
+#define CODEC_HEVC 5
+#define CODEC_VP9 6
#define H264_DELIMITER0 0x00
#define H264_DELIMITER1 0x00
#define MPEG2_DELIMITER3 0x00
#define MPEG2_DELIMITER4 0xb0
+#define HEVC_DELIMITER0 0x00
+#define HEVC_DELIMITER1 0x00
+#define HEVC_DELIMITER2 0x00
+#define HEVC_DELIMITER3 0x00
+#define HEVC_DELIMITER4 0x00
+
struct i965_coded_buffer_segment
{
- VACodedBufferSegment base;
- unsigned char mapped;
- unsigned char codec;
+ union {
+ VACodedBufferSegment base;
+ unsigned char pad0[64]; /* change the size if sizeof(VACodedBufferSegment) > 64 */
+ };
+
+ unsigned int mapped;
+ unsigned int codec;
+ unsigned int status_support;
+ unsigned int pad1;
+
+ unsigned int codec_private_data[512]; /* Store codec private data, must be 16-bytes aligned */
};
-#define I965_CODEDBUFFER_HEADER_SIZE ALIGN(sizeof(struct i965_coded_buffer_segment), 64)
+#define I965_CODEDBUFFER_HEADER_SIZE ALIGN(sizeof(struct i965_coded_buffer_segment), 0x1000)
extern VAStatus i965_MapBuffer(VADriverContextP ctx,
VABufferID buf_id, /* in */