ENC:support more quality level and switch to new AVC encoder solution on SKL

[android-x86/hardware-intel-common-vaapi.git] / src / i965_drv_video.h

diff --git a/src/i965_drv_video.h b/src/i965_drv_video.h
index b8d61a1..334b788 100644 (file)
--- a/src/i965_drv_video.h
+++ b/src/i965_drv_video.h
@@ -69,12 +69,92 @@
 #define DEFAULT_SATURATION      50
 
 #define ENCODER_QUALITY_RANGE     2
+#define ENCODER_QUALITY_RANGE_AVC     8
 #define ENCODER_DEFAULT_QUALITY   1
+#define ENCODER_DEFAULT_QUALITY_AVC   4
 #define ENCODER_HIGH_QUALITY      ENCODER_DEFAULT_QUALITY
 #define ENCODER_LOW_QUALITY       2
 
+#define I965_MAX_NUM_ROI_REGIONS                     8
+
 #define ENCODER_LP_QUALITY_RANGE  8
 
+#define HAS_MPEG2_DECODING(ctx)  ((ctx)->codec_info->has_mpeg2_decoding && \
+                                  (ctx)->intel.has_bsd)
+
+#define HAS_MPEG2_ENCODING(ctx)  ((ctx)->codec_info->has_mpeg2_encoding && \
+                                  (ctx)->intel.has_bsd)
+
+#define HAS_H264_DECODING(ctx)  ((ctx)->codec_info->has_h264_decoding && \
+                                 (ctx)->intel.has_bsd)
+
+#define HAS_H264_ENCODING(ctx)  ((ctx)->codec_info->has_h264_encoding && \
+                                 (ctx)->intel.has_bsd)
+
+#define HAS_LP_H264_ENCODING(ctx)  ((ctx)->codec_info->has_lp_h264_encoding && \
+                                    (ctx)->intel.has_bsd)
+
+#define HAS_VC1_DECODING(ctx)   ((ctx)->codec_info->has_vc1_decoding && \
+                                 (ctx)->intel.has_bsd)
+
+#define HAS_JPEG_DECODING(ctx)  ((ctx)->codec_info->has_jpeg_decoding && \
+                                 (ctx)->intel.has_bsd)
+
+#define HAS_JPEG_ENCODING(ctx)  ((ctx)->codec_info->has_jpeg_encoding && \
+                                 (ctx)->intel.has_bsd)
+
+#define HAS_VPP(ctx)    ((ctx)->codec_info->has_vpp)
+
+#define HAS_ACCELERATED_GETIMAGE(ctx)   ((ctx)->codec_info->has_accelerated_getimage)
+
+#define HAS_ACCELERATED_PUTIMAGE(ctx)   ((ctx)->codec_info->has_accelerated_putimage)
+
+#define HAS_TILED_SURFACE(ctx) ((ctx)->codec_info->has_tiled_surface)
+
+#define HAS_VP8_DECODING(ctx)   ((ctx)->codec_info->has_vp8_decoding && \
+                                 (ctx)->intel.has_bsd)
+
+#define HAS_VP8_ENCODING(ctx)   ((ctx)->codec_info->has_vp8_encoding && \
+                                 (ctx)->intel.has_bsd)
+
+#define HAS_H264_MVC_DECODING(ctx) \
+    (HAS_H264_DECODING(ctx) && (ctx)->codec_info->h264_mvc_dec_profiles)
+
+#define HAS_H264_MVC_DECODING_PROFILE(ctx, profile)                     \
+    (HAS_H264_MVC_DECODING(ctx) &&                                      \
+     ((ctx)->codec_info->h264_mvc_dec_profiles & (1U << profile)))
+
+#define HAS_H264_MVC_ENCODING(ctx)  ((ctx)->codec_info->has_h264_mvc_encoding && \
+                                     (ctx)->intel.has_bsd)
+
+#define HAS_HEVC_DECODING(ctx)          ((ctx)->codec_info->has_hevc_decoding && \
+                                         (ctx)->intel.has_bsd)
+
+#define HAS_HEVC_ENCODING(ctx)          ((ctx)->codec_info->has_hevc_encoding && \
+                                         (ctx)->intel.has_bsd)
+
+#define HAS_VP9_DECODING(ctx)          ((ctx)->codec_info->has_vp9_decoding && \
+                                         (ctx)->intel.has_bsd)
+
+#define HAS_VP9_DECODING_PROFILE(ctx, profile)                     \
+    (HAS_VP9_DECODING(ctx) &&                                      \
+     ((ctx)->codec_info->vp9_dec_profiles & (1U << (profile - VAProfileVP9Profile0))))
+
+#define HAS_HEVC10_DECODING(ctx)        ((ctx)->codec_info->has_hevc10_decoding && \
+                                         (ctx)->intel.has_bsd)
+#define HAS_HEVC10_ENCODING(ctx)        ((ctx)->codec_info->has_hevc10_encoding && \
+                                         (ctx)->intel.has_bsd)
+
+#define HAS_VPP_P010(ctx)        ((ctx)->codec_info->has_vpp_p010 && \
+                                         (ctx)->intel.has_bsd)
+
+#define HAS_VP9_ENCODING(ctx)          ((ctx)->codec_info->has_vp9_encoding && \
+                                         (ctx)->intel.has_bsd)
+
+#define HAS_VP9_ENCODING_PROFILE(ctx, profile)                     \
+    (HAS_VP9_ENCODING(ctx) &&                                      \
+     ((ctx)->codec_info->vp9_enc_profiles & (1U << (profile - VAProfileVP9Profile0))))
+
 struct i965_surface
 {
     struct object_base *base;
@@ -143,15 +223,9 @@ struct decode_state
 struct encode_state
 {
     struct codec_state_base base;
-    struct buffer_store *seq_param;
-    struct buffer_store *pic_param;
-    struct buffer_store *pic_control;
     struct buffer_store *iq_matrix;
     struct buffer_store *q_matrix;
-    struct buffer_store **slice_params;
     struct buffer_store *huffman_table;
-    int max_slice_params;
-    int num_slice_params;
 
     /* for ext */
     struct buffer_store *seq_param_ext;
@@ -198,7 +272,9 @@ struct encode_state
 
     int last_packed_header_type;
 
-    struct buffer_store *misc_param[16];
+    int has_layers;
+
+    struct buffer_store *misc_param[16][8];
 
     VASurfaceID current_render_target;
     struct object_surface *input_yuv_object;
@@ -295,6 +371,9 @@ struct object_surface
     uint32_t user_disable_tiling : 1;
     uint32_t user_h_stride_set   : 1;
     uint32_t user_v_stride_set   : 1;
+    /* we need clear right and bottom border for NV12.
+     * to avoid encode run to run issue*/
+    uint32_t border_cleared      : 1;
 
     VAGenericID wrapper_surface;
 
@@ -354,6 +433,8 @@ struct i965_filter
     int ring;
 };
 
+struct i965_driver_data;
+
 struct hw_codec_info
 {
     struct hw_context *(*dec_hw_context_init)(VADriverContextP, struct object_config *);
@@ -363,6 +444,13 @@ struct hw_codec_info
     void (*post_processing_context_init)(VADriverContextP, void *, struct intel_batchbuffer *);
     void (*preinit_hw_codec)(VADriverContextP, struct hw_codec_info *);
 
+    /**
+     * Allows HW info to support per-codec max resolution.  If this functor is
+     * not initialized, then @max_width and @max_height will be used as the
+     * default maximum resolution for all codecs on this HW info.
+     */
+    void (*max_resolution)(struct i965_driver_data *, struct object_config *, int *, int *);
+
     int max_width;
     int max_height;
     int min_linear_wpitch;
@@ -370,6 +458,7 @@ struct hw_codec_info
 
     unsigned int h264_mvc_dec_profiles;
     unsigned int vp9_dec_profiles;
+    unsigned int vp9_enc_profiles;
 
     unsigned int h264_dec_chroma_formats;
     unsigned int jpeg_dec_chroma_formats;
@@ -396,6 +485,7 @@ struct hw_codec_info
     unsigned int has_h264_mvc_encoding:1;
     unsigned int has_hevc_decoding:1;
     unsigned int has_hevc_encoding:1;
+    unsigned int has_hevc10_encoding:1;
     unsigned int has_hevc10_decoding:1;
     unsigned int has_vp9_decoding:1;
     unsigned int has_vpp_p010:1;
@@ -410,6 +500,7 @@ struct hw_codec_info
 
 
 #include "i965_render.h"
+#include "i965_gpe_utils.h"
 
 struct i965_driver_data 
 {
@@ -446,6 +537,8 @@ struct i965_driver_data
     struct va_wl_output *wl_output;
 
     VADriverContextP wrapper_pdrvctx;
+
+    struct i965_gpe_table gpe_table;
 };
 
 #define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);