Add the 10bit-scaling conversion for I010 format

[android-x86/hardware-intel-common-vaapi.git] / src / i965_post_processing.h

diff --git a/src/i965_post_processing.h b/src/i965_post_processing.h
index e76e9c5..e55bf0b 100755 (executable)
--- a/src/i965_post_processing.h
+++ b/src/i965_post_processing.h
@@ -29,12 +29,15 @@
 #ifndef __I965_POST_PROCESSING_H__
 #define __I965_POST_PROCESSING_H__
 
+#include "i965_vpp_avs.h"
+#include <drm.h>
+#include <i915_drm.h>
+#include <intel_bufmgr.h>
+#include "i965_gpe_utils.h"
+
 #define MAX_PP_SURFACES                 48
 
-#define I965_PP_FLAG_TOP_FIELD          1
-#define I965_PP_FLAG_BOTTOM_FIELD       2
-#define I965_PP_FLAG_MCDI               4
-#define I965_PP_FLAG_AVS                8
+struct i965_gpe_context;
 
 enum
 {
@@ -79,6 +82,7 @@ struct pp_scaling_context
 
 struct pp_avs_context
 {
+    AVSState state;
     int dest_x; /* in pixel */
     int dest_y; /* in pixel */
     int dest_w;
@@ -90,14 +94,33 @@ struct pp_avs_context
     float horiz_range;
 };
 
+enum {
+    DNDI_FRAME_IN_CURRENT = 0,
+    DNDI_FRAME_IN_PREVIOUS,
+    DNDI_FRAME_IN_STMM,
+    DNDI_FRAME_OUT_STMM,
+    DNDI_FRAME_OUT_CURRENT,
+    DNDI_FRAME_OUT_PREVIOUS,
+    DNDI_FRAME_STORE_COUNT
+};
+
+typedef struct dndi_frame_store {
+    struct object_surface *obj_surface;
+    VASurfaceID surface_id; /* always relative to the input surface */
+    unsigned int is_scratch_surface : 1;
+} DNDIFrameStore;
+
 struct pp_dndi_context
 {
     int dest_w;
     int dest_h;
-    dri_bo *stmm_bo;
-    int frame_order; /* -1 for the first frame */
-    VASurfaceID current_out_surface;
-    struct object_surface *current_out_obj_surface;
+    DNDIFrameStore frame_store[DNDI_FRAME_STORE_COUNT];
+
+    /* Temporary flags live until the current picture is processed */
+    unsigned int is_di_enabled          : 1;
+    unsigned int is_di_adv_enabled      : 1;
+    unsigned int is_first_frame         : 1;
+    unsigned int is_second_field        : 1;
 };
 
 struct pp_dn_context
@@ -380,7 +403,7 @@ struct gen7_pp_static_parameter
         unsigned int di_destination_packed_y_component_offset:8;
         unsigned int di_destination_packed_u_component_offset:8;
         unsigned int di_destination_packed_v_component_offset:8;
-        unsigned int pad0:8;
+        unsigned int alpha:8;
     } grf2;
 
     struct {
@@ -405,33 +428,58 @@ struct gen7_pp_static_parameter
         float sampler_load_horizontal_frame_origin;
         unsigned int padx[7];
     } grf6;
+
+    struct {
+        /* r7.0 -> r7.3 */
+        float coef_ry;
+        float coef_ru;
+        float coef_rv;
+        float coef_yd;
+
+        /* r7.4 -> r7.7 */
+        float coef_gy;
+        float coef_gu;
+        float coef_gv;
+        float coef_ud;
+    } grf7;
+
+    struct {
+        /* r8.0 -> r8.3 */
+        float coef_by;
+        float coef_bu;
+        float coef_bv;
+        float coef_vd;
+
+        /* r8.4 -> r8.7 */
+        unsigned int padx[4];
+    } grf8;
 };
 
 struct gen7_pp_inline_parameter
 {
     struct {
-        /* r7.0 */
+        /* r9.0 */
         unsigned int destination_block_horizontal_origin:16;
         unsigned int destination_block_vertical_origin:16;
-        /* r7.1: 0xffffffff */
+        /* r9.1: 0xffffffff */
         unsigned int constant_0;
-        /* r7.2 */
+        /* r9.2 */
         unsigned int pad0;
-        /* r7.3 */
+        /* r9.3 */
         unsigned int pad1;
-        /* r7.4 */
+        /* r9.4 */
         float sampler_load_main_video_x_scaling_step;
-        /* r7.5 */
+        /* r9.5 */
         unsigned int pad2;
-        /* r7.6: must be zero */
+        /* r9.6: must be zero */
         unsigned int avs_vertical_block_number;
-        /* r7.7: 0 */
+        /* r9.7: 0 */
         unsigned int group_id_number;
-    } grf7;
+    } grf9;
 
     struct {
         unsigned int padx[8];
-    } grf8;
+    } grf10;
 };
 
 struct i965_post_processing_context
@@ -486,6 +534,8 @@ struct i965_post_processing_context
         unsigned int curbe_allocation_size : 16;
     } vfe_gpu_state;
 
+    struct intel_vebox_context *vebox_proc_ctx;
+
     struct pp_load_save_context pp_load_save_context;
     struct pp_scaling_context pp_scaling_context;
     struct pp_avs_context pp_avs_context;
@@ -493,6 +543,15 @@ struct i965_post_processing_context
     struct pp_dn_context pp_dn_context;
     void *private_context; /* pointer to the current private context */
     void *pipeline_param;  /* pointer to the pipeline parameter */
+    /**
+     * \ref Extra filter flags used as a fast path.
+     *
+     * This corresponds to vaPutSurface() flags, for direct rendering,
+     * or to VAProcPipelineParameterBuffer.filter_flags when the VPP
+     * interfaces are used. In the latter case, this is just a copy of
+     * that field.
+     */
+    unsigned int filter_flags;
 
     int (*pp_x_steps)(void *private_context);
     int (*pp_y_steps)(void *private_context);
@@ -535,11 +594,18 @@ struct i965_post_processing_context
                                const VARectangle *dst_rect,
                                int   pp_index,
                                void * filter_param);
+    void (*finalize)(VADriverContextP ctx,
+        struct i965_post_processing_context *pp_context);
+
+
+    struct i965_gpe_context scaling_10bit_context;
+    int scaling_context_initialized;
 };
 
 struct i965_proc_context
 {
     struct hw_context base;
+    void *driver_context;
     struct i965_post_processing_context pp_context;
 };
 
@@ -549,8 +615,9 @@ i965_post_processing(
     struct object_surface *obj_surface,
     const VARectangle *src_rect,
     const VARectangle *dst_rect,
-    unsigned int       flags,
-    int                *has_done_scaling 
+    unsigned int       va_flags,
+    int                *has_done_scaling,
+    VARectangle *calibrated_rect
 );
 
 VAStatus
@@ -560,7 +627,7 @@ i965_scaling_processing(
     const VARectangle *src_rect,
     struct object_surface *dst_surface_obj,
     const VARectangle *dst_rect,
-    unsigned int       flags
+    unsigned int       va_flags
 );
 
 VAStatus
@@ -575,4 +642,11 @@ i965_post_processing_terminate(VADriverContextP ctx);
 bool
 i965_post_processing_init(VADriverContextP ctx);
 
+
+extern VAStatus
+i965_proc_picture(VADriverContextP ctx,
+                  VAProfile profile,
+                  union codec_state *codec_state,
+                  struct hw_context *hw_context);
+
 #endif /* __I965_POST_PROCESSING_H__ */