/**
* \file pciaccess_private.h
* Functions and datastructures that are private to the pciaccess library.
- *
+ *
* \author Ian Romanick <idr@us.ibm.com>
*/
+#if defined(__GNUC__) && (__GNUC__ >= 4)
+# define _pci_hidden __attribute__((visibility("hidden")))
+#elif defined(__SUNPRO_C) && (__SUNPRO_C >= 0x550)
+# define _pci_hidden __hidden
+#else /* not gcc >= 4 and not Sun Studio >= 8 */
+# define _pci_hidden
+#endif /* GNUC >= 4 */
+
+struct pci_device_mapping;
int pci_fill_capabilities_generic( struct pci_device * dev );
+int pci_device_generic_unmap_range(struct pci_device *dev,
+ struct pci_device_mapping *map);
struct pci_system_methods {
void (*destroy)( void );
void (*destroy_device)( struct pci_device * dev );
- int (*read_rom)( struct pci_device * dev, void * buffer );
+ int (*read_rom)( struct pci_device * dev, void * buffer );
int (*probe)( struct pci_device * dev );
- int (*map)( struct pci_device * dev, unsigned region, int write_enable );
- int (*unmap)( struct pci_device * dev, unsigned region );
-
+ int (*map_range)(struct pci_device *dev, struct pci_device_mapping *map);
+ int (*unmap_range)(struct pci_device * dev,
+ struct pci_device_mapping *map);
+
int (*read)(struct pci_device * dev, void * data, pciaddr_t offset,
pciaddr_t size, pciaddr_t * bytes_read );
pciaddr_t size, pciaddr_t * bytes_written );
int (*fill_capabilities)( struct pci_device * dev );
+ void (*enable)( struct pci_device *dev );
+ int (*boot_vga)( struct pci_device *dev );
+ int (*has_kernel_driver)( struct pci_device *dev );
+ struct pci_io_handle *(*open_device_io)( struct pci_io_handle *handle,
+ struct pci_device *dev, int bar,
+ pciaddr_t base, pciaddr_t size );
+ struct pci_io_handle *(*open_legacy_io)( struct pci_io_handle *handle,
+ struct pci_device *dev,
+ pciaddr_t base, pciaddr_t size );
+ void (*close_io)( struct pci_device *dev, struct pci_io_handle *handle );
+ uint32_t (*read32)( struct pci_io_handle *handle, uint32_t reg );
+ uint16_t (*read16)( struct pci_io_handle *handle, uint32_t reg );
+ uint8_t (*read8)( struct pci_io_handle *handle, uint32_t reg );
+ void (*write32)( struct pci_io_handle *handle, uint32_t reg,
+ uint32_t data );
+ void (*write16)( struct pci_io_handle *handle, uint32_t reg,
+ uint16_t data );
+ void (*write8)( struct pci_io_handle *handle, uint32_t reg, uint8_t data );
+
+ int (*map_legacy)(struct pci_device *dev, pciaddr_t base, pciaddr_t size,
+ unsigned map_flags, void **addr);
+ int (*unmap_legacy)(struct pci_device *dev, void *addr, pciaddr_t size);
+};
+
+struct pci_device_mapping {
+ pciaddr_t base;
+ pciaddr_t size;
+ unsigned region;
+ unsigned flags;
+ void *memory;
+};
+
+struct pci_io_handle {
+ pciaddr_t base;
+ pciaddr_t size;
+ int fd;
};
struct pci_device_private {
struct pci_device base;
const char * device_string;
-
+
uint8_t header_type;
/**
/*@{*/
const struct pci_agp_info * agp; /**< AGP capability information. */
/*@}*/
-
+
+ /**
+ * Base address of the device's expansion ROM.
+ */
+ pciaddr_t rom_base;
+
/**
* \name Bridge information.
*/
struct pci_pcmcia_bridge_info * pcmcia;
} bridge;
/*@}*/
-
+
+ /**
+ * \name Mappings active on this device.
+ */
+ /*@{*/
+ struct pci_device_mapping *mappings;
+ unsigned num_mappings;
+ /*@}*/
};
* Array of known devices.
*/
struct pci_device_private * devices;
+
+#ifdef HAVE_MTRR
+ int mtrr_fd;
+#endif
+ int vgaarb_fd;
+ int vga_count;
+ struct pci_device *vga_target;
+ struct pci_device *vga_default_dev;
};
extern struct pci_system * pci_sys;
extern int pci_system_linux_sysfs_create( void );
extern int pci_system_freebsd_create( void );
+extern int pci_system_netbsd_create( void );
+extern int pci_system_openbsd_create( void );
+extern void pci_system_openbsd_init_dev_mem( int );
+extern int pci_system_solx_devfs_create( void );
+extern int pci_system_x86_create( void );
+extern void pci_io_cleanup( void );