/*
* (C) Copyright IBM Corporation 2006
+ * Copyright (c) 2007, 2009, 2011, 2012, Oracle and/or its affiliates.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* DEALINGS IN THE SOFTWARE.
*/
/*
- * Copyright 2007, 2009 Sun Microsystems, Inc. All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, and/or sell copies of the Software, and to permit persons
- * to whom the Software is furnished to do so, provided that the above
- * copyright notice(s) and this permission notice appear in all copies of
- * the Software and that both the above copyright notice(s) and this
- * permission notice appear in supporting documentation.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT
- * OF THIRD PARTY RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
- * HOLDERS INCLUDED IN THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL
- * INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING
- * FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
- * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
- * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- *
- * Except as contained in this notice, the name of a copyright holder
- * shall not be used in advertising or otherwise to promote the sale, use
- * or other dealings in this Software without prior written authorization
- * of the copyright holder.
- */
-/*
* Solaris devfs interfaces
*/
#include <libdevinfo.h>
#include "pci_tools.h"
+#ifdef __x86
+# include <sys/sysi86.h>
+# include <sys/psw.h>
+#endif
+
#include "pciaccess.h"
#include "pciaccess_private.h"
/* #define DEBUG */
-#define MAX_DEVICES 256
+#define INITIAL_NUM_DEVICES 256
#define CELL_NUMS_1275 (sizeof(pci_regspec_t) / sizeof(uint_t))
typedef union {
int fd;
int first_bus;
int last_bus;
- const char *path; /* for errors/debugging; fd is all we need */
+ int domain;
+ char *path; /* for errors/debugging; fd is all we need */
+ char *dev_path;
struct nexus *next;
+#ifdef __sparc
+ struct pci_device **devlist;
+ volatile size_t num_allocated_elems;
+ volatile size_t num_devices;
+#endif
} nexus_t;
+typedef struct probe_info {
+ volatile size_t num_allocated_elems;
+ volatile size_t num_devices;
+ struct pci_device_private * volatile devices;
+} probe_info_t;
+
static nexus_t *nexus_list = NULL;
+#if !defined(__sparc)
static int xsvc_fd = -1;
+#endif
+
+#ifdef __sparc
+static di_prom_handle_t di_phdl;
+#endif
/*
* Read config space in native processor endianness. Endian-neutral
# error "ISA is neither __sparc nor __x86"
#endif
+#ifdef __sparc
+#define MAPPING_DEV_PATH(dev) (((struct pci_device_private *) dev)->device_string)
+#endif
+
/*
* Identify problematic southbridges. These have device id 0x5249 and
* vendor id 0x10b9. Check for revision ID 0 and class code 060400 as well.
# define U45_SB_CLASS_RID 0x06040000
#endif
-static int pci_device_solx_devfs_map_range(struct pci_device *dev,
- struct pci_device_mapping *map);
-
-static int pci_device_solx_devfs_read_rom( struct pci_device * dev,
- void * buffer );
-
-static int pci_device_solx_devfs_probe( struct pci_device * dev );
-
-static int pci_device_solx_devfs_read( struct pci_device * dev, void * data,
- pciaddr_t offset, pciaddr_t size, pciaddr_t * bytes_read );
-
-static int pci_device_solx_devfs_write( struct pci_device * dev,
- const void * data, pciaddr_t offset, pciaddr_t size,
- pciaddr_t * bytes_written );
-
-static int probe_dev(nexus_t *nexus, pcitool_reg_t *prg_p,
- struct pci_system *pci_sys);
-
-static int do_probe(nexus_t *nexus, struct pci_system *pci_sys);
-
-static int probe_nexus_node(di_node_t di_node, di_minor_t minor, void *arg);
-
-static void pci_system_solx_devfs_destroy( void );
-
-static int get_config_header(int fd, uint8_t bus_no, uint8_t dev_no,
- uint8_t func_no, pci_conf_hdr_t *config_hdr_p);
-
-int pci_system_solx_devfs_create( void );
-
-static const struct pci_system_methods solx_devfs_methods = {
- .destroy = pci_system_solx_devfs_destroy,
- .destroy_device = NULL,
- .read_rom = pci_device_solx_devfs_read_rom,
- .probe = pci_device_solx_devfs_probe,
- .map_range = pci_device_solx_devfs_map_range,
- .unmap_range = pci_device_generic_unmap_range,
-
- .read = pci_device_solx_devfs_read,
- .write = pci_device_solx_devfs_write,
-
- .fill_capabilities = pci_fill_capabilities_generic
-};
+#ifdef __sparc
+static nexus_t *
+find_nexus_for_dev(struct pci_device *dev)
+{
+ nexus_t *nexus;
+ int i;
+ for (nexus = nexus_list ; nexus != NULL ; nexus = nexus->next) {
+ for (i = 0; i < nexus->num_devices; i++) {
+ if (nexus->devlist[i] == dev)
+ return nexus;
+ }
+ }
+ return NULL;
+}
+#else
static nexus_t *
-find_nexus_for_bus( int bus )
+find_nexus_for_bus( int domain, int bus )
{
nexus_t *nexus;
for (nexus = nexus_list ; nexus != NULL ; nexus = nexus->next) {
- if ((bus >= nexus->first_bus) && (bus <= nexus->last_bus)) {
+ if ((domain == nexus->domain) &&
+ (bus >= nexus->first_bus) && (bus <= nexus->last_bus)) {
return nexus;
}
}
return NULL;
}
+#endif
#define GET_CONFIG_VAL_8(offset) (config_hdr.bytes[offset])
#define GET_CONFIG_VAL_16(offset) \
next = nexus->next;
close(nexus->fd);
free(nexus->path);
+ free(nexus->dev_path);
+#ifdef __sparc
+ {
+ struct pci_device *dev;
+ int i;
+
+ for (i = 0; i < nexus->num_devices; i++) {
+ dev = nexus->devlist[i];
+ if (MAPPING_DEV_PATH(dev))
+ di_devfs_path_free((char *) MAPPING_DEV_PATH(dev));
+ }
+ }
+ free(nexus->devlist);
+#endif
free(nexus);
}
nexus_list = NULL;
+#ifdef __sparc
+ if (di_phdl != DI_PROM_HANDLE_NIL)
+ (void) di_prom_fini(di_phdl);
+#else
if (xsvc_fd >= 0) {
close(xsvc_fd);
xsvc_fd = -1;
}
-}
-
-/*
- * Attempt to access PCI subsystem using Solaris's devfs interface.
- * Solaris version
- */
-_pci_hidden int
-pci_system_solx_devfs_create( void )
-{
- int err = 0;
- di_node_t di_node;
-
-
- if (nexus_list != NULL) {
- return 0;
- }
-
- /*
- * Only allow MAX_DEVICES exists
- * I will fix it later to get
- * the total devices first
- */
- if ((pci_sys = calloc(1, sizeof (struct pci_system))) != NULL) {
- pci_sys->methods = &solx_devfs_methods;
-
- if ((pci_sys->devices =
- calloc(MAX_DEVICES, sizeof (struct pci_device_private)))
- != NULL) {
-
- if ((di_node = di_init("/", DINFOCPYALL)) == DI_NODE_NIL) {
- err = errno;
- (void) fprintf(stderr, "di_init() failed: %s\n",
- strerror(errno));
- } else {
- (void) di_walk_minor(di_node, DDI_NT_REGACC, 0, pci_sys,
- probe_nexus_node);
- di_fini(di_node);
- }
- }
- else {
- err = errno;
- }
- } else {
- err = errno;
- }
-
- if (err != 0) {
- if (pci_sys != NULL) {
- free(pci_sys->devices);
- free(pci_sys);
- pci_sys = NULL;
- }
- }
-
- return (err);
+#endif
}
/*
* Probe device's functions. Modifies many fields in the prg_p.
*/
static int
-probe_dev(nexus_t *nexus, pcitool_reg_t *prg_p, struct pci_system *pci_sys)
+probe_dev(nexus_t *nexus, pcitool_reg_t *prg_p, probe_info_t *pinfo)
{
pci_conf_hdr_t config_hdr;
boolean_t multi_function_device;
else if (((errno != EFAULT) ||
(prg_p->status != PCITOOL_INVALID_ADDRESS)) &&
(prg_p->data != 0xffffffff)) {
+#ifdef __sparc
+/* on sparc, devices can be enumerated discontiguously. Do not quit */
+ rval = 0;
+#endif
break;
}
* function number.
*/
- pci_base = &pci_sys->devices[pci_sys->num_devices].base;
+ pci_base = &pinfo->devices[pinfo->num_devices].base;
- /*
- * Domain is peer bus??
- */
- pci_base->domain = 0;
+ pci_base->domain = nexus->domain;
pci_base->bus = prg_p->bus_no;
pci_base->dev = prg_p->dev_no;
pci_base->func = func;
pci_base->device_id = GET_CONFIG_VAL_16(PCI_CONF_DEVID);
pci_base->subvendor_id = GET_CONFIG_VAL_16(PCI_CONF_SUBVENID);
pci_base->subdevice_id = GET_CONFIG_VAL_16(PCI_CONF_SUBSYSID);
+ pci_base->irq = GET_CONFIG_VAL_8(PCI_CONF_ILINE);
- pci_sys->devices[pci_sys->num_devices].header_type
+ pinfo->devices[pinfo->num_devices].header_type
= GET_CONFIG_VAL_8(PCI_CONF_HEADER);
#ifdef DEBUG
nexus->path, prg_p->bus_no, prg_p->dev_no, func);
#endif
- if (pci_sys->num_devices < (MAX_DEVICES - 1)) {
- pci_sys->num_devices++;
- } else {
- (void) fprintf(stderr,
- "Maximum number of PCI devices found,"
- " discarding additional devices\n");
+ pinfo->num_devices++;
+ if (pinfo->num_devices == pinfo->num_allocated_elems) {
+ struct pci_device_private *new_devs;
+ size_t new_num_elems = pinfo->num_allocated_elems * 2;
+
+ new_devs = realloc(pinfo->devices,
+ new_num_elems * sizeof (struct pci_device_private));
+ if (new_devs == NULL) {
+ (void) fprintf(stderr,
+ "Error allocating memory for PCI devices:"
+ " %s\n discarding additional devices\n",
+ strerror(errno));
+ return (rval);
+ }
+ (void) memset(&new_devs[pinfo->num_devices], 0,
+ pinfo->num_allocated_elems *
+ sizeof (struct pci_device_private));
+ pinfo->num_allocated_elems = new_num_elems;
+ pinfo->devices = new_devs;
}
+#ifdef __sparc
+ nexus->devlist[nexus->num_devices++] = pci_base;
+
+ if (nexus->num_devices == nexus->num_allocated_elems) {
+ struct pci_device **new_devs;
+ size_t new_num_elems = nexus->num_allocated_elems * 2;
+
+ new_devs = realloc(nexus->devlist,
+ new_num_elems * sizeof (struct pci_device *));
+ if (new_devs == NULL)
+ return (rval);
+ (void) memset(&new_devs[nexus->num_devices], 0,
+ nexus->num_allocated_elems *
+ sizeof (struct pci_device *));
+ nexus->num_allocated_elems = new_num_elems;
+ nexus->devlist = new_devs;
+ }
+#endif
/*
* Accommodate devices which state their
return (rval);
}
+
+/*
+ * Solaris version
+ * Probe a given nexus config space for devices.
+ *
+ * fd is the file descriptor of the nexus.
+ * input_args contains commandline options as specified by the user.
+ */
+static int
+do_probe(nexus_t *nexus, probe_info_t *pinfo)
+{
+ pcitool_reg_t prg;
+ uint32_t bus;
+ uint8_t dev;
+ uint32_t last_bus = nexus->last_bus;
+ uint8_t last_dev = PCI_REG_DEV_M >> PCI_REG_DEV_SHIFT;
+ uint8_t first_bus = nexus->first_bus;
+ uint8_t first_dev = 0;
+ int rval = 0;
+
+ prg.barnum = 0; /* Config space. */
+
+ /* Must read in 4-byte quantities. */
+ prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_4 + NATIVE_ENDIAN;
+
+ prg.data = 0;
+
+ /*
+ * Loop through all valid bus / dev / func combinations to check for
+ * all devices, with the following exceptions:
+ *
+ * When nothing is found at function 0 of a bus / dev combination, skip
+ * the other functions of that bus / dev combination.
+ *
+ * When a found device's function 0 is probed and it is determined that
+ * it is not a multifunction device, skip probing of that device's
+ * other functions.
+ */
+ for (bus = first_bus; ((bus <= last_bus) && (rval == 0)); bus++) {
+ prg.bus_no = (uint8_t)bus;
+
+ for (dev = first_dev; ((dev <= last_dev) && (rval == 0)); dev++) {
+ prg.dev_no = dev;
+ rval = probe_dev(nexus, &prg, pinfo);
+ }
+
+ /*
+ * Ultra-45 southbridge workaround:
+ * ECANCELED tells to skip to the next bus.
+ */
+ if (rval == ECANCELED) {
+ rval = 0;
+ }
+ }
+
+ return (rval);
+}
+
/*
* This function is called from di_walk_minor() when any PROBE is processed
*/
static int
probe_nexus_node(di_node_t di_node, di_minor_t minor, void *arg)
{
- struct pci_system *pci_sys = (struct pci_system *) arg;
- const char *nexus_name;
+ probe_info_t *pinfo = (probe_info_t *)arg;
+ char *nexus_name, *nexus_dev_path;
nexus_t *nexus;
int fd;
char nexus_path[MAXPATHLEN];
di_prop_t prop;
- const char *strings;
+ char *strings;
int *ints;
int numval;
int pci_node = 0;
int first_bus = 0, last_bus = PCI_REG_BUS_G(PCI_REG_BUS_M);
+ int domain = 0;
+#ifdef __sparc
+ int bus_range_found = 0;
+ int device_type_found = 0;
+ di_prom_prop_t prom_prop;
+#endif
+
#ifdef DEBUG
nexus_name = di_devfs_minor_path(minor);
if (strcmp(prop_name, "device_type") == 0) {
numval = di_prop_strings(prop, &strings);
- if (numval != 1 || strncmp(strings, "pci", 3) != 0) {
- /* not a PCI node, bail */
- return (DI_WALK_CONTINUE);
+ if (numval == 1) {
+ if (strncmp(strings, "pci", 3) != 0)
+ /* not a PCI node, bail */
+ return (DI_WALK_CONTINUE);
+ else {
+ pci_node = 1;
+#ifdef __sparc
+ device_type_found = 1;
+#endif
+ }
}
- pci_node = 1;
}
else if (strcmp(prop_name, "class-code") == 0) {
/* not a root bus node, bail */
if (numval == 2) {
first_bus = ints[0];
last_bus = ints[1];
+#ifdef __sparc
+ bus_range_found = 1;
+#endif
+ }
+ }
+ else if (strcmp(prop_name, "pciseg") == 0) {
+ numval = di_prop_ints(prop, &ints);
+ if (numval == 1) {
+ domain = ints[0];
}
}
}
-#ifdef __x86 /* sparc pci nodes don't have the device_type set */
+#ifdef __sparc
+ if ((!device_type_found) && di_phdl) {
+ numval = di_prom_prop_lookup_strings(di_phdl, di_node,
+ "device_type", &strings);
+ if (numval == 1) {
+ if (strncmp(strings, "pci", 3) != 0)
+ return (DI_WALK_CONTINUE);
+ else
+ pci_node = 1;
+ }
+ }
+
+ if ((!bus_range_found) && di_phdl) {
+ numval = di_prom_prop_lookup_ints(di_phdl, di_node,
+ "bus-range", &ints);
+ if (numval == 2) {
+ first_bus = ints[0];
+ last_bus = ints[1];
+ }
+ }
+#endif
+
if (pci_node != 1)
return (DI_WALK_CONTINUE);
-#endif
/* we have a PCI root bus node. */
nexus = calloc(1, sizeof(nexus_t));
}
nexus->first_bus = first_bus;
nexus->last_bus = last_bus;
+ nexus->domain = domain;
+
+#ifdef __sparc
+ if ((nexus->devlist = calloc(INITIAL_NUM_DEVICES,
+ sizeof (struct pci_device *))) == NULL) {
+ (void) fprintf(stderr, "Error allocating memory for nexus devlist: %s\n",
+ strerror(errno));
+ free (nexus);
+ return (DI_WALK_TERMINATE);
+ }
+ nexus->num_allocated_elems = INITIAL_NUM_DEVICES;
+ nexus->num_devices = 0;
+#endif
nexus_name = di_devfs_minor_path(minor);
if (nexus_name == NULL) {
snprintf(nexus_path, sizeof(nexus_path), "/devices%s", nexus_name);
di_devfs_path_free(nexus_name);
- nexus->path = strdup(nexus_path);
#ifdef DEBUG
fprintf(stderr, "nexus = %s, bus-range = %d - %d\n",
nexus_path, first_bus, last_bus);
#endif
- if ((fd = open(nexus_path, O_RDWR)) >= 0) {
+ if ((fd = open(nexus_path, O_RDWR | O_CLOEXEC)) >= 0) {
nexus->fd = fd;
- if ((do_probe(nexus, pci_sys) != 0) && (errno != ENXIO)) {
+ nexus->path = strdup(nexus_path);
+ nexus_dev_path = di_devfs_path(di_node);
+ nexus->dev_path = strdup(nexus_dev_path);
+ di_devfs_path_free(nexus_dev_path);
+ if ((do_probe(nexus, pinfo) != 0) && (errno != ENXIO)) {
(void) fprintf(stderr, "Error probing node %s: %s\n",
nexus_path, strerror(errno));
(void) close(fd);
free(nexus->path);
+ free(nexus->dev_path);
free(nexus);
} else {
nexus->next = nexus_list;
} else {
(void) fprintf(stderr, "Error opening %s: %s\n",
nexus_path, strerror(errno));
- free(nexus->path);
free(nexus);
}
return DI_WALK_CONTINUE;
}
-
-/*
- * Solaris version
- * Probe a given nexus config space for devices.
- *
- * fd is the file descriptor of the nexus.
- * input_args contains commandline options as specified by the user.
- */
-static int
-do_probe(nexus_t *nexus, struct pci_system *pci_sys)
-{
- pcitool_reg_t prg;
- uint32_t bus;
- uint8_t dev;
- uint32_t last_bus = nexus->last_bus;
- uint8_t last_dev = PCI_REG_DEV_M >> PCI_REG_DEV_SHIFT;
- uint8_t first_bus = nexus->first_bus;
- uint8_t first_dev = 0;
- int rval = 0;
-
- prg.barnum = 0; /* Config space. */
-
- /* Must read in 4-byte quantities. */
- prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_4 + NATIVE_ENDIAN;
-
- prg.data = 0;
-
- /*
- * Loop through all valid bus / dev / func combinations to check for
- * all devices, with the following exceptions:
- *
- * When nothing is found at function 0 of a bus / dev combination, skip
- * the other functions of that bus / dev combination.
- *
- * When a found device's function 0 is probed and it is determined that
- * it is not a multifunction device, skip probing of that device's
- * other functions.
- */
- for (bus = first_bus; ((bus <= last_bus) && (rval == 0)); bus++) {
- prg.bus_no = (uint8_t)bus;
-
- for (dev = first_dev; ((dev <= last_dev) && (rval == 0)); dev++) {
- prg.dev_no = dev;
- rval = probe_dev(nexus, &prg, pci_sys);
- }
-
- /*
- * Ultra-45 southbridge workaround:
- * ECANCELED tells to skip to the next bus.
- */
- if (rval == ECANCELED) {
- rval = 0;
- }
- }
-
- return (rval);
-}
-
static int
find_target_node(di_node_t node, void *arg)
{
int *regbuf = NULL;
int len = 0;
uint32_t busno, funcno, devno;
- i_devnode_t *devnode;
- void *prop = DI_PROP_NIL;
- int i;
-
- devnode = (i_devnode_t *)arg;
+ i_devnode_t *devnode = (i_devnode_t *)arg;
/*
* Test the property functions, only for testing
*/
/*
+ void *prop = DI_PROP_NIL;
+
(void) fprintf(stderr, "start of node 0x%x\n", node->nodeid);
while ((prop = di_prop_hw_next(node, prop)) != DI_PROP_NIL) {
+ int i;
(void) fprintf(stderr, "name=%s: ", di_prop_name(prop));
len = 0;
if (!strcmp(di_prop_name(prop), "reg")) {
len = di_prop_lookup_ints(DDI_DEV_T_ANY, node, "reg", ®buf);
+#ifdef __sparc
+ if ((len <= 0) && di_phdl)
+ len = di_prom_prop_lookup_ints(di_phdl, node, "reg", ®buf);
+#endif
+
if (len <= 0) {
#ifdef DEBUG
fprintf(stderr, "error = %x\n", errno);
static int
pci_device_solx_devfs_probe( struct pci_device * dev )
{
- uint8_t config[256];
- int err;
- di_node_t rnode;
- i_devnode_t args;
+ int err = 0;
+ di_node_t rnode = DI_NODE_NIL;
+ i_devnode_t args = { 0, 0, 0, DI_NODE_NIL };
int *regbuf;
pci_regspec_t *reg;
int i;
- pciaddr_t bytes;
int len = 0;
uint ent = 0;
+ nexus_t *nexus;
- err = pci_device_solx_devfs_read( dev, config, 0, 256, & bytes );
- args.node = DI_NODE_NIL;
+#ifdef __sparc
+ if ( (nexus = find_nexus_for_dev(dev)) == NULL )
+#else
+ if ( (nexus = find_nexus_for_bus(dev->domain, dev->bus)) == NULL )
+#endif
+ return ENODEV;
- if ( bytes >= 64 ) {
- struct pci_device_private *priv =
- (struct pci_device_private *) dev;
+ /*
+ * starting to find if it is MEM/MEM64/IO
+ * using libdevinfo
+ */
+ if ((rnode = di_init(nexus->dev_path, DINFOCPYALL)) == DI_NODE_NIL) {
+ err = errno;
+ (void) fprintf(stderr, "di_init failed: %s\n", strerror(errno));
+ } else {
+ args.bus = dev->bus;
+ args.dev = dev->dev;
+ args.func = dev->func;
+ (void) di_walk_node(rnode, DI_WALK_CLDFIRST,
+ (void *)&args, find_target_node);
+ }
- dev->vendor_id = (uint16_t)config[0] + ((uint16_t)config[1] << 8);
- dev->device_id = (uint16_t)config[2] + ((uint16_t)config[3] << 8);
- dev->device_class = (uint32_t)config[9] +
- ((uint32_t)config[10] << 8) +
- ((uint16_t)config[11] << 16);
+ if (args.node != DI_NODE_NIL) {
+#ifdef __sparc
+ di_minor_t minor;
+#endif
- /*
- * device class code is already there.
- * see probe_dev function.
- */
- dev->revision = config[8];
- dev->subvendor_id = (uint16_t)config[44] + ((uint16_t)config[45] << 8);
- dev->subdevice_id = (uint16_t)config[46] + ((uint16_t)config[47] << 8);
- dev->irq = config[60];
+#ifdef __sparc
+ if (minor = di_minor_next(args.node, DI_MINOR_NIL))
+ MAPPING_DEV_PATH(dev) = di_devfs_minor_path (minor);
+ else
+ MAPPING_DEV_PATH(dev) = NULL;
+#endif
- priv->header_type = config[14];
- /*
- * starting to find if it is MEM/MEM64/IO
- * using libdevinfo
- */
- if ((rnode = di_init("/", DINFOCPYALL)) == DI_NODE_NIL) {
- err = errno;
- (void) fprintf(stderr, "di_init failed: %s\n", strerror(errno));
- } else {
- args.bus = dev->bus;
- args.dev = dev->dev;
- args.func = dev->func;
- (void) di_walk_node(rnode, DI_WALK_CLDFIRST,
- (void *)&args, find_target_node);
- di_fini(rnode);
- }
- }
- if (args.node != DI_NODE_NIL) {
/*
* It will succeed for sure, because it was
* successfully called in find_target_node
"assigned-addresses",
®buf);
+#ifdef __sparc
+ if ((len <= 0) && di_phdl) {
+ len = di_prom_prop_lookup_ints(di_phdl, args.node,
+ "assigned-addresses", ®buf);
+ }
+#endif
}
if (len <= 0)
- return (err);
+ goto cleanup;
/*
}
}
+ cleanup:
+ if (rnode != DI_NODE_NIL) {
+ di_fini(rnode);
+ }
return (err);
}
+/**
+ * Map a memory region for a device using /dev/xsvc (x86) or fb device (sparc)
+ *
+ * \param dev Device whose memory region is to be mapped.
+ * \param map Parameters of the mapping that is to be created.
+ *
+ * \return
+ * Zero on success or an \c errno value on failure.
+ */
+static int
+pci_device_solx_devfs_map_range(struct pci_device *dev,
+ struct pci_device_mapping *map)
+{
+ const int prot = ((map->flags & PCI_DEV_MAP_FLAG_WRITABLE) != 0)
+ ? (PROT_READ | PROT_WRITE) : PROT_READ;
+ int err = 0;
+
+ const char *map_dev;
+ int map_fd;
+
+#ifdef __sparc
+ char map_dev_buf[128];
+
+ if (MAPPING_DEV_PATH(dev)) {
+ snprintf(map_dev_buf, sizeof (map_dev_buf), "%s%s",
+ "/devices", MAPPING_DEV_PATH(dev));
+ map_dev = map_dev_buf;
+ }
+ else
+ map_dev = "/dev/fb0";
+
+ map_fd = -1;
+#else
+ /*
+ * Still uses xsvc to do the user space mapping on x86/x64,
+ * caches open fd across multiple calls.
+ */
+ map_dev = "/dev/xsvc";
+ map_fd = xsvc_fd;
+#endif
+
+ if (map_fd < 0) {
+ if ((map_fd = open(map_dev, O_RDWR | O_CLOEXEC)) < 0) {
+ err = errno;
+ (void) fprintf(stderr, "can not open %s: %s\n", map_dev,
+ strerror(errno));
+ return err;
+ }
+ }
+
+ map->memory = mmap(NULL, map->size, prot, MAP_SHARED, map_fd, map->base);
+ if (map->memory == MAP_FAILED) {
+ err = errno;
+
+ (void) fprintf(stderr, "map rom region =%llx failed: %s\n",
+ map->base, strerror(errno));
+ }
+
+#ifdef __sparc
+ close (map_fd);
+#endif
+
+ return err;
+}
+
/*
* Solaris version: read the VGA ROM data
*/
pcitool_reg_t cfg_prg;
int err = 0;
int i = 0;
- nexus_t *nexus = find_nexus_for_bus(dev->bus);
+ nexus_t *nexus;
+
+#ifdef __sparc
+ nexus = find_nexus_for_dev(dev);
+#else
+ nexus = find_nexus_for_bus(dev->domain, dev->bus);
+#endif
*bytes_read = 0;
pcitool_reg_t cfg_prg;
int err = 0;
int cmd;
- nexus_t *nexus = find_nexus_for_bus(dev->bus);
+ nexus_t *nexus;
+
+#ifdef __sparc
+ nexus = find_nexus_for_dev(dev);
+#else
+ nexus = find_nexus_for_bus(dev->domain, dev->bus);
+#endif
if ( bytes_written != NULL ) {
*bytes_written = 0;
switch (size) {
case 1:
cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_1 + NATIVE_ENDIAN;
+ cfg_prg.data = *((const uint8_t *)data);
break;
case 2:
cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_2 + NATIVE_ENDIAN;
+ cfg_prg.data = *((const uint16_t *)data);
break;
case 4:
cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_4 + NATIVE_ENDIAN;
+ cfg_prg.data = *((const uint32_t *)data);
break;
case 8:
cfg_prg.acc_attr = PCITOOL_ACC_ATTR_SIZE_8 + NATIVE_ENDIAN;
+ cfg_prg.data = *((const uint64_t *)data);
break;
default:
return EINVAL;
cfg_prg.func_no = dev->func;
cfg_prg.barnum = 0;
cfg_prg.user_version = PCITOOL_USER_VERSION;
- cfg_prg.data = *((uint64_t *)data);
/*
* Check if this device is bridge device.
return (err);
}
+static struct pci_io_handle *
+pci_device_solx_devfs_open_legacy_io(struct pci_io_handle *ret,
+ struct pci_device *dev,
+ pciaddr_t base, pciaddr_t size)
+{
+#ifdef __x86
+ if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) == 0) {
+ ret->base = base;
+ ret->size = size;
+ return ret;
+ }
+#endif
+ return NULL;
+}
+
+static uint32_t
+pci_device_solx_devfs_read32(struct pci_io_handle *handle, uint32_t reg)
+{
+#ifdef __x86
+ uint16_t port = (uint16_t) (handle->base + reg);
+ uint32_t ret;
+ __asm__ __volatile__("inl %1,%0":"=a"(ret):"d"(port));
+ return ret;
+#else
+ return *(uint32_t *)((uintptr_t)handle->memory + reg);
+#endif
+}
+
+static uint16_t
+pci_device_solx_devfs_read16(struct pci_io_handle *handle, uint32_t reg)
+{
+#ifdef __x86
+ uint16_t port = (uint16_t) (handle->base + reg);
+ uint16_t ret;
+ __asm__ __volatile__("inw %1,%0":"=a"(ret):"d"(port));
+ return ret;
+#else
+ return *(uint16_t *)((uintptr_t)handle->memory + reg);
+#endif
+}
+
+static uint8_t
+pci_device_solx_devfs_read8(struct pci_io_handle *handle, uint32_t reg)
+{
+#ifdef __x86
+ uint16_t port = (uint16_t) (handle->base + reg);
+ uint8_t ret;
+ __asm__ __volatile__("inb %1,%0":"=a"(ret):"d"(port));
+ return ret;
+#else
+ return *(uint8_t *)((uintptr_t)handle->memory + reg);
+#endif
+}
+
+static void
+pci_device_solx_devfs_write32(struct pci_io_handle *handle, uint32_t reg,
+ uint32_t data)
+{
+#ifdef __x86
+ uint16_t port = (uint16_t) (handle->base + reg);
+ __asm__ __volatile__("outl %0,%1"::"a"(data), "d"(port));
+#else
+ *(uint16_t *)((uintptr_t)handle->memory + reg) = data;
+#endif
+}
+
+static void
+pci_device_solx_devfs_write16(struct pci_io_handle *handle, uint32_t reg,
+ uint16_t data)
+{
+#ifdef __x86
+ uint16_t port = (uint16_t) (handle->base + reg);
+ __asm__ __volatile__("outw %0,%1"::"a"(data), "d"(port));
+#else
+ *(uint8_t *)((uintptr_t)handle->memory + reg) = data;
+#endif
+}
+
+static void
+pci_device_solx_devfs_write8(struct pci_io_handle *handle, uint32_t reg,
+ uint8_t data)
+{
+#ifdef __x86
+ uint16_t port = (uint16_t) (handle->base + reg);
+ __asm__ __volatile__("outb %0,%1"::"a"(data), "d"(port));
+#else
+ *(uint32_t *)((uintptr_t)handle->memory + reg) = data;
+#endif
+}
-/**
- * Map a memory region for a device using /dev/xsvc.
- *
- * \param dev Device whose memory region is to be mapped.
- * \param map Parameters of the mapping that is to be created.
- *
- * \return
- * Zero on success or an \c errno value on failure.
- */
static int
-pci_device_solx_devfs_map_range(struct pci_device *dev,
- struct pci_device_mapping *map)
+pci_device_solx_devfs_map_legacy(struct pci_device *dev, pciaddr_t base,
+ pciaddr_t size, unsigned map_flags,
+ void **addr)
+{
+ int err;
+ struct pci_device_mapping map = {
+ .base = base,
+ .size = size,
+ .flags = map_flags,
+ };
+
+ err = pci_device_solx_devfs_map_range(dev, &map);
+ if (err == 0)
+ *addr = map.memory;
+ return err;
+}
+
+static int
+pci_device_solx_devfs_unmap_legacy(struct pci_device *dev,
+ void *addr, pciaddr_t size)
+{
+ struct pci_device_mapping map = {
+ .memory = addr,
+ .size = size,
+ };
+
+ return pci_device_generic_unmap_range(dev, &map);
+}
+
+static const struct pci_system_methods solx_devfs_methods = {
+ .destroy = pci_system_solx_devfs_destroy,
+ .destroy_device = NULL,
+ .read_rom = pci_device_solx_devfs_read_rom,
+ .probe = pci_device_solx_devfs_probe,
+ .map_range = pci_device_solx_devfs_map_range,
+ .unmap_range = pci_device_generic_unmap_range,
+
+ .read = pci_device_solx_devfs_read,
+ .write = pci_device_solx_devfs_write,
+
+ .fill_capabilities = pci_fill_capabilities_generic,
+
+ .open_legacy_io = pci_device_solx_devfs_open_legacy_io,
+ .read32 = pci_device_solx_devfs_read32,
+ .read16 = pci_device_solx_devfs_read16,
+ .read8 = pci_device_solx_devfs_read8,
+ .write32 = pci_device_solx_devfs_write32,
+ .write16 = pci_device_solx_devfs_write16,
+ .write8 = pci_device_solx_devfs_write8,
+ .map_legacy = pci_device_solx_devfs_map_legacy,
+ .unmap_legacy = pci_device_solx_devfs_unmap_legacy,
+};
+
+/*
+ * Attempt to access PCI subsystem using Solaris's devfs interface.
+ * Solaris version
+ */
+_pci_hidden int
+pci_system_solx_devfs_create( void )
{
- const int prot = ((map->flags & PCI_DEV_MAP_FLAG_WRITABLE) != 0)
- ? (PROT_READ | PROT_WRITE) : PROT_READ;
int err = 0;
+ di_node_t di_node;
+ probe_info_t pinfo;
+ struct pci_device_private *devices;
- /*
- * Still used xsvc to do the user space mapping
- */
- if (xsvc_fd < 0) {
- if ((xsvc_fd = open("/dev/xsvc", O_RDWR)) < 0) {
- err = errno;
- (void) fprintf(stderr, "can not open /dev/xsvc: %s\n",
- strerror(errno));
- return err;
- }
+ if (nexus_list != NULL) {
+ return 0;
}
- map->memory = mmap(NULL, map->size, prot, MAP_SHARED, xsvc_fd, map->base);
- if (map->memory == MAP_FAILED) {
+ if ((di_node = di_init("/", DINFOCPYALL)) == DI_NODE_NIL) {
err = errno;
+ (void) fprintf(stderr, "di_init() failed: %s\n",
+ strerror(errno));
+ return (err);
+ }
- (void) fprintf(stderr, "map rom region =%llx failed: %s\n",
- map->base, strerror(errno));
+ if ((devices = calloc(INITIAL_NUM_DEVICES,
+ sizeof (struct pci_device_private))) == NULL) {
+ err = errno;
+ di_fini(di_node);
+ return (err);
}
- return err;
+#ifdef __sparc
+ if ((di_phdl = di_prom_init()) == DI_PROM_HANDLE_NIL)
+ (void) fprintf(stderr, "di_prom_init failed: %s\n", strerror(errno));
+#endif
+
+ pinfo.num_allocated_elems = INITIAL_NUM_DEVICES;
+ pinfo.num_devices = 0;
+ pinfo.devices = devices;
+ (void) di_walk_minor(di_node, DDI_NT_REGACC, 0, &pinfo, probe_nexus_node);
+
+ di_fini(di_node);
+
+ if ((pci_sys = calloc(1, sizeof (struct pci_system))) == NULL) {
+ err = errno;
+ free(devices);
+ return (err);
+ }
+
+ pci_sys->methods = &solx_devfs_methods;
+ pci_sys->devices = pinfo.devices;
+ pci_sys->num_devices = pinfo.num_devices;
+
+ return (err);
}
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