minigbm: Fix cursor and scanout flags

[android-x86/external-minigbm.git] / tegra.c

diff --git a/tegra.c b/tegra.c
index 17a4cbd..513229c 100644 (file)
--- a/tegra.c
+++ b/tegra.c
@@ -33,6 +33,17 @@ enum nv_mem_kind
        NV_MEM_KIND_GENERIC_16Bx2 = 0xfe,
 };
 
+static struct supported_combination combos[4] = {
+       {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE,
+               DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
+       {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE,
+               DRV_BO_USE_RENDERING | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+       {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE,
+               DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR | DRV_BO_USE_SW_READ_OFTEN | DRV_BO_USE_SW_WRITE_OFTEN},
+       {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE,
+               DRV_BO_USE_RENDERING | DRV_BO_USE_SW_READ_RARELY | DRV_BO_USE_SW_WRITE_RARELY},
+};
+
 static int compute_block_height_log2(int height)
 {
        int block_height_log2 = NV_DEFAULT_BLOCK_HEIGHT_LOG2;
@@ -56,7 +67,7 @@ static void compute_layout_blocklinear(int width, int height, int format,
                                       uint32_t *block_height_log2,
                                       uint32_t *stride, uint32_t *size)
 {
-       int pitch = drv_stride_from_format(format, width);
+       int pitch = drv_stride_from_format(format, width, 0);
 
        /* Align to blocklinear blocks. */
        pitch = ALIGN(pitch, NV_BLOCKLINEAR_GOB_WIDTH);
@@ -83,10 +94,16 @@ static void compute_layout_blocklinear(int width, int height, int format,
 static void compute_layout_linear(int width, int height, int format,
                                  uint32_t *stride, uint32_t *size)
 {
-       *stride = drv_stride_from_format(format, width);
+       *stride = drv_stride_from_format(format, width, 0);
        *size = *stride * height;
 }
 
+static int tegra_init(struct driver *drv)
+{
+       drv_insert_combinations(drv, combos, ARRAY_SIZE(combos));
+       return drv_add_kms_flags(drv);
+}
+
 static int tegra_bo_create(struct bo *bo, uint32_t width, uint32_t height,
                           uint32_t format, uint32_t flags)
 {
@@ -114,7 +131,7 @@ static int tegra_bo_create(struct bo *bo, uint32_t width, uint32_t height,
 
        bo->handles[0].u32 = gem_create.handle;
        bo->offsets[0] = 0;
-       bo->sizes[0] = size;
+       bo->total_size = bo->sizes[0] = size;
        bo->strides[0] = stride;
 
        if (kind != NV_MEM_KIND_PITCH) {
@@ -135,13 +152,13 @@ static int tegra_bo_create(struct bo *bo, uint32_t width, uint32_t height,
                /* Encode blocklinear parameters for EGLImage creation. */
                bo->tiling = (kind & 0xff) |
                             ((block_height_log2 & 0xf) << 8);
-               bo->format_modifiers[0] = drv_fourcc_mod_code(NV, bo->tiling);
+               bo->format_modifiers[0] = fourcc_mod_code(NV, bo->tiling);
        }
 
        return 0;
 }
 
-static void *tegra_bo_map(struct bo *bo)
+static void *tegra_bo_map(struct bo *bo, struct map_info *data, size_t plane)
 {
        int ret;
        struct drm_tegra_gem_mmap gem_map;
@@ -156,24 +173,19 @@ static void *tegra_bo_map(struct bo *bo)
                return MAP_FAILED;
        }
 
-       return mmap(0, bo->sizes[0], PROT_READ | PROT_WRITE, MAP_SHARED,
+       data->length = bo->total_size;
+
+       return mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED,
                    bo->drv->fd, gem_map.offset);
 }
 
-const struct backend backend_tegra =
+struct backend backend_tegra =
 {
        .name = "tegra",
+       .init = tegra_init,
        .bo_create = tegra_bo_create,
        .bo_destroy = drv_gem_bo_destroy,
        .bo_map = tegra_bo_map,
-       .format_list = {
-               /* Linear support */
-               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR},
-               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR},
-               /* Blocklinear support */
-               {DRV_FORMAT_XRGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING},
-               {DRV_FORMAT_ARGB8888, DRV_BO_USE_SCANOUT | DRV_BO_USE_RENDERING},
-       }
 };
 
 #endif