[RISCV] Add support for %pcrel_lo.

[android-x86/external-llvm.git] / test / MC / RISCV / relocations.s

diff --git a/test/MC/RISCV/relocations.s b/test/MC/RISCV/relocations.s
index 81affb7..13c6b51 100644 (file)
--- a/test/MC/RISCV/relocations.s
+++ b/test/MC/RISCV/relocations.s
@@ -54,6 +54,26 @@ auipc t1, %pcrel_hi(foo+4)
 # INSTR: auipc t1, %pcrel_hi(foo+4)
 # FIXUP: fixup A - offset: 0, value: %pcrel_hi(foo+4), kind: fixup_riscv_pcrel_hi20
 
+addi t1, t1, %pcrel_lo(foo)
+# RELOC: R_RISCV_PCREL_LO12_I foo 0x0
+# INSTR: addi t1, t1, %pcrel_lo(foo)
+# FIXUP: fixup A - offset: 0, value: %pcrel_lo(foo), kind: fixup_riscv_pcrel_lo12_i
+
+addi t1, t1, %pcrel_lo(foo+4)
+# RELOC: R_RISCV_PCREL_LO12_I foo 0x4
+# INSTR: addi t1, t1, %pcrel_lo(foo+4)
+# FIXUP: fixup A - offset: 0, value: %pcrel_lo(foo+4), kind: fixup_riscv_pcrel_lo12_i
+
+sb t1, %pcrel_lo(foo)(a2)
+# RELOC: R_RISCV_PCREL_LO12_S foo 0x0
+# INSTR: sb t1, %pcrel_lo(foo)(a2)
+# FIXUP: fixup A - offset: 0, value: %pcrel_lo(foo), kind: fixup_riscv_pcrel_lo12_s
+
+sb t1, %pcrel_lo(foo+4)(a2)
+# RELOC: R_RISCV_PCREL_LO12_S foo 0x4
+# INSTR: sb t1, %pcrel_lo(foo+4)(a2)
+# FIXUP: fixup A - offset: 0, value: %pcrel_lo(foo+4), kind: fixup_riscv_pcrel_lo12_s
+
 jal zero, foo
 # RELOC: R_RISCV_JAL
 # INSTR: jal zero, foo