vga output working...

[motonesfpga/motonesfpga.git] / tools / qt_proj_test5 / qt_proj_test5.vhd

diff --git a/tools/qt_proj_test5/qt_proj_test5.vhd b/tools/qt_proj_test5/qt_proj_test5.vhd
index 699853f..f6b69ca 100644 (file)
--- a/tools/qt_proj_test5/qt_proj_test5.vhd
+++ b/tools/qt_proj_test5/qt_proj_test5.vhd
@@ -29,7 +29,7 @@ entity qt_proj_test5 is
 \r
 \r
         base_clk       : in std_logic;\r
---        base_clk_27mhz       : in std_logic;\r
+        base_clk_27mhz         : in std_logic;\r
         rst_n          : in std_logic;\r
         h_sync_n    : out std_logic;\r
         v_sync_n    : out std_logic;\r
@@ -208,18 +208,18 @@ begin
                 nes_b       \r
         );\r
 \r
---        vga_clk_gen_inst : vga_clk_gen\r
---        PORT map\r
---        (\r
---            base_clk_27mhz, vga_clk_pll\r
---        );\r
+        vga_clk_gen_inst : vga_clk_gen\r
+        PORT map\r
+        (\r
+            base_clk_27mhz, vga_clk_pll\r
+        );\r
 \r
     \r
     vga_ctl_inst : vga_ctl\r
     port map (  ppu_clk     ,\r
             --vga_clk_pll, \r
-            ppu_clk ,\r
-            --vga_clk     ,\r
+            --ppu_clk ,\r
+            vga_clk     ,\r
             rst_n       ,\r
             pos_x       ,\r
             pos_y       ,\r