X-Git-Url: http://git.osdn.net/view?a=blobdiff_plain;f=arch%2Favr32%2FKconfig;h=b189680d18b0493d7f9d12f265442563bec2f11d;hb=7df4f694356a125e4553ca35b215fd9e88e858c5;hp=33a5b2969eb4addf24e36a59159d72488530dc0b;hpb=0552f297951d0ab3a1027f9b06fa40c9be8378ba;p=android-x86%2Fkernel.git

diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
index 33a5b2969eb4..b189680d18b0 100644
--- a/arch/avr32/Kconfig
+++ b/arch/avr32/Kconfig
@@ -121,11 +121,38 @@ config BOARD_ATSTK1000
 config BOARD_ATNGW100
 	bool "ATNGW100 Network Gateway"
 	select CPU_AT32AP7000
+
+config BOARD_HAMMERHEAD
+	bool "Hammerhead board"
+	select CPU_AT32AP7000
+	select USB_ARCH_HAS_HCD
+	help
+	  The Hammerhead platform is built around a AVR32 32-bit microcontroller from Atmel.
+	  It offers versatile peripherals, such as ethernet, usb device, usb host etc.
+
+	  The board also incooperates a power supply and is a Power over Ethernet (PoE) Powered
+	  Device (PD).
+
+	  Additonally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is
+	  mapped into the 32-bit AVR memory bus. The FPGA offers two DDR2 SDRAM interfaces, which
+	  will cover even the most exceptional need of memory bandwidth. Together with the onboard
+	  video decoder the board is ready for video processing.
+
+	  For more information see: http://www.miromico.com/hammerhead
+
+config BOARD_FAVR_32
+	bool "Favr-32 LCD-board"
+	select CPU_AT32AP7000
+
+config BOARD_MIMC200
+	bool "MIMC200 CPU board"
+	select CPU_AT32AP7000
 endchoice
 
-if BOARD_ATSTK1000
 source "arch/avr32/boards/atstk1000/Kconfig"
-endif
+source "arch/avr32/boards/atngw100/Kconfig"
+source "arch/avr32/boards/hammerhead/Kconfig"
+source "arch/avr32/boards/favr-32/Kconfig"
 
 choice
 	prompt "Boot loader type"