X-Git-Url: http://git.osdn.net/view?a=blobdiff_plain;f=hirado%2Fkernel%2Ftools%2Fblackfin-vdsp%2Fsample1_acb_bf592%2Fsample1.ldf;fp=hirado%2Fkernel%2Ftools%2Fblackfin-vdsp%2Fsample1_acb_bf592%2Fsample1.ldf;h=a4b8297881713eac18810005cd27fc7eb3b1f2a6;hb=3225853d505887d684356245571ca40edb8fab47;hp=0000000000000000000000000000000000000000;hpb=b4022c9a6d577ab1fd3dcf4162c0b74433bc76d9;p=trx-305dsp%2Fdsp.git diff --git a/hirado/kernel/tools/blackfin-vdsp/sample1_acb_bf592/sample1.ldf b/hirado/kernel/tools/blackfin-vdsp/sample1_acb_bf592/sample1.ldf new file mode 100644 index 0000000..a4b8297 --- /dev/null +++ b/hirado/kernel/tools/blackfin-vdsp/sample1_acb_bf592/sample1.ldf @@ -0,0 +1,406 @@ +/* MANAGED-BY-SYSTEM-BUILDER */ +/* VisualDSP++ 5.0 Update 10 */ +/* LDF Printer version: 5.9.0.1 */ +/* ldfgen.exe version: 5.9.0.1 */ +/* VDSG version: 5.9.0.1 */ + +/* +** ADSP-BF592-A linker description file generated on Jul 20, 2012 at 15:59:24. +** +** Copyright (C) 2000-2010 Analog Devices Inc., All Rights Reserved. +** +** This file is generated automatically based upon the options selected +** in the LDF Wizard. Changes to the LDF configuration should be made by +** changing the appropriate options rather than editing this file. +** +** Configuration:- +** crt_doj: sample1_acb_bf592_basiccrt.doj +** processor: ADSP-BF592-A +** product_name: VisualDSP++ 5.0 Update 10 +** si_revision: automatic +** default_silicon_revision_from_archdef: 0.2 +** using_cplusplus: true +** mem_init: false +** use_vdk: false +** use_mt: false +** use_eh: true +** use_argv: true +** running_from_internal_memory: true +** user_heap_src_file: X:\Work\jsp\tools\blackfin-vdsp\sample1_acb_bf592\sample1_acb_bf592_heaptab.c +** libraries_use_stdlib: true +** libraries_use_fileio_libs: false +** libraries_use_ieeefp_emulation_libs: false +** libraries_use_eh_enabled_libs: false +** libraries_use_fixed_point_io_libs: false +** libraries_use_utility_rom: true +** detect_stackoverflow: false +** system_heap: L1 +** system_heap_min_size: 2k +** system_stack: L1 +** system_stack_min_size: 2k +** use_sdram: false +** +*/ + +ARCHITECTURE(ADSP-BF592-A) + +SEARCH_DIR($ADI_DSP/Blackfin/lib) + + +#if !defined(NO_UTILITY_ROM) +# if defined(__SILICON_REVISION__) && (__SILICON_REVISION__==0) +# warning there is no Utility ROM in revision 0.0 +# define NO_UTILITY_ROM +# elif !defined(__SILICON_REVISION__) || (__SILICON_REVISION__==0xffff) +# warning \ + The Tools Utility ROM will not be used to link this application because \ +the silicon revision does not specify a specific revision number. This message \ +may be suppressed by defining the LDF macro NO_UTILITY_ROM. +# define NO_UTILITY_ROM +# endif +#endif + + +// Workarounds are enabled, exceptions are disabled. +#define RT_LIB_NAME(x) lib ## x ## y.dlb +#define RT_LIB_NAME_EH(x) lib ## x ## y.dlb +#define RT_LIB_NAME_MT(x) lib ## x ## y.dlb +#define RT_LIB_NAME_EH_MT(x) lib ## x ## y.dlb +#define RT_OBJ_NAME(x) x ## y.doj +#define RT_OBJ_NAME_MT(x) x ## mty.doj + + +$LIBRARIES = + +/*$VDSG */ +/* Text inserted between these $VDSG comments will be preserved */ +/*$VDSG */ + + RT_LIB_NAME_MT(small532) + ,RT_LIB_NAME_MT(io532) + ,RT_LIB_NAME_MT(c532) + ,RT_LIB_NAME_MT(event532) + ,RT_LIB_NAME(ssl592-a) + ,RT_LIB_NAME(drv592-a) + ,RT_LIB_NAME_MT(x532) + ,RT_LIB_NAME_EH_MT(cpp532) + ,RT_LIB_NAME(f64ieee532) + ,RT_LIB_NAME(dsp532) + ,RT_LIB_NAME(sftflt532) + ,RT_LIB_NAME(etsi532) + ,RT_OBJ_NAME_MT(idle532) + ,RT_LIB_NAME_MT(rt_fileio532) + +/*$VDSG */ +/* Text inserted between these $VDSG comments will be preserved */ +/*$VDSG */ + + ; + +$OBJECTS = + +/*$VDSG */ +/* Text inserted between these $VDSG comments will be preserved */ +/*$VDSG */ + + $COMMAND_LINE_OBJECTS + , RT_LIB_NAME(profile532) +#if !defined(NO_UTILITY_ROM) + , romdata-BF592-A.doj +#endif + , $COMMAND_LINE_OBJECTS + , "cplbtab592-a.doj" + +/*$VDSG */ +/* Text inserted between these $VDSG comments will be preserved */ +/*$VDSG */ + + , RT_OBJ_NAME(crtn532) + ; + +$OBJS_LIBS_INTERNAL = + +/*$VDSG */ +/* Text inserted between these $VDSG comments will be preserved */ +/*$VDSG */ + + $OBJECTS{prefersMem("internal")}, $LIBRARIES{prefersMem("internal")} + +/*$VDSG */ +/* Text inserted between these $VDSG comments will be preserved */ +/*$VDSG */ + + ; + +$OBJS_LIBS_NOT_EXTERNAL = + +/*$VDSG */ +/* Text inserted between these $VDSG comments will be preserved */ +/*$VDSG */ + + $OBJECTS{!prefersMem("external")}, $LIBRARIES{!prefersMem("external")} + +/*$VDSG */ +/* Text inserted between these $VDSG comments will be preserved */ +/*$VDSG */ + + ; + + +/*$VDSG */ +/* Text inserted between these $VDSG comments will be preserved */ +/*$VDSG */ + + +MEMORY +{ +/* +** ADSP-BF592-A MEMORY MAP. +** +** The known memory spaces are as follows: +** +** 0xFFE00000 - 0xFFFFFFFF Core MMR registers (2MB) +** 0xFFC00000 - 0xFFDFFFFF System MMR registers (2MB) +** 0xFFB01000 - 0xFFBFFFFF Reserved +** 0xFFB00000 - 0xFFB00FFF Scratchpad SRAM (4K) +** 0xFFA20000 - 0xFFAFFFFF Reserved +** 0xFFA10000 - 0xFFA1FFFF L1 Instruction ROM (64K) +** 0xFFA08000 - 0xFFA0FFFF Reserved +** 0xFFA00000 - 0xFFA07FFF L1 Instruction SRAM (32K) +** 0xFF808000 - 0xFF9FFFFF Reserved +** 0xFF800000 - 0xFF807FFF L1 Data SRAM (32K) +** 0xEF001000 - 0xFF7FFFFF Reserved +** 0xEF000000 - 0xEF000FFF Boot ROM (4K) +** 0x00000000 - 0xEEFFFFFF Reserved +** +** Notes: +** 0xFF807FEF-0xFF807FFF Required by boot-loader. +*/ + + MEM_L1_SCRATCH { TYPE(RAM) START(0xFFB00000) END(0xFFB00FFF) WIDTH(8) } + MEM_L1_CODE { TYPE(RAM) START(0xFFA00000) END(0xFFA07FFF) WIDTH(8) } + MEM_L1_DATA { TYPE(RAM) START(0xFF800000) END(0xFF807EAF) WIDTH(8) } + MEM_ARGV { TYPE(RAM) START(0xFF807EB0) END(0xFF807FFF) WIDTH(8) } + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + +} /* MEMORY */ + +PROCESSOR p0 +{ + OUTPUT($COMMAND_LINE_OUTPUT_FILE) + RESOLVE(start, 0xFFA00000) + RESOLVE(___argv_string, 0xFF807F00) + KEEP(start, start) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + #if !defined(NO_UTILITY_ROM) + #include "ADSP-BF592-A-LDF.h" + #endif + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + SECTIONS + { + /* Workaround for hardware errata 05-00-0189 and 05-00-0310 - + ** "Speculative (and fetches made at boundary of reserved memory + ** space) for instruction or data fetches may cause false + ** protection exceptions" and "False hardware errors caused by + ** fetches at the boundary of reserved memory ". + ** + ** Done by avoiding use of 76 bytes from at the end of blocks + ** that are adjacent to reserved memory. Workaround is enabled + ** for appropriate silicon revisions (-si-revision switch). + */ + RESERVE(___wab0=MEMORY_END(MEM_L1_SCRATCH) - 75, ___l0 = 76) + RESERVE(___wab1=MEMORY_END(MEM_L1_CODE) - 75, ___l1 = 76) + RESERVE(___wab2=MEMORY_END(MEM_ARGV) - 75, ___l2 = 76) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + scratchpad NO_INIT + { + INPUT_SECTION_ALIGN(4) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + INPUT_SECTIONS($OBJECTS(L1_scratchpad) $LIBRARIES(L1_scratchpad)) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + } > MEM_L1_SCRATCH + + L1_code + { + INPUT_SECTION_ALIGN(4) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + INPUT_SECTIONS($OBJECTS(L1_code) $LIBRARIES(L1_code)) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + INPUT_SECTIONS($OBJECTS(noncache_code) $LIBRARIES(noncache_code)) + INPUT_SECTIONS($OBJECTS(cplb_code) $LIBRARIES(cplb_code)) + INPUT_SECTIONS($OBJECTS(cplb) $LIBRARIES(cplb)) + INPUT_SECTIONS($OBJS_LIBS_INTERNAL(program)) + INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(program)) + INPUT_SECTIONS($OBJECTS(program) $LIBRARIES(program)) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + } > MEM_L1_CODE + + L1_data_1 + { + INPUT_SECTION_ALIGN(4) + ___l1_data_cache_a = 0; + ___l1_data_cache_b = 0; + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + INPUT_SECTIONS($OBJECTS(L1_data_a) $LIBRARIES(L1_data_a)) + INPUT_SECTIONS($OBJECTS(L1_data) $LIBRARIES(L1_data)) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + RESERVE(heaps_and_stack_in_L1_data, heaps_and_stack_in_L1_data_length = 4096,4) + } > MEM_L1_DATA + + L1_data_bsz ZERO_INIT + { + INPUT_SECTION_ALIGN(4) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + INPUT_SECTIONS($OBJECTS(L1_bsz) $LIBRARIES(L1_bsz)) + INPUT_SECTIONS($OBJS_LIBS_INTERNAL(bsz)) + INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(bsz)) + INPUT_SECTIONS($OBJECTS(bsz) $LIBRARIES(bsz)) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + } > MEM_L1_DATA + + L1_data_tables + { + INPUT_SECTION_ALIGN(4) + FORCE_CONTIGUITY + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + INPUT_SECTIONS($OBJECTS(ctor) $LIBRARIES(ctor)) + INPUT_SECTIONS($OBJECTS(ctorl) $LIBRARIES(ctorl)) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + INPUT_SECTIONS($OBJECTS(.gdt) $LIBRARIES(.gdt)) + INPUT_SECTIONS($OBJECTS(.gdtl) $LIBRARIES(.gdtl)) + INPUT_SECTIONS($OBJECTS(.frt) $LIBRARIES(.frt)) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + } > MEM_L1_DATA + + L1_data_2 + { + INPUT_SECTION_ALIGN(4) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + INPUT_SECTIONS($OBJECTS(constdata) $LIBRARIES(constdata)) + INPUT_SECTIONS($OBJECTS(voldata) $LIBRARIES(voldata)) + INPUT_SECTIONS($OBJECTS(cplb_data) $LIBRARIES(cplb_data)) + INPUT_SECTIONS($OBJS_LIBS_INTERNAL(data1)) + INPUT_SECTIONS($OBJS_LIBS_NOT_EXTERNAL(data1)) + INPUT_SECTIONS($OBJECTS(data1) $LIBRARIES(data1)) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + } > MEM_L1_DATA + + L1_data_3 + { + INPUT_SECTION_ALIGN(4) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + INPUT_SECTIONS($OBJECTS(vtbl) $LIBRARIES(vtbl)) + INPUT_SECTIONS($OBJECTS(.rtti) $LIBRARIES(.rtti)) + INPUT_SECTIONS($OBJECTS(.edt) $LIBRARIES(.edt)) + INPUT_SECTIONS($OBJECTS(.cht) $LIBRARIES(.cht)) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + } > MEM_L1_DATA + + L1_data_stack_heap + { + INPUT_SECTION_ALIGN(4) + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + RESERVE_EXPAND(heaps_and_stack_in_L1_data, heaps_and_stack_in_L1_data_length , 0, 4) + ldf_stack_space = heaps_and_stack_in_L1_data; + ldf_stack_end = (ldf_stack_space + (((heaps_and_stack_in_L1_data_length * 2048) / 4096) - 4)) & 0xfffffffc; + ldf_heap_space = ldf_stack_end + 4; + ldf_heap_end = (ldf_heap_space + (((heaps_and_stack_in_L1_data_length * 2048) / 4096) - 4)) & 0xfffffffc; + ldf_heap_length = ldf_heap_end - ldf_heap_space; + } > MEM_L1_DATA + + + /*$VDSG */ + /* Text inserted between these $VDSG comments will be preserved */ + /*$VDSG */ + + } /* SECTIONS */ +} /* p0 */ +