X-Git-Url: http://git.osdn.net/view?a=blobdiff_plain;f=i915.c;h=6df6dccdf43dd72394762287a4162c861ffbebc2;hb=1bd7b04a3ae68c0314bdee06c559093de9e5a304;hp=4710feb058af8d7cd1e23543b84ca4353d622d1e;hpb=60ee5833b16182702cafce54278721b635f3be89;p=android-x86%2Fexternal-minigbm.git diff --git a/i915.c b/i915.c index 4710feb..6df6dcc 100644 --- a/i915.c +++ b/i915.c @@ -6,8 +6,10 @@ #ifdef DRV_I915 +#include #include #include +#include #include #include #include @@ -20,16 +22,17 @@ #define I915_CACHELINE_SIZE 64 #define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1) -static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR8888, - DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565, - DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555, +static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB1555, + DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565, + DRM_FORMAT_XBGR2101010, DRM_FORMAT_XBGR8888, + DRM_FORMAT_XRGB1555, DRM_FORMAT_XRGB2101010, DRM_FORMAT_XRGB8888 }; -static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_NV12, - DRM_FORMAT_R8, DRM_FORMAT_UYVY, - DRM_FORMAT_YUYV }; +static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_R8, + DRM_FORMAT_UYVY, DRM_FORMAT_YUYV }; -static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID }; +static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID, + DRM_FORMAT_NV12 }; struct i915_device { uint32_t gen; @@ -48,6 +51,31 @@ static uint32_t i915_get_gen(int device_id) return 4; } +/* + * We allow allocation of ARGB formats for SCANOUT if the corresponding XRGB + * formats supports it. It's up to the caller (chrome ozone) to ultimately not + * scan out ARGB if the display controller only supports XRGB, but we'll allow + * the allocation of the bo here. + */ +static bool format_compatible(const struct combination *combo, uint32_t format) +{ + if (combo->format == format) + return true; + + switch (format) { + case DRM_FORMAT_XRGB8888: + return combo->format == DRM_FORMAT_ARGB8888; + case DRM_FORMAT_XBGR8888: + return combo->format == DRM_FORMAT_ABGR8888; + case DRM_FORMAT_RGBX8888: + return combo->format == DRM_FORMAT_RGBA8888; + case DRM_FORMAT_BGRX8888: + return combo->format == DRM_FORMAT_BGRA8888; + default: + return false; + } +} + static int i915_add_kms_item(struct driver *drv, const struct kms_item *item) { uint32_t i; @@ -57,12 +85,12 @@ static int i915_add_kms_item(struct driver *drv, const struct kms_item *item) * Older hardware can't scanout Y-tiled formats. Newer devices can, and * report this functionality via format modifiers. */ - for (i = 0; i < drv->combos.size; i++) { - combo = &drv->combos.data[i]; - if (combo->format != item->format) + for (i = 0; i < drv_array_size(drv->combos); i++) { + combo = (struct combination *)drv_array_at_idx(drv->combos, i); + if (!format_compatible(combo, item->format)) continue; - if (item->modifier == DRM_FORMAT_MOD_NONE && + if (item->modifier == DRM_FORMAT_MOD_LINEAR && combo->metadata.tiling == I915_TILING_X) { /* * FIXME: drv_query_kms() does not report the available modifiers @@ -70,11 +98,15 @@ static int i915_add_kms_item(struct driver *drv, const struct kms_item *item) * buffers, so let's add this to our combinations, except for * cursor, which must not be tiled. */ - combo->usage |= item->usage & ~BO_USE_CURSOR; + combo->use_flags |= item->use_flags & ~BO_USE_CURSOR; } + /* If we can scanout NV12, we support all tiling modes. */ + if (item->format == DRM_FORMAT_NV12) + combo->use_flags |= item->use_flags; + if (combo->metadata.modifier == item->modifier) - combo->usage |= item->usage; + combo->use_flags |= item->use_flags; } return 0; @@ -83,33 +115,27 @@ static int i915_add_kms_item(struct driver *drv, const struct kms_item *item) static int i915_add_combinations(struct driver *drv) { int ret; - uint32_t i, num_items; - struct kms_item *items; + uint32_t i; + struct drv_array *kms_items; struct format_metadata metadata; - uint64_t render_flags, texture_flags; + uint64_t render_use_flags, texture_use_flags; - render_flags = BO_USE_RENDER_MASK; - texture_flags = BO_USE_TEXTURE_MASK; + render_use_flags = BO_USE_RENDER_MASK; + texture_use_flags = BO_USE_TEXTURE_MASK; metadata.tiling = I915_TILING_NONE; metadata.priority = 1; - metadata.modifier = DRM_FORMAT_MOD_NONE; + metadata.modifier = DRM_FORMAT_MOD_LINEAR; - ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats), - &metadata, render_flags); - if (ret) - return ret; + drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats), + &metadata, render_use_flags); - ret = drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats), - &metadata, texture_flags); - if (ret) - return ret; + drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats), + &metadata, texture_use_flags); - ret = drv_add_combinations(drv, tileable_texture_source_formats, - ARRAY_SIZE(tileable_texture_source_formats), &metadata, - texture_flags); - if (ret) - return ret; + drv_add_combinations(drv, tileable_texture_source_formats, + ARRAY_SIZE(tileable_texture_source_formats), &metadata, + texture_use_flags); drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT); drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT); @@ -124,59 +150,56 @@ static int i915_add_combinations(struct driver *drv) drv_modify_combination(drv, DRM_FORMAT_R8, &metadata, BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE); - render_flags &= ~BO_USE_RENDERSCRIPT; - render_flags &= ~BO_USE_SW_WRITE_OFTEN; - render_flags &= ~BO_USE_SW_READ_OFTEN; - render_flags &= ~BO_USE_LINEAR; + render_use_flags &= ~BO_USE_RENDERSCRIPT; + render_use_flags &= ~BO_USE_SW_WRITE_OFTEN; + render_use_flags &= ~BO_USE_SW_READ_OFTEN; + render_use_flags &= ~BO_USE_LINEAR; - texture_flags &= ~BO_USE_RENDERSCRIPT; - texture_flags &= ~BO_USE_SW_WRITE_OFTEN; - texture_flags &= ~BO_USE_SW_READ_OFTEN; - texture_flags &= ~BO_USE_LINEAR; + texture_use_flags &= ~BO_USE_RENDERSCRIPT; + texture_use_flags &= ~BO_USE_SW_WRITE_OFTEN; + texture_use_flags &= ~BO_USE_SW_READ_OFTEN; + texture_use_flags &= ~BO_USE_LINEAR; metadata.tiling = I915_TILING_X; metadata.priority = 2; metadata.modifier = I915_FORMAT_MOD_X_TILED; - ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats), - &metadata, render_flags); - if (ret) - return ret; + drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats), + &metadata, render_use_flags); - ret = drv_add_combinations(drv, tileable_texture_source_formats, - ARRAY_SIZE(tileable_texture_source_formats), &metadata, - texture_flags); - if (ret) - return ret; + drv_add_combinations(drv, tileable_texture_source_formats, + ARRAY_SIZE(tileable_texture_source_formats), &metadata, + texture_use_flags); metadata.tiling = I915_TILING_Y; metadata.priority = 3; metadata.modifier = I915_FORMAT_MOD_Y_TILED; - ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats), - &metadata, render_flags); - if (ret) - return ret; + drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats), + &metadata, render_use_flags); - ret = drv_add_combinations(drv, tileable_texture_source_formats, - ARRAY_SIZE(tileable_texture_source_formats), &metadata, - texture_flags); - if (ret) - return ret; + drv_add_combinations(drv, tileable_texture_source_formats, + ARRAY_SIZE(tileable_texture_source_formats), &metadata, + texture_use_flags); + + /* Support y-tiled NV12 for libva */ + const uint32_t nv12_format = DRM_FORMAT_NV12; + drv_add_combinations(drv, &nv12_format, 1, &metadata, + BO_USE_TEXTURE | BO_USE_HW_VIDEO_DECODER); - items = drv_query_kms(drv, &num_items); - if (!items || !num_items) + kms_items = drv_query_kms(drv); + if (!kms_items) return 0; - for (i = 0; i < num_items; i++) { - ret = i915_add_kms_item(drv, &items[i]); + for (i = 0; i < drv_array_size(kms_items); i++) { + ret = i915_add_kms_item(drv, (struct kms_item *)drv_array_at_idx(kms_items, i)); if (ret) { - free(items); + drv_array_destroy(kms_items); return ret; } } - free(items); + drv_array_destroy(kms_items); return 0; } @@ -184,13 +207,21 @@ static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *strid uint32_t *aligned_height) { struct i915_device *i915 = bo->drv->priv; - uint32_t horizontal_alignment = 4; - uint32_t vertical_alignment = 4; + uint32_t horizontal_alignment; + uint32_t vertical_alignment; switch (tiling) { default: case I915_TILING_NONE: + /* + * The Intel GPU doesn't need any alignment in linear mode, + * but libva requires the allocation stride to be aligned to + * 16 bytes and height to 4 rows. Further, we round up the + * horizontal alignment so that row start on a cache line (64 + * bytes). + */ horizontal_alignment = 64; + vertical_alignment = 4; break; case I915_TILING_X: @@ -209,27 +240,6 @@ static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *strid break; } - /* - * The alignment calculated above is based on the full size luma plane and to have chroma - * planes properly aligned with subsampled formats, we need to multiply luma alignment by - * subsampling factor. - */ - switch (bo->format) { - case DRM_FORMAT_YVU420_ANDROID: - case DRM_FORMAT_YVU420: - horizontal_alignment *= 2; - /* Fall through */ - case DRM_FORMAT_NV12: - vertical_alignment *= 2; - break; - } - - /* - * For multi-planar formats we must be aligned to 16 - */ - if (bo->num_planes > 1) - vertical_alignment = MAX(vertical_alignment, 16); - *aligned_height = ALIGN(bo->height, vertical_alignment); if (i915->gen > 3) { *stride = ALIGN(*stride, horizontal_alignment); @@ -274,7 +284,7 @@ static int i915_init(struct driver *drv) get_param.value = &device_id; ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param); if (ret) { - fprintf(stderr, "drv: Failed to get I915_PARAM_CHIPSET_ID\n"); + drv_log("Failed to get I915_PARAM_CHIPSET_ID\n"); free(i915); return -EINVAL; } @@ -286,7 +296,7 @@ static int i915_init(struct driver *drv) get_param.value = &i915->has_llc; ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param); if (ret) { - fprintf(stderr, "drv: Failed to get I915_PARAM_HAS_LLC\n"); + drv_log("Failed to get I915_PARAM_HAS_LLC\n"); free(i915); return -EINVAL; } @@ -296,73 +306,78 @@ static int i915_init(struct driver *drv) return i915_add_combinations(drv); } -static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format, - uint64_t flags) +static int i915_bo_from_format(struct bo *bo, uint32_t width, uint32_t height, uint32_t format) +{ + uint32_t offset; + size_t plane; + int ret; + + offset = 0; + for (plane = 0; plane < drv_num_planes_from_format(format); plane++) { + uint32_t stride = drv_stride_from_format(format, width, plane); + uint32_t plane_height = drv_height_from_format(format, height, plane); + + if (bo->tiling != I915_TILING_NONE) + assert(IS_ALIGNED(offset, 4096)); + + ret = i915_align_dimensions(bo, bo->tiling, &stride, &plane_height); + if (ret) + return ret; + + bo->strides[plane] = stride; + bo->sizes[plane] = stride * plane_height; + bo->offsets[plane] = offset; + offset += bo->sizes[plane]; + } + + bo->total_size = offset; + + return 0; +} + +static int i915_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t height, + uint32_t format, uint64_t modifier) { int ret; size_t plane; - uint32_t stride; struct drm_i915_gem_create gem_create; struct drm_i915_gem_set_tiling gem_set_tiling; - struct combination *combo; - - combo = drv_get_combination(bo->drv, format, flags); - if (!combo) - return -EINVAL; - - bo->tiling = combo->metadata.tiling; - stride = drv_stride_from_format(format, width, 0); + switch (modifier) { + case DRM_FORMAT_MOD_LINEAR: + bo->tiling = I915_TILING_NONE; + break; + case I915_FORMAT_MOD_X_TILED: + bo->tiling = I915_TILING_X; + break; + case I915_FORMAT_MOD_Y_TILED: + bo->tiling = I915_TILING_Y; + break; + } - ret = i915_align_dimensions(bo, bo->tiling, &stride, &height); - if (ret) - return ret; + bo->format_modifiers[0] = modifier; - /* - * HAL_PIXEL_FORMAT_YV12 requires the buffer height not be aligned, but we need to keep - * total size as with aligned height to ensure enough padding space after each plane to - * satisfy GPU alignment requirements. - * - * We do it by first calling drv_bo_from_format() with aligned height and - * DRM_FORMAT_YVU420, which allows height alignment, saving the total size it calculates - * and then calling it again with requested parameters. - * - * This relies on the fact that i965 driver uses separate surfaces for each plane and - * contents of padding bytes is not affected, as it is only used to satisfy GPU cache - * requests. - * - * This is enforced by Mesa in src/intel/isl/isl_gen8.c, inside - * isl_gen8_choose_image_alignment_el(), which is used for GEN9 and GEN8. - */ if (format == DRM_FORMAT_YVU420_ANDROID) { - uint32_t unaligned_height = bo->height; - size_t total_size; - - drv_bo_from_format(bo, stride, height, DRM_FORMAT_YVU420); - total_size = bo->total_size; - drv_bo_from_format(bo, stride, unaligned_height, format); - bo->total_size = total_size; - } else { + /* + * We only need to be able to use this as a linear texture, + * which doesn't put any HW restrictions on how we lay it + * out. The Android format does require the stride to be a + * multiple of 16 and expects the Cr and Cb stride to be + * ALIGN(Y_stride / 2, 16), which we can make happen by + * aligning to 32 bytes here. + */ + uint32_t stride = ALIGN(width, 32); drv_bo_from_format(bo, stride, height, format); + } else { + i915_bo_from_format(bo, width, height, format); } - /* - * Quoting Mesa ISL library: - * - * - For linear surfaces, additional padding of 64 bytes is required at - * the bottom of the surface. This is in addition to the padding - * required above. - */ - if (bo->tiling == I915_TILING_NONE) - bo->total_size += 64; - memset(&gem_create, 0, sizeof(gem_create)); gem_create.size = bo->total_size; ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create); if (ret) { - fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n", - gem_create.size); + drv_log("DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n", gem_create.size); return ret; } @@ -381,13 +396,40 @@ static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32 gem_close.handle = bo->handles[0].u32; drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close); - fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_TILING failed with %d", errno); + drv_log("DRM_IOCTL_I915_GEM_SET_TILING failed with %d\n", errno); return -errno; } return 0; } +static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format, + uint64_t use_flags) +{ + struct combination *combo; + + combo = drv_get_combination(bo->drv, format, use_flags); + if (!combo) + return -EINVAL; + + return i915_bo_create_for_modifier(bo, width, height, format, combo->metadata.modifier); +} + +static int i915_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height, + uint32_t format, const uint64_t *modifiers, uint32_t count) +{ + static const uint64_t modifier_order[] = { + I915_FORMAT_MOD_Y_TILED, + I915_FORMAT_MOD_X_TILED, + DRM_FORMAT_MOD_LINEAR, + }; + uint64_t modifier; + + modifier = drv_pick_modifier(modifiers, count, modifier_order, ARRAY_SIZE(modifier_order)); + + return i915_bo_create_for_modifier(bo, width, height, format, modifier); +} + static void i915_close(struct driver *drv) { free(drv->priv); @@ -410,7 +452,7 @@ static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data) ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling); if (ret) { drv_gem_bo_destroy(bo); - fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_GET_TILING failed."); + drv_log("DRM_IOCTL_I915_GEM_GET_TILING failed.\n"); return ret; } @@ -418,19 +460,16 @@ static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data) return 0; } -static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane, int prot) +static void *i915_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags) { int ret; void *addr; - struct drm_i915_gem_set_domain set_domain; - memset(&set_domain, 0, sizeof(set_domain)); - set_domain.handle = bo->handles[0].u32; if (bo->tiling == I915_TILING_NONE) { struct drm_i915_gem_mmap gem_map; memset(&gem_map, 0, sizeof(gem_map)); - if ((bo->flags & BO_USE_SCANOUT) && !(bo->flags & BO_USE_RENDERSCRIPT)) + if ((bo->use_flags & BO_USE_SCANOUT) && !(bo->use_flags & BO_USE_RENDERSCRIPT)) gem_map.flags = I915_MMAP_WC; gem_map.handle = bo->handles[0].u32; @@ -439,14 +478,11 @@ static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane, int ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map); if (ret) { - fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP failed\n"); + drv_log("DRM_IOCTL_I915_GEM_MMAP failed\n"); return MAP_FAILED; } addr = (void *)(uintptr_t)gem_map.addr_ptr; - set_domain.read_domains = I915_GEM_DOMAIN_CPU; - set_domain.write_domain = I915_GEM_DOMAIN_CPU; - } else { struct drm_i915_gem_mmap_gtt gem_map; memset(&gem_map, 0, sizeof(gem_map)); @@ -455,67 +491,94 @@ static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane, int ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map); if (ret) { - fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP_GTT failed\n"); + drv_log("DRM_IOCTL_I915_GEM_MMAP_GTT failed\n"); return MAP_FAILED; } - addr = mmap(0, bo->total_size, prot, MAP_SHARED, bo->drv->fd, gem_map.offset); - set_domain.read_domains = I915_GEM_DOMAIN_GTT; - set_domain.write_domain = I915_GEM_DOMAIN_GTT; + addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd, + gem_map.offset); } if (addr == MAP_FAILED) { - fprintf(stderr, "drv: i915 GEM mmap failed\n"); + drv_log("i915 GEM mmap failed\n"); return addr; } + vma->length = bo->total_size; + return addr; +} + +static int i915_bo_invalidate(struct bo *bo, struct mapping *mapping) +{ + int ret; + struct drm_i915_gem_set_domain set_domain; + + memset(&set_domain, 0, sizeof(set_domain)); + set_domain.handle = bo->handles[0].u32; + if (bo->tiling == I915_TILING_NONE) { + set_domain.read_domains = I915_GEM_DOMAIN_CPU; + if (mapping->vma->map_flags & BO_MAP_WRITE) + set_domain.write_domain = I915_GEM_DOMAIN_CPU; + } else { + set_domain.read_domains = I915_GEM_DOMAIN_GTT; + if (mapping->vma->map_flags & BO_MAP_WRITE) + set_domain.write_domain = I915_GEM_DOMAIN_GTT; + } + ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain); if (ret) { - fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_DOMAIN failed\n"); - return MAP_FAILED; + drv_log("DRM_IOCTL_I915_GEM_SET_DOMAIN with %d\n", ret); + return ret; } - data->length = bo->total_size; - return addr; + return 0; } -static int i915_bo_flush(struct bo *bo, struct map_info *data) +static int i915_bo_flush(struct bo *bo, struct mapping *mapping) { struct i915_device *i915 = bo->drv->priv; if (!i915->has_llc && bo->tiling == I915_TILING_NONE) - i915_clflush(data->addr, data->length); + i915_clflush(mapping->vma->addr, mapping->vma->length); return 0; } -static uint32_t i915_resolve_format(uint32_t format, uint64_t usage) +static uint32_t i915_resolve_format(uint32_t format, uint64_t use_flags) { switch (format) { case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED: /* KBL camera subsystem requires NV12. */ - if (usage & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE)) + if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE)) return DRM_FORMAT_NV12; /*HACK: See b/28671744 */ return DRM_FORMAT_XBGR8888; case DRM_FORMAT_FLEX_YCbCr_420_888: - /* KBL camera subsystem requires NV12. */ - if (usage & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE)) - return DRM_FORMAT_NV12; - return DRM_FORMAT_YVU420; + /* + * KBL camera subsystem requires NV12. Our other use cases + * don't care: + * - Hardware video supports NV12, + * - USB Camera HALv3 supports NV12, + * - USB Camera HALv1 doesn't use this format. + * Moreover, NV12 is preferred for video, due to overlay + * support on SKL+. + */ + return DRM_FORMAT_NV12; default: return format; } } -struct backend backend_i915 = { +const struct backend backend_i915 = { .name = "i915", .init = i915_init, .close = i915_close, .bo_create = i915_bo_create, + .bo_create_with_modifiers = i915_bo_create_with_modifiers, .bo_destroy = drv_gem_bo_destroy, .bo_import = i915_bo_import, .bo_map = i915_bo_map, .bo_unmap = drv_bo_munmap, + .bo_invalidate = i915_bo_invalidate, .bo_flush = i915_bo_flush, .resolve_format = i915_resolve_format, };