X-Git-Url: http://git.osdn.net/view?a=blobdiff_plain;f=i915.c;h=8f2c6db26001b573b4c7645f51dbee1cc1f7097e;hb=02cc8544bd4b8f58356e703b8729e4ca638c5efe;hp=2f99ce5f8294d34f362acc2a0d71b30701587c0e;hpb=7ec0788f7ec6305a893afad71a337c3c62be9d3b;p=android-x86%2Fexternal-minigbm.git diff --git a/i915.c b/i915.c index 2f99ce5..8f2c6db 100644 --- a/i915.c +++ b/i915.c @@ -16,24 +16,28 @@ #include "drv_priv.h" #include "helpers.h" #include "util.h" +#include "i915_private.h" #define I915_CACHELINE_SIZE 64 #define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1) -static const uint32_t render_target_formats[] = { DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR8888, +static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB1555, DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565, - DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555, + DRM_FORMAT_XBGR2101010, DRM_FORMAT_XBGR8888, + DRM_FORMAT_XRGB1555, DRM_FORMAT_XRGB2101010, DRM_FORMAT_XRGB8888 }; static const uint32_t tileable_texture_source_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_NV12, DRM_FORMAT_R8, DRM_FORMAT_UYVY, - DRM_FORMAT_YUYV }; + DRM_FORMAT_YUYV, DRM_FORMAT_YVYU, DRM_FORMAT_VYUY }; static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID }; struct i915_device { uint32_t gen; int32_t has_llc; + uint64_t cursor_width; + uint64_t cursor_height; }; static uint32_t i915_get_gen(int device_id) @@ -57,12 +61,12 @@ static int i915_add_kms_item(struct driver *drv, const struct kms_item *item) * Older hardware can't scanout Y-tiled formats. Newer devices can, and * report this functionality via format modifiers. */ - for (i = 0; i < drv->backend->combos.size; i++) { - combo = &drv->backend->combos.data[i]; + for (i = 0; i < drv->combos.size; i++) { + combo = &drv->combos.data[i]; if (combo->format != item->format) continue; - if (item->modifier == DRM_FORMAT_MOD_NONE && + if (item->modifier == DRM_FORMAT_MOD_INVALID && combo->metadata.tiling == I915_TILING_X) { /* * FIXME: drv_query_kms() does not report the available modifiers @@ -70,11 +74,11 @@ static int i915_add_kms_item(struct driver *drv, const struct kms_item *item) * buffers, so let's add this to our combinations, except for * cursor, which must not be tiled. */ - combo->usage |= item->usage & ~BO_USE_CURSOR; + combo->use_flags |= item->use_flags & ~BO_USE_CURSOR; } if (combo->metadata.modifier == item->modifier) - combo->usage |= item->usage; + combo->use_flags |= item->use_flags; } return 0; @@ -86,54 +90,66 @@ static int i915_add_combinations(struct driver *drv) uint32_t i, num_items; struct kms_item *items; struct format_metadata metadata; - uint64_t render_flags, texture_flags; + uint64_t render_use_flags, texture_use_flags; - render_flags = BO_USE_RENDER_MASK; - texture_flags = BO_USE_TEXTURE_MASK; + render_use_flags = BO_USE_RENDER_MASK; + texture_use_flags = BO_USE_TEXTURE_MASK; metadata.tiling = I915_TILING_NONE; metadata.priority = 1; - metadata.modifier = DRM_FORMAT_MOD_NONE; + metadata.modifier = DRM_FORMAT_MOD_LINEAR; ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats), - &metadata, render_flags); + &metadata, render_use_flags); if (ret) return ret; ret = drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats), - &metadata, texture_flags); + &metadata, texture_use_flags); if (ret) return ret; ret = drv_add_combinations(drv, tileable_texture_source_formats, ARRAY_SIZE(tileable_texture_source_formats), &metadata, - texture_flags); + texture_use_flags); if (ret) return ret; drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT); drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT); - render_flags &= ~BO_USE_SW_WRITE_OFTEN; - render_flags &= ~BO_USE_SW_READ_OFTEN; - render_flags &= ~BO_USE_LINEAR; + /* IPU3 camera ISP supports only NV12 output. */ + drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata, + BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE); + /* + * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots + * from camera. + */ + drv_modify_combination(drv, DRM_FORMAT_R8, &metadata, + BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE); + + render_use_flags &= ~BO_USE_RENDERSCRIPT; + render_use_flags &= ~BO_USE_SW_WRITE_OFTEN; + render_use_flags &= ~BO_USE_SW_READ_OFTEN; + render_use_flags &= ~BO_USE_LINEAR; - texture_flags &= ~BO_USE_SW_WRITE_OFTEN; - texture_flags &= ~BO_USE_SW_READ_OFTEN; - texture_flags &= ~BO_USE_LINEAR; + texture_use_flags &= ~BO_USE_RENDERSCRIPT; + texture_use_flags &= ~BO_USE_SW_WRITE_OFTEN; + texture_use_flags &= ~BO_USE_SW_READ_OFTEN; + texture_use_flags &= ~BO_USE_LINEAR; metadata.tiling = I915_TILING_X; metadata.priority = 2; metadata.modifier = I915_FORMAT_MOD_X_TILED; ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats), - &metadata, render_flags); + &metadata, render_use_flags); if (ret) return ret; ret = drv_add_combinations(drv, tileable_texture_source_formats, ARRAY_SIZE(tileable_texture_source_formats), &metadata, - texture_flags); + texture_use_flags); if (ret) return ret; @@ -142,16 +158,18 @@ static int i915_add_combinations(struct driver *drv) metadata.modifier = I915_FORMAT_MOD_Y_TILED; ret = drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats), - &metadata, render_flags); + &metadata, render_use_flags); if (ret) return ret; ret = drv_add_combinations(drv, tileable_texture_source_formats, ARRAY_SIZE(tileable_texture_source_formats), &metadata, - texture_flags); + texture_use_flags); if (ret) return ret; + i915_private_add_combinations(drv); + items = drv_query_kms(drv, &num_items); if (!items || !num_items) return 0; @@ -191,12 +209,29 @@ static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *strid horizontal_alignment = 512; vertical_alignment = 8; } else { - horizontal_alignment = 128; - vertical_alignment = 32; + horizontal_alignment = 128; + vertical_alignment = 32; } break; } + /* + * The alignment calculated above is based on the full size luma plane and to have chroma + * planes properly aligned with subsampled formats, we need to multiply luma alignment by + * subsampling factor. + */ + switch (bo->format) { + case DRM_FORMAT_YVU420_ANDROID: + case DRM_FORMAT_YVU420: + horizontal_alignment *= 2; + /* Fall through */ + case DRM_FORMAT_NV12: + vertical_alignment *= 2; + break; + } + + i915_private_align_dimensions(bo->format, &vertical_alignment); + *aligned_height = ALIGN(bo->height, vertical_alignment); if (i915->gen > 3) { *stride = ALIGN(*stride, horizontal_alignment); @@ -260,45 +295,92 @@ static int i915_init(struct driver *drv) drv->priv = i915; + i915_private_init(drv, &i915->cursor_width, &i915->cursor_height); + return i915_add_combinations(drv); } -static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format, - uint32_t flags) +static int i915_bo_create_for_modifier(struct bo *bo, uint32_t width, uint32_t height, + uint32_t format, uint64_t modifier) { int ret; size_t plane; uint32_t stride; struct drm_i915_gem_create gem_create; struct drm_i915_gem_set_tiling gem_set_tiling; - struct combination *combo; + struct i915_device *i915_dev = (struct i915_device *)bo->drv->priv; - combo = drv_get_combination(bo->drv, format, flags); - if (!combo) - return -EINVAL; - - bo->tiling = combo->metadata.tiling; + switch (modifier) { + case DRM_FORMAT_MOD_LINEAR: + bo->tiling = I915_TILING_NONE; + break; + case I915_FORMAT_MOD_X_TILED: + bo->tiling = I915_TILING_X; + break; + case I915_FORMAT_MOD_Y_TILED: + bo->tiling = I915_TILING_Y; + break; + } stride = drv_stride_from_format(format, width, 0); - ret = i915_align_dimensions(bo, bo->tiling, &stride, &height); - if (ret) - return ret; + /* + * Align cursor width and height to values expected by Intel + * HW. + */ + if (bo->use_flags & BO_USE_CURSOR) { + width = ALIGN(width, i915_dev->cursor_width); + height = ALIGN(height, i915_dev->cursor_height); + stride = drv_stride_from_format(format, width, 0); + } else { + ret = i915_align_dimensions(bo, bo->tiling, &stride, &height); + if (ret) + return ret; + } /* - * Align the Y plane to 128 bytes so the chroma planes would be aligned - * to 64 byte boundaries. This is an Intel HW requirement. + * HAL_PIXEL_FORMAT_YV12 requires the buffer height not be aligned, but we need to keep + * total size as with aligned height to ensure enough padding space after each plane to + * satisfy GPU alignment requirements. + * + * We do it by first calling drv_bo_from_format() with aligned height and + * DRM_FORMAT_YVU420, which allows height alignment, saving the total size it calculates + * and then calling it again with requested parameters. + * + * This relies on the fact that i965 driver uses separate surfaces for each plane and + * contents of padding bytes is not affected, as it is only used to satisfy GPU cache + * requests. + * + * This is enforced by Mesa in src/intel/isl/isl_gen8.c, inside + * isl_gen8_choose_image_alignment_el(), which is used for GEN9 and GEN8. */ - if (format == DRM_FORMAT_YVU420) - stride = ALIGN(stride, 128); + if (format == DRM_FORMAT_YVU420_ANDROID) { + uint32_t unaligned_height = bo->height; + size_t total_size; + + drv_bo_from_format(bo, stride, height, DRM_FORMAT_YVU420); + total_size = bo->total_size; + drv_bo_from_format(bo, stride, unaligned_height, format); + bo->total_size = total_size; + } else { + drv_bo_from_format(bo, stride, height, format); + } /* - * HAL_PIXEL_FORMAT_YV12 requires that the buffer's height not be aligned. + * Quoting Mesa ISL library: + * + * - For linear surfaces, additional padding of 64 bytes is required at + * the bottom of the surface. This is in addition to the padding + * required above. */ - if (format == DRM_FORMAT_YVU420_ANDROID) - height = bo->height; + if (bo->tiling == I915_TILING_NONE) + bo->total_size += 64; - drv_bo_from_format(bo, stride, height, format); + /* + * Ensure we pass aligned width/height. + */ + bo->width = width; + bo->height = height; memset(&gem_create, 0, sizeof(gem_create)); gem_create.size = bo->total_size; @@ -332,6 +414,33 @@ static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32 return 0; } +static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format, + uint64_t use_flags) +{ + struct combination *combo; + + combo = drv_get_combination(bo->drv, format, use_flags); + if (!combo) + return -EINVAL; + + return i915_bo_create_for_modifier(bo, width, height, format, combo->metadata.modifier); +} + +static int i915_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height, + uint32_t format, const uint64_t *modifiers, uint32_t count) +{ + static const uint64_t modifier_order[] = { + I915_FORMAT_MOD_Y_TILED, I915_FORMAT_MOD_X_TILED, DRM_FORMAT_MOD_LINEAR, + }; + uint64_t modifier; + + modifier = drv_pick_modifier(modifiers, count, modifier_order, ARRAY_SIZE(modifier_order)); + + bo->format_modifiers[0] = modifier; + + return i915_bo_create_for_modifier(bo, width, height, format, modifier); +} + static void i915_close(struct driver *drv) { free(drv->priv); @@ -362,18 +471,18 @@ static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data) return 0; } -static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane) +static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane, uint32_t map_flags) { int ret; void *addr; - struct drm_i915_gem_set_domain set_domain; - memset(&set_domain, 0, sizeof(set_domain)); - set_domain.handle = bo->handles[0].u32; if (bo->tiling == I915_TILING_NONE) { struct drm_i915_gem_mmap gem_map; memset(&gem_map, 0, sizeof(gem_map)); + if ((bo->use_flags & BO_USE_SCANOUT) && !(bo->use_flags & BO_USE_RENDERSCRIPT)) + gem_map.flags = I915_MMAP_WC; + gem_map.handle = bo->handles[0].u32; gem_map.offset = 0; gem_map.size = bo->total_size; @@ -385,9 +494,6 @@ static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane) } addr = (void *)(uintptr_t)gem_map.addr_ptr; - set_domain.read_domains = I915_GEM_DOMAIN_CPU; - set_domain.write_domain = I915_GEM_DOMAIN_CPU; - } else { struct drm_i915_gem_mmap_gtt gem_map; memset(&gem_map, 0, sizeof(gem_map)); @@ -400,11 +506,8 @@ static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane) return MAP_FAILED; } - addr = mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED, bo->drv->fd, + addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd, gem_map.offset); - - set_domain.read_domains = I915_GEM_DOMAIN_GTT; - set_domain.write_domain = I915_GEM_DOMAIN_GTT; } if (addr == MAP_FAILED) { @@ -412,32 +515,63 @@ static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane) return addr; } + data->length = bo->total_size; + return addr; +} + +static int i915_bo_invalidate(struct bo *bo, struct map_info *data) +{ + int ret; + struct drm_i915_gem_set_domain set_domain; + + memset(&set_domain, 0, sizeof(set_domain)); + set_domain.handle = bo->handles[0].u32; + if (bo->tiling == I915_TILING_NONE) { + set_domain.read_domains = I915_GEM_DOMAIN_CPU; + if (data->map_flags & BO_MAP_WRITE) + set_domain.write_domain = I915_GEM_DOMAIN_CPU; + } else { + set_domain.read_domains = I915_GEM_DOMAIN_GTT; + if (data->map_flags & BO_MAP_WRITE) + set_domain.write_domain = I915_GEM_DOMAIN_GTT; + } + ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain); if (ret) { - fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_DOMAIN failed\n"); - return MAP_FAILED; + fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_DOMAIN with %d\n", ret); + return ret; } - data->length = bo->total_size; - return addr; + return 0; } -static int i915_bo_unmap(struct bo *bo, struct map_info *data) +static int i915_bo_flush(struct bo *bo, struct map_info *data) { struct i915_device *i915 = bo->drv->priv; if (!i915->has_llc && bo->tiling == I915_TILING_NONE) i915_clflush(data->addr, data->length); - return munmap(data->addr, data->length); + return 0; } -static uint32_t i915_resolve_format(uint32_t format, uint64_t usage) +static uint32_t i915_resolve_format(uint32_t format, uint64_t use_flags) { + uint32_t resolved_format; + if (i915_private_resolve_format(format, use_flags, &resolved_format)) { + return resolved_format; + } + switch (format) { case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED: + /* KBL camera subsystem requires NV12. */ + if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE)) + return DRM_FORMAT_NV12; /*HACK: See b/28671744 */ return DRM_FORMAT_XBGR8888; case DRM_FORMAT_FLEX_YCbCr_420_888: + /* KBL camera subsystem requires NV12. */ + if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE)) + return DRM_FORMAT_NV12; return DRM_FORMAT_YVU420; default: return format; @@ -449,10 +583,13 @@ struct backend backend_i915 = { .init = i915_init, .close = i915_close, .bo_create = i915_bo_create, + .bo_create_with_modifiers = i915_bo_create_with_modifiers, .bo_destroy = drv_gem_bo_destroy, .bo_import = i915_bo_import, .bo_map = i915_bo_map, - .bo_unmap = i915_bo_unmap, + .bo_unmap = drv_bo_munmap, + .bo_invalidate = i915_bo_invalidate, + .bo_flush = i915_bo_flush, .resolve_format = i915_resolve_format, };