X-Git-Url: http://git.osdn.net/view?a=blobdiff_plain;f=rockchip.c;h=960440fca8d47205cf275e9071065097003b867b;hb=310cf97a929fced825454e03e0a9390a204dc2d8;hp=140ec935249117a315929a96984c4f779c955356;hpb=6ea14bad3f31e449aa5d01c6b625c6dfe087144b;p=android-x86%2Fexternal-minigbm.git diff --git a/rockchip.c b/rockchip.c index 140ec93..960440f 100644 --- a/rockchip.c +++ b/rockchip.c @@ -7,47 +7,30 @@ #ifdef DRV_ROCKCHIP #include +#include +#include #include #include #include #include -#include #include "drv_priv.h" #include "helpers.h" #include "util.h" -static struct supported_combination combos[12] = { - {DRM_FORMAT_ABGR8888, DRM_FORMAT_MOD_NONE, - BO_USE_RENDERING | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN | - BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY}, - {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE, - BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN}, - {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE, - BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY}, - {DRM_FORMAT_NV12, DRM_FORMAT_MOD_NONE, - BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY}, - {DRM_FORMAT_NV12, DRM_FORMAT_MOD_NONE, - BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN}, - {DRM_FORMAT_RGB565, DRM_FORMAT_MOD_NONE, - BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY}, - {DRM_FORMAT_XBGR8888, DRM_FORMAT_MOD_NONE, - BO_USE_RENDERING | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN | - BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY}, - {DRM_FORMAT_XBGR8888, DRM_FORMAT_MOD_NONE, - BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN}, - {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE, - BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN}, - {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE, - BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY}, - {DRM_FORMAT_YVU420, DRM_FORMAT_MOD_NONE, - BO_USE_RENDERING | BO_USE_SW_READ_RARELY | BO_USE_SW_WRITE_RARELY}, - {DRM_FORMAT_YVU420, DRM_FORMAT_MOD_NONE, - BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN}, +struct rockchip_private_map_data { + void *cached_addr; + void *gem_addr; }; -static int afbc_bo_from_format(struct bo *bo, uint32_t width, uint32_t height, - uint32_t format) +static const uint32_t scanout_render_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888, + DRM_FORMAT_BGR888, DRM_FORMAT_RGB565, + DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB8888 }; + +static const uint32_t texture_only_formats[] = { DRM_FORMAT_NV12, DRM_FORMAT_YVU420, + DRM_FORMAT_YVU420_ANDROID }; + +static int afbc_bo_from_format(struct bo *bo, uint32_t width, uint32_t height, uint32_t format) { /* We've restricted ourselves to four bytes per pixel. */ const uint32_t pixel_size = 4; @@ -77,43 +60,55 @@ static int afbc_bo_from_format(struct bo *bo, uint32_t width, uint32_t height, * alignement for the body plane. */ const uint32_t body_plane_alignment = 1024; - const uint32_t body_plane_offset = - ALIGN(header_plane_size, body_plane_alignment); - const uint32_t total_size = - body_plane_offset + body_plane_size; + const uint32_t body_plane_offset = ALIGN(header_plane_size, body_plane_alignment); + const uint32_t total_size = body_plane_offset + body_plane_size; - bo->strides[0] = width_in_blocks * block_width * pixel_size; - bo->sizes[0] = total_size; - bo->offsets[0] = 0; + bo->meta.strides[0] = width_in_blocks * block_width * pixel_size; + bo->meta.sizes[0] = total_size; + bo->meta.offsets[0] = 0; - bo->total_size = total_size; + bo->meta.total_size = total_size; - bo->format_modifiers[0] = DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC; + bo->meta.format_modifiers[0] = DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC; return 0; } static int rockchip_init(struct driver *drv) { - drv_insert_combinations(drv, combos, ARRAY_SIZE(combos)); - return drv_add_kms_flags(drv); -} + struct format_metadata metadata; + + metadata.tiling = 0; + metadata.priority = 1; + metadata.modifier = DRM_FORMAT_MOD_LINEAR; + + drv_add_combinations(drv, scanout_render_formats, ARRAY_SIZE(scanout_render_formats), + &metadata, BO_USE_RENDER_MASK | BO_USE_SCANOUT); + + drv_add_combinations(drv, texture_only_formats, ARRAY_SIZE(texture_only_formats), &metadata, + BO_USE_TEXTURE_MASK); + + /* NV12 format for camera, display, decoding and encoding. */ + /* Camera ISP supports only NV12 output. */ + drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata, + BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SCANOUT | + BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER); + + drv_modify_linear_combinations(drv); + /* + * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots + * from camera and input/output from hardware decoder/encoder. + */ + drv_add_combination(drv, DRM_FORMAT_R8, &metadata, + BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SW_MASK | + BO_USE_LINEAR | BO_USE_PROTECTED | BO_USE_HW_VIDEO_DECODER | + BO_USE_HW_VIDEO_ENCODER); -static bool has_modifier(const uint64_t *list, uint32_t count, uint64_t modifier) -{ - uint32_t i; - - for (i = 0; i < count; i++) - if (list[i] == modifier) - return true; - - return false; + return 0; } -static int rockchip_bo_create_with_modifiers(struct bo *bo, - uint32_t width, uint32_t height, - uint32_t format, - const uint64_t *modifiers, +static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height, + uint32_t format, const uint64_t *modifiers, uint32_t count) { int ret; @@ -121,95 +116,146 @@ static int rockchip_bo_create_with_modifiers(struct bo *bo, struct drm_rockchip_gem_create gem_create; if (format == DRM_FORMAT_NV12) { - uint32_t w_mbs = DIV_ROUND_UP(ALIGN(width, 16), 16); - uint32_t h_mbs = DIV_ROUND_UP(ALIGN(height, 16), 16); + uint32_t w_mbs = DIV_ROUND_UP(width, 16); + uint32_t h_mbs = DIV_ROUND_UP(height, 16); uint32_t aligned_width = w_mbs * 16; - uint32_t aligned_height = DIV_ROUND_UP(h_mbs * 16 * 3, 2); + uint32_t aligned_height = h_mbs * 16; - drv_bo_from_format(bo, aligned_width, height, format); - bo->total_size = bo->strides[0] * aligned_height - + w_mbs * h_mbs * 128; + drv_bo_from_format(bo, aligned_width, aligned_height, format); + /* + * drv_bo_from_format updates total_size. Add an extra data space for rockchip video + * driver to store motion vectors. + */ + bo->meta.total_size += w_mbs * h_mbs * 128; } else if (width <= 2560 && - has_modifier(modifiers, count, - DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)) { + drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)) { /* If the caller has decided they can use AFBC, always * pick that */ afbc_bo_from_format(bo, width, height, format); } else { - if (!has_modifier(modifiers, count, DRM_FORMAT_MOD_NONE)) { + if (!drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_LINEAR)) { errno = EINVAL; - fprintf(stderr, "no usable modifier found\n"); + drv_log("no usable modifier found\n"); return -1; } + uint32_t stride; /* * Since the ARM L1 cache line size is 64 bytes, align to that - * as a performance optimization. + * as a performance optimization. For YV12, the Mali cmem allocator + * requires that chroma planes are aligned to 64-bytes, so align the + * luma plane to 128 bytes. */ - uint32_t bytes_per_pixel = drv_stride_from_format(format, 1, 0); - width = ALIGN(width, DIV_ROUND_UP(64, bytes_per_pixel)); - drv_bo_from_format(bo, width, height, format); + stride = drv_stride_from_format(format, width, 0); + if (format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID) + stride = ALIGN(stride, 128); + else + stride = ALIGN(stride, 64); + + drv_bo_from_format(bo, stride, height, format); } memset(&gem_create, 0, sizeof(gem_create)); - gem_create.size = bo->total_size; + gem_create.size = bo->meta.total_size; - ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_CREATE, - &gem_create); + ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_CREATE, &gem_create); if (ret) { - fprintf(stderr, "drv: DRM_IOCTL_ROCKCHIP_GEM_CREATE failed " - "(size=%llu)\n", gem_create.size); - return ret; + drv_log("DRM_IOCTL_ROCKCHIP_GEM_CREATE failed (size=%" PRIu64 ")\n", + gem_create.size); + return -errno; } - for (plane = 0; plane < bo->num_planes; plane++) + for (plane = 0; plane < bo->meta.num_planes; plane++) bo->handles[plane].u32 = gem_create.handle; return 0; } -static int rockchip_bo_create(struct bo *bo, uint32_t width, uint32_t height, - uint32_t format, uint32_t flags) +static int rockchip_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format, + uint64_t use_flags) { - uint64_t modifiers[] = { DRM_FORMAT_MOD_NONE }; - - return rockchip_bo_create_with_modifiers(bo, width, height, format, - modifiers, ARRAY_SIZE(modifiers)); + uint64_t modifiers[] = { DRM_FORMAT_MOD_LINEAR }; + return rockchip_bo_create_with_modifiers(bo, width, height, format, modifiers, + ARRAY_SIZE(modifiers)); } -static void *rockchip_bo_map(struct bo *bo, struct map_info *data, size_t plane) +static void *rockchip_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags) { int ret; struct drm_rockchip_gem_map_off gem_map; + struct rockchip_private_map_data *priv; /* We can only map buffers created with SW access flags, which should * have no modifiers (ie, not AFBC). */ - if (bo->format_modifiers[0] == DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC) + if (bo->meta.format_modifiers[0] == DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC) return MAP_FAILED; memset(&gem_map, 0, sizeof(gem_map)); gem_map.handle = bo->handles[0].u32; - ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET, - &gem_map); + ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET, &gem_map); if (ret) { - fprintf(stderr, - "drv: DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET failed\n"); + drv_log("DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET failed\n"); return MAP_FAILED; } - data->length = bo->total_size; + void *addr = mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd, + gem_map.offset); - return mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED, - bo->drv->fd, gem_map.offset); + vma->length = bo->meta.total_size; + + if (bo->meta.use_flags & BO_USE_RENDERSCRIPT) { + priv = calloc(1, sizeof(*priv)); + priv->cached_addr = calloc(1, bo->meta.total_size); + priv->gem_addr = addr; + vma->priv = priv; + addr = priv->cached_addr; + } + + return addr; } -static uint32_t rockchip_resolve_format(uint32_t format) +static int rockchip_bo_unmap(struct bo *bo, struct vma *vma) +{ + if (vma->priv) { + struct rockchip_private_map_data *priv = vma->priv; + vma->addr = priv->gem_addr; + free(priv->cached_addr); + free(priv); + vma->priv = NULL; + } + + return munmap(vma->addr, vma->length); +} + +static int rockchip_bo_invalidate(struct bo *bo, struct mapping *mapping) +{ + if (mapping->vma->priv) { + struct rockchip_private_map_data *priv = mapping->vma->priv; + memcpy(priv->cached_addr, priv->gem_addr, bo->meta.total_size); + } + + return 0; +} + +static int rockchip_bo_flush(struct bo *bo, struct mapping *mapping) +{ + struct rockchip_private_map_data *priv = mapping->vma->priv; + if (priv && (mapping->vma->map_flags & BO_MAP_WRITE)) + memcpy(priv->gem_addr, priv->cached_addr, bo->meta.total_size); + + return 0; +} + +static uint32_t rockchip_resolve_format(struct driver *drv, uint32_t format, uint64_t use_flags) { switch (format) { case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED: + /* Camera subsystem requires NV12. */ + if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE)) + return DRM_FORMAT_NV12; /*HACK: See b/28671744 */ return DRM_FORMAT_XBGR8888; case DRM_FORMAT_FLEX_YCbCr_420_888: @@ -219,8 +265,7 @@ static uint32_t rockchip_resolve_format(uint32_t format) } } -struct backend backend_rockchip = -{ +const struct backend backend_rockchip = { .name = "rockchip", .init = rockchip_init, .bo_create = rockchip_bo_create, @@ -228,6 +273,9 @@ struct backend backend_rockchip = .bo_destroy = drv_gem_bo_destroy, .bo_import = drv_prime_bo_import, .bo_map = rockchip_bo_map, + .bo_unmap = rockchip_bo_unmap, + .bo_invalidate = rockchip_bo_invalidate, + .bo_flush = rockchip_bo_flush, .resolve_format = rockchip_resolve_format, };