X-Git-Url: http://git.osdn.net/view?a=blobdiff_plain;f=source%2Fsrc%2Fvm%2Ffm7%2Ffm7_mainmem.cpp;h=38524752366a5698d85757d755439538724e85aa;hb=9657068762e0ebc1ed5a42638db31cdcdda7c9db;hp=903796a96fb8c680e5f0f26a4d360c5b2c8eb583;hpb=823a382ebf6b519e316fb5a3abc0b689098f8d07;p=csp-qt%2Fcommon_source_project-fm7.git

diff --git a/source/src/vm/fm7/fm7_mainmem.cpp b/source/src/vm/fm7/fm7_mainmem.cpp
index 903796a96..385247523 100644
--- a/source/src/vm/fm7/fm7_mainmem.cpp
+++ b/source/src/vm/fm7/fm7_mainmem.cpp
@@ -1,454 +1,476 @@
 /*
- * Main memory without MMR for FM-7 [FM7_MAINMEM]
+ * Main memory MMR for FM-7 [FM7_MAINMEM]
  *  Author: K.Ohta
  *  Date  : 2015.01.01-
+ *  License: GPLv2
  *
  */
-
+#include "vm.h"
+#include "emu.h"
 #include "fm7_mainmem.h"
+#include "fm7_mainio.h"
+#include "fm7_display.h"
+#if defined(CAPABLE_DICTROM)
+#include "kanjirom.h"
+#endif
+
+namespace FM7 {
+
+FM7_MAINMEM::FM7_MAINMEM(VM_TEMPLATE* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
+{
+#if !defined(_FM77AV_VARIANTS)
+	for(int i = 0; i < 8; i++) fm7_bootroms[i] = (uint8_t *)malloc(0x200);
+#endif
+	mainio = NULL;
+	display = NULL;
+	maincpu = NULL;
+#if defined(CAPABLE_DICTROM)
+	kanjiclass1 = NULL;
+#endif	
+#if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)  || \
+    defined(_FM77_VARIANTS)
+	fm7_mainmem_extram = NULL;
+#endif
+	cpu_clocks = CPU_CLOCKS;
+	// Initialize table
+	set_device_name(_T("MAIN MEMORY"));
+}
 
+FM7_MAINMEM::~FM7_MAINMEM()
+{
+#if !defined(_FM77AV_VARIANTS)
+	for(int i = 0; i < 8; i++) if(fm7_bootroms[i] != NULL) free(fm7_bootroms[i]);
+#endif
+}
 
 void FM7_MAINMEM::reset()
 {
    	waitfactor = 0;
 	waitcount = 0;
+	mem_waitfactor = 0;
+	mem_waitcount = 0;
 	ioaccess_wait = false;
-	sub_halted = false;
-	first_pass = true;
-	flag_debug = false;
-}
+	sub_halted = (display->read_signal(SIG_DISPLAY_HALT) == 0) ? false : true;
+	//sub_halted = false;
+	memset(fm7_mainmem_bootrom_vector, 0x00, 0x10); // Clear without vector
 
-void FM7_MAINMEM::wait()
-{
-	int waitfactor; // If MMR of TWR enabled, factor = 3.
-			    // If memory, factor = 2?
-	if(mainio->read_data8(FM7_MAINIO_CLOCKMODE) == FM7_MAINCLOCK_SLOW) return;
-#ifdef HAS_MMR
-	if(!ioaccess_wait) {
-		waitfactor = 2;
-		ioaccess_wait = true;
-	} else { // Not MMR, TWR or enabled FAST MMR mode
-		waitfactor = 3; // If(MMR or TWR) and NOT FAST MMR factor = 3, else factor = 2
-		if((mainio->read_data8(FM7_MAINIO_FASTMMR_ENABLED) != 0)) waitfactor = 2;
-		ioaccess_wait = false;
-	} 
-	if((mainio->read_data8(FM7_MAINIO_WINDOW_ENABLED) == 0) &&
-	   (mainio->read_data8(FM7_MAINIO_MMR_ENABLED) == 0)) waitfactor = 2;
+#if defined(_FM77AV_VARIANTS)
+	memset(fm7_bootram, 0x00, 0x1f0);
+	initiator_enabled = true;
+	boot_ram_write = true;
+#elif defined(_FM77_VARIANTS)
+	boot_ram_write = false;
+#endif
+#if defined(_FM77_VARIANTS) || defined(_FM8)
+	bootmode = config.boot_mode & 7;
 #else
-	waitfactor = 2;
-#endif	  
-	if(waitfactor <= 0) return;
-	waitcount++;
-	if(waitcount >= waitfactor) {
-		if(maincpu != NULL) maincpu->set_extra_clock(1);
-		waitcount = 0;
+	bootmode = config.boot_mode & 3;
+#endif
+#if defined(HAS_MMR)
+	if((config.dipswitch & FM7_DIPSW_EXTRAM) != 0) {
+		extram_connected = true;
+	} else {
+		extram_connected = false;
 	}
-}
-
-
-int FM7_MAINMEM::window_convert(uint32 addr, uint32 *realaddr)
-{
-	uint32 raddr = addr;
-#ifdef HAS_MMR
-	if((addr < 0x8000) && (addr >= 0x7c00) && (mainio->read_data8(FM7_MAINIO_WINDOW_ENABLED) != 0)) {
-	  //		addr &= 0x03ff;
-		raddr = ((mainio->read_data8(FM7_MAINIO_WINDOW_OFFSET) << 8) + addr) & 0xffff;
-		*realaddr = raddr;
-#ifdef _FM77AV_VARIANTS
-		//printf("TWR hit %04x -> %04x\n", addr, raddr);
-		return FM7_MAINMEM_AV_PAGE0; // 0x00000 - 0x0ffff
-#else // FM77(L4 or others)
-		*realaddr |= 0x20000;
-		return FM7_MAINMEM_EXTRAM; // 0x20000 - 0x2ffff
 #endif
+#if defined(_FM77AV_VARIANTS)
+	if(dictrom_connected) {
+		use_page2_extram = true;
+	} else {
+		use_page2_extram = ((config.dipswitch & FM7_DIPSW_EXTRAM_AV) != 0) ? true : false;
 	}
-	// Window not hit.
+#endif   
+#ifdef HAS_MMR
+	mmr_extend = false;
+	mmr_segment = 0;
+	window_offset = 0;
+	mmr_enabled = false;
+	mmr_fast = false;
+	window_enabled = false;
+	window_fast = false;
+	refresh_fast = false;
 #endif
-	return -1;
+	if((bootmode & 0x03) == 0) { // IF BASIC BOOT THEN ROM
+		basicrom_fd0f = true;
+	} else { // ELSE RAM
+		basicrom_fd0f = false;
+	}
+	clockmode = (config.cpu_type == 0) ? true : false;
+	is_basicrom = ((bootmode & 0x03) == 0) ? true : false;
+	setclock(clockmode ? 0 : 1);
+	init_data_table();
+	update_all_mmr_jumptable();
+	maincpu->reset();
 }
 
-int FM7_MAINMEM::mmr_convert(uint32 addr, uint32 *realaddr)
+
+void FM7_MAINMEM::setclock(int mode)
 {
-	uint32 raddr = 0;
-	uint32  mmr_segment;
-	uint32  mmr_bank;
-	
-#ifdef _FM77AV_VARIANTS   
-	if(mainio->read_data8(FM7_MAINIO_INITROM_ENABLED) != 0) {
-		if((addr >= 0x6000) && (addr < 0x8000)) {
-			*realaddr = addr - 0x6000;
-			return FM7_MAINMEM_INITROM;
+	uint32_t clock = MAINCLOCK_SLOW;
+	if(mode == 1) { // SLOW
+		clock = MAINCLOCK_SLOW; // Temporally
+#if defined(HAS_MMR)		
+		if(!mmr_fast && !window_fast) {
+			if(refresh_fast) {
+				if(mmr_enabled || window_enabled) {
+					clock = (uint32_t)((double)clock * 1.089);
+				} else {
+					clock = (uint32_t)((double)clock * 1.086);
+				}					
+			}
 		}
-		if(addr >= 0xfffe) {
-			*realaddr = addr - 0xe000;
-			return FM7_MAINMEM_INITROM;
+#endif		
+	} else {
+#if defined(HAS_MMR)
+#  if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)
+		// Thanks to Ryu Takegami, around DRAM refresh.
+		// DRAM refresh makes halting MAIN MPU per 13.02uS.
+		if(!mmr_fast && !window_fast) { // SLOW
+			if(refresh_fast) {
+				clock = MAINCLOCK_FAST_MMR - ((100000000 / 1302) * 1);  // Fast Refresh: 1wait
+			} else {
+				clock = MAINCLOCK_FAST_MMR - ((100000000 / 1302) * 3);  // Slow Refresh: 3Wait(!)
+			}				
+			if(mmr_enabled || window_enabled) {
+				clock = (uint32_t)((double)clock * 0.87);
+			}					
+		} else {
+			clock = MAINCLOCK_FAST_MMR;
+			//if(!(mmr_enabled) && !(window_enabled)) clock = MAINCLOCK_NORMAL;
 		}
-	}
-#endif	
-#ifdef HAS_MMR
-	//mmr_segment = mainio->read_data8(FM7_MAINIO_MMR_SEGMENT);
-	mmr_bank = mainio->read_data8(FM7_MAINIO_MMR_BANK + ((addr >> 12) & 0x000f));
-	// Out of EXTRAM : 77AV20/40.
-	
-#if !defined(_FM77AV_VARIANTS)
-	if(addr >= 0xfc00) return -1;
-	mmr_bank &= 0x3f;
+#  else
+		if(mmr_enabled || window_enabled) {
+			clock = MAINCLOCK_MMR;
+		} else {
+			clock = MAINCLOCK_NORMAL;
+		}
+#  endif
 #else
-	if(addr >= 0xfc00) return -1;
-	//	mmr_bank &= 0xff;
-	mmr_bank &= 0x3f;
-#endif
-	// Reallocated by MMR
-	raddr = addr & 0x0fff;
-	// Bank 3x : Standard memories.
-	if((mmr_bank < 0x3f) && (mmr_bank >= 0x30)) {
-		raddr = ((mmr_bank << 12) | raddr) & 0xffff;
-		return nonmmr_convert(raddr, realaddr);
+		clock = MAINCLOCK_NORMAL;
+#endif				
+	}
+	//mem_waitcount = 0;
+	uint32_t before_waitfactor = mem_waitfactor;
+	if(CPU_CLOCKS > clock) {
+		mem_waitfactor = (uint32_t)(65536.0 * ((1.0 - (double)clock / (double)CPU_CLOCKS)));
+		//out_debug_log(_T("CLOCK=%d WAIT FACTOR=%d"), clock, mem_waitfactor);
+	} else {
+		mem_waitfactor = 0;
+		//out_debug_log(_T("CLOCK=%d WAIT FACTOR=%d"), clock, mem_waitfactor);
 	}
-  
-#ifdef _FM77AV_VARIANTS
-	if(mmr_bank == 0x3f) {
-		if((raddr >= 0xd80) && (raddr <= 0xd97)) { // MMR AREA
-			*realaddr = 0;
-			return FM7_MAINMEM_NULL;
+	cpu_clocks = clock;
+	// Below is ugly hack cause of CPU#0 cannot modify clock.
+	if(before_waitfactor != mem_waitfactor) maincpu->write_signal(SIG_CPU_WAIT_FACTOR, mem_waitfactor, 0xffffffff);
+}
+		
+
+void FM7_MAINMEM::iowait()
+{
+	int _waitfactor = 0;
+	if(config.cpu_type == 1) return; // SLOW
+#ifdef HAS_MMR
+	if((window_enabled) || (mmr_enabled)) {
+		if(!ioaccess_wait) {
+			_waitfactor = 2;
+		} else { // Not MMR, TWR or enabled FAST MMR mode
+			_waitfactor = 3; // If(MMR or TWR) and NOT FAST MMR factor = 3, else factor = 2
+			if(mmr_fast) _waitfactor = 2;
 		}
+	} else {
+		_waitfactor = 2;
 	}
 #else
-	if((mmr_bank == 0x3f) && (addr >= 0xc00) && (addr < 0xe00)) {
-		if(mainio->read_data8(FM7_MAINIO_IS_BASICROM) != 0) { // BASICROM enabled
-			*realaddr = 0;
-			return FM7_MAINMEM_ZERO;
-		} else {
-			*realaddr = addr & 0x1ff;
-			return FM7_MAINMEM_SHADOWRAM;
-		}
-	}
-#endif
-	
-#ifdef _FM77AV_VARIANTS
-	if((mmr_bank & 0xf0) == 0x00) { // PAGE 0
-		*realaddr = ((mmr_bank << 12) | raddr) & 0xffff;
-		return FM7_MAINMEM_AV_PAGE0;
-	}
-	if((mmr_bank & 0xf0) == 0x10) { // PAGE 1
-		*realaddr = (mmr_bank << 12) | raddr;
-		return FM7_MAINMEM_AV_DIRECTACCESS;
+	_waitfactor = 2;
+#endif	  
+	if(_waitfactor <= 0) return;
+	waitcount++;
+	if(waitcount >= _waitfactor) {
+		maincpu->set_extra_clock(1);
+		waitcount = 0;
+		ioaccess_wait = !ioaccess_wait;
 	}
-	if((mmr_bank & 0xf0) == 0x20) { // PAGE 2
-#if 0
-	        uint32 dbank = mainio->read_data8(FM7_MAINIO_EXTBANK);
-		switch(mmr_bank) {
-	  		case 0x28:
-	  		case 0x29: // Backuped RAM
-				if(((dbank & 0x80) != 0) && (dictrom_connected)){ // Battery backuped RAM
-					raddr =  raddr & 0x1ff;
-					*realaddr = raddr;
-					return FM7_MAINMEM_BACKUPED_RAM;
-				}
-				break;
-			case 0x2e:
-				if(((dbank & 0x40) != 0) && (dictrom_connected)) { // Dictionary ROM
-					dbank = dbank & 0x3f;
-					uint32 extrom = mainio->read_data8(FM7_MAINIO_EXTROM) & 0x80;
-					if(extrom == 0) { // Dictionary selected.
-						dbank = dbank << 12;
-						*realaddr = raddr | dbank;
-						return FM7_MAINMEM_DICTROM;
-					} else if(dbank <= 0x1f) { // KANJI
-						*realaddr = (dbank << 12) | raddr;
-						return FM7_MAINMEM_KANJI_LEVEL1;
-					} else if(dbank <= 0x37) { 
-						dbank = dbank << 12;
-						*realaddr = (dbank - 0x20000) | raddr;
-						return FM7_MAINMEM_77AV40_EXTRAROM;
-					} else if(dbank <= 0x3f) {
-					  	raddr = ((dbank << 12) - 0x30000) | raddr;
-						if((raddr >= 0xffe0) || (raddr < 0xfd00)) { 
-							return nonmmr_convert(raddr, realaddr);
-						} else if((raddr >= 0xfe00) || (raddr < 0xffe0)) {
-							*realaddr = raddr - 0xfe00;
-							return FM7_MAINMEM_BOOTROM_DOS;
-						}
-						*realaddr = raddr + 0x10000;
-						return FM7_MAINMEM_77AV40_EXTRAROM;
-					}
-				}
-				break;
-		}
-		*realaddr = (raddr | (mmr_bank << 12)) & 0x0ffff;
-		return FM7_MAINMEM_AV_PAGE2;
-#else
-		*realaddr = (raddr | (mmr_bank << 12)) & 0x0ffff;
-		return FM7_MAINMEM_NULL;
+}
 
-#endif
-	  	// RAM
-	}
-# if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20)
-	if(extram_connected) { // PAGE 4-
-		if((mmr_bank >> 4) >= (extram_pages + 4)) {
-			*realaddr = 0;
-			return FM7_MAINMEM_NULL; // $FF
-		} else {
-			raddr = ((uint32)mmr_bank << 12) | raddr;
+
+
+int FM7_MAINMEM::check_extrom(uint32_t raddr, uint32_t *realaddr)
+{
+#if defined(_FM77AV40EX) || defined(_FM77AV40SX)
+	if(extrom_bank) { // Extra ROM selected.
+		uint32_t dbank = extcard_bank & 0x3f;
+		if(dbank < 0x20) { // KANJI
+			if((dbank == 0x07) || (dbank == 0x06)) {
+				// NOT KANJI AS IS.Thanks Ryu.
+				*realaddr = raddr & 0x01;
+				return FM7_MAINMEM_KANJI_DUMMYADDR;
+			}
+			*realaddr = (dbank << 12) | raddr;
+			return FM7_MAINMEM_KANJI_LEVEL1;
+		} else if(dbank < 0x2c) {
+			raddr = ((dbank << 12) - 0x20000) | raddr;
 			*realaddr = raddr;
-			return FM7_MAINMEM_EXTRAM;
-		}
-	} else {
-		if(mmr_bank >= 0x40) {
+			return FM7_MAINMEM_77AV40_EXTRAROM;
+		} else if(dbank < 0x30) {
 			*realaddr = 0;
 			return FM7_MAINMEM_NULL;
-		}
-	}
-#endif
-#else // 77
-	// page 0 or 1 or 2.
-	if(extram_connected) {
-		if((mmr_bank >> 4) >= extram_pages) {
+		} else {
+			raddr = ((dbank << 12) - 0x30000) | raddr;
+			if((raddr >= 0x8000)  && (raddr < 0xfc00)) {
+				*realaddr = raddr - 0x8000;
+				return FM7_MAINMEM_BASICROM;
+			} else if((raddr >= 0xfe00) && (raddr < 0xffe0)) {
+				*realaddr = raddr - 0xfe00;
+				return FM7_MAINMEM_BOOTROM_MMR;
+			} else if(raddr >= 0xfffe) {
+				*realaddr = raddr - 0xfffe;
+				return FM7_MAINMEM_RESET_VECTOR;
+			}
+			//*realaddr = raddr + 0x10000;
+			//return FM7_MAINMEM_77AV40_EXTRAROM;
 			*realaddr = 0;
 			return FM7_MAINMEM_NULL;
-		} else { // EXTRAM Exists.
-			raddr = (((uint32)mmr_bank << 12) & 0x3ffff) | raddr;
-			*realaddr = raddr;
-			return FM7_MAINMEM_EXTRAM;
 		}
 	}
-#endif
-#endif
+#endif	
 	return -1;
 }
 
-int FM7_MAINMEM::nonmmr_convert(uint32 addr, uint32 *realaddr)
-{
-	addr &= 0x0ffff;
-#ifdef _FM77AV_VARIANTS
-	if(mainio->read_data8(FM7_MAINIO_INITROM_ENABLED) != 0) {
-		if((addr >= 0x6000) && (addr < 0x8000)) {
-			*realaddr = addr - 0x6000;
-			return FM7_MAINMEM_INITROM;
-		}
-		if(addr >= 0xfffe) {
-		  // printf("HIT %02x\n", read_table[FM7_MAINMEM_INITROM].memory[addr - 0xe000]);
-			*realaddr = addr - 0xe000;
-			return FM7_MAINMEM_INITROM;
-		}
-	}
-#endif	
 
-	if(addr < 0x8000) {
-		*realaddr = addr;
- 		return FM7_MAINMEM_OMOTE;
-	} else if(addr < 0xfc00) {
-		*realaddr = addr - 0x8000;
-		if(mainio->read_data8(FM7_MAINIO_READ_FD0F) != 0) {
-			return FM7_MAINMEM_BASICROM;
-		}
-		return FM7_MAINMEM_URA;
-	} else 	if(addr < 0xfc80) {
-		*realaddr = addr - 0xfc00;
-		return FM7_MAINMEM_BIOSWORK;
-	}else if(addr < 0xfd00) {
-		*realaddr = addr - 0xfc80;
-		return FM7_MAINMEM_SHAREDRAM;
-	} else if(addr < 0xfe00) {
-		wait();
-		*realaddr = addr - 0xfd00;
-		return FM7_MAINMEM_MMIO;
-	}else if(addr < 0xffe0){
-		wait();
-		*realaddr = addr - 0xfe00;
-		switch(mainio->read_data8(FM7_MAINIO_BOOTMODE)) {
-			case 0:
-				return FM7_MAINMEM_BOOTROM_BAS;
-				break;
-			case 1:
-			  //printf("BOOT_DOS ADDR=%04x\n", addr);
-				return FM7_MAINMEM_BOOTROM_DOS;
-				break;
-			case 2:
-				return FM7_MAINMEM_BOOTROM_MMR;
-				break;
-			case 4:
-				return FM7_MAINMEM_BOOTROM_RAM;
-				break;
-			default:
-				return FM7_MAINMEM_BOOTROM_BAS; // Really?
-				break;
-		}
-	} else if(addr < 0xfffe) { // VECTOR
-		//printf("Main: VECTOR\n");
-		*realaddr = addr - 0xffe0;
-		return FM7_MAINMEM_VECTOR;
-	} else if(addr < 0x10000) {
-	  //if(mainio->read_data8(FM7_MAINIO_BOOTMODE) == 4) {
-	  //	*realaddr = addr - 0xfe00;
-	  //		return FM7_MAINMEM_BOOTROM_RAM;
-	  //	}
-		*realaddr = addr - 0xfffe;
-		return FM7_MAINMEM_RESET_VECTOR;
-	}
-   
-	emu->out_debug_log("Main: Over run ADDR = %08x\n", addr);
-	*realaddr = addr;
-	return FM7_MAINMEM_NULL;
-}
-     
-int FM7_MAINMEM::getbank(uint32 addr, uint32 *realaddr)
+uint32_t FM7_MAINMEM::read_signal(int sigid)
 {
-	if(realaddr == NULL) return FM7_MAINMEM_NULL; // Not effect.
-	addr = addr & 0xffff;
-#ifdef HAS_MMR
-	if(mainio->read_data8(FM7_MAINIO_WINDOW_ENABLED) != 0) {
-		int stat;
-		uint32 raddr;
-		stat = window_convert(addr, &raddr);
-		//if(stat >= 0) printf("WINDOW CONVERT: %04x to %04x, bank = %02x\n", addr, raddr, stat);
-		if(stat >= 0) {
-			*realaddr = raddr;
-			return stat;
-		}
-	}
-	if(mainio->read_data8(FM7_MAINIO_MMR_ENABLED) != 0) {
-		int stat;
-		uint32 raddr;
-		stat = mmr_convert(addr, &raddr);
-		if(stat >= 0) {
-			*realaddr = raddr;
-			return stat;
-		}
-	}
+	uint32_t value = 0x00000000;
+	switch(sigid) {
+	case FM7_MAINIO_PUSH_FD0F:
+		value = (basicrom_fd0f) ? 0xffffffff : 0x00000000;
+		break;
+	case FM7_MAINIO_IS_BASICROM:
+		value = (is_basicrom) ? 0xffffffff : 0x00000000;
+		break;
+	case FM7_MAINIO_CLOCKMODE:
+		value = (clockmode) ? 0xffffffff : 0x00000000;
+		break;
+	case FM7_MAINIO_BOOTMODE:
+		value = (uint32_t)bootmode & 0x07;
+		break;
+#if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
+	case FM7_MAINIO_BOOTRAM_RW:
+		value = (boot_ram_write) ? 0xffffffff : 0x00000000;
+		break;
+#endif			
+#ifdef HAS_MMR			
+	case FM7_MAINIO_WINDOW_ENABLED:
+		value = (window_enabled) ? 0xffffffff : 0x00000000;
+		break;
+	case FM7_MAINIO_WINDOW_FAST:
+		value = (window_fast) ? 0xffffffff : 0x00000000;
+		break;
+	case FM7_MAINIO_FASTMMR_ENABLED:
+		value = (mmr_fast) ? 0xffffffff : 0x00000000;
+		break;
+	case FM7_MAINIO_MMR_ENABLED:
+		value = (mmr_enabled) ? 0xffffffff : 0x00000000;
+		break;
+	case FM7_MAINIO_MMR_EXTENDED:
+		value = (mmr_extend) ? 0xffffffff : 0x00000000;
+		break;
+	case FM7_MAINIO_MEM_REFRESH_FAST:
+		value = (refresh_fast) ? 0xffffffff : 0x00000000;
+		break;
+#endif			
+#if defined(_FM77AV_VARIANTS)
+	case FM7_MAINIO_INITROM_ENABLED:
+		value = (initiator_enabled) ? 0xffffffff: 0x00000000;
+		break;
+# if defined(_FM77AV40EX) || defined(_FM77AV40SX)	   
+	case FM7_MAINIO_EXTROM:
+		value = (extrom_bank) ? 0xffffffff: 0x00000000;
+		break;
+# endif	   
+	case FM7_MAINIO_EXTBANK:
+		value = extcard_bank & 0x3f;
+		value |= (dictram_enabled) ? 0x80 : 0;
+		value |= (dictrom_enabled) ? 0x40 : 0;
+		break;
 #endif
-	// NOT MMR.
-	return nonmmr_convert(addr, realaddr);
+	}
+	return value;
 }
 
-void FM7_MAINMEM::write_signal(int sigid, uint32 data, uint32 mask)
+
+void FM7_MAINMEM::write_signal(int sigid, uint32_t data, uint32_t mask)
 {
 	bool flag = ((data & mask) != 0);
 	switch(sigid) {
 		case SIG_FM7_SUB_HALT:
 			sub_halted = flag;
 			break;
+		case FM7_MAINIO_IS_BASICROM:
+			is_basicrom = flag;
+			break;
+		case FM7_MAINIO_PUSH_FD0F:
+			basicrom_fd0f = flag;
+			break;
+		case FM7_MAINIO_CLOCKMODE:
+			clockmode = flag;
+			setclock(clockmode ? 0 : 1);
+			break;
+		case FM7_MAINIO_BOOTMODE:
+			bootmode = data & 0x07;
+			break;
+#if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
+		case FM7_MAINIO_BOOTRAM_RW:
+			boot_ram_write = flag;
+			break;
+#endif			
+#ifdef _FM77AV_VARIANTS
+		case FM7_MAINIO_INITROM_ENABLED:
+			initiator_enabled = flag;
+			break;
+		case FM7_MAINIO_EXTBANK:
+			extcard_bank = data & 0x3f;
+			dictram_enabled = ((data & 0x80) != 0) ? true : false;
+			dictrom_enabled = ((data & 0x40) != 0) ? true : false;
+			break;
+# if defined(_FM77AV40EX) || defined(_FM77AV40SX)	   
+		case FM7_MAINIO_EXTROM:
+			extrom_bank = flag;
+	   		break;
+# endif	   
+#endif			
+#ifdef HAS_MMR			
+		case FM7_MAINIO_WINDOW_ENABLED:
+			window_enabled = flag;
+			setclock(config.cpu_type);
+			break;
+		case FM7_MAINIO_WINDOW_FAST:
+			window_fast = flag;
+			setclock(config.cpu_type);
+			break;
+		case FM7_MAINIO_FASTMMR_ENABLED:
+			mmr_fast = flag;
+			setclock(config.cpu_type);
+			break;
+		case FM7_MAINIO_MMR_ENABLED:
+			mmr_enabled = flag;
+			setclock(config.cpu_type);
+			break;
+		case FM7_MAINIO_MMR_EXTENDED:
+			mmr_extend = flag;
+			break;
+		case FM7_MAINIO_MEM_REFRESH_FAST:
+			refresh_fast = flag;
+			setclock(config.cpu_type);
+			break;
+#endif			
 	}
 }
 
+uint32_t FM7_MAINMEM::read_io8(uint32_t addr)
+{
+	return mainio->read_io8(addr);
+}
 
-uint32 FM7_MAINMEM::read_data8(uint32 addr)
+void FM7_MAINMEM::write_io8(uint32_t addr, uint32_t data)
 {
-	uint32 ret;
-	uint32 realaddr;
-	int bank;
-
-	bank = getbank(addr, &realaddr);
-	if(bank < 0) {
-		emu->out_debug_log("Illegal BANK: ADDR = %04x\n", addr);
-		return 0xff; // Illegal
-	}
-   
-        if(bank == FM7_MAINMEM_SHAREDRAM) {
-	   	if(!sub_halted) return 0xff; // Not halt
-		return display->read_data8((realaddr & 0x7f) + 0xd380); // Okay?
-	} else if(bank == FM7_MAINMEM_MMIO) {
-		return mainio->read_data8(realaddr);
-//		return mainio->read_data8(addr);
-	}
-#if defined(_FM77AV_VARIANTS)
-	else if(bank == FM7_MAINMEM_AV_DIRECTACCESS) {
-	  if(display->read_signal(SIG_DISPLAY_HALT) != 0) return 0xff; // Not halt
-		//printf("READ MMR : %04x to %05x\n", addr, realaddr);
-		return display->read_data8(realaddr & 0x0ffff); // Okay?
-	}
-#endif
-	else if(read_table[bank].memory != NULL) {
-		if(bank == FM7_MAINMEM_BOOTROM_BAS) {
-#if 0
-			uint32 i;
-			uint32 pc;
-			uint32 ix;
-			uint32 us;
-			uint32 ss;
-			pc = maincpu->get_pc();
-			if(pc == 0xfe02) {
-				ix = maincpu->get_ix();
-				ss = maincpu->get_sstack();
-				printf("IPL: SEEK PC=%04x S=%04x X=%04x RCB=", pc, ss, ix);
-				for(i = 0; i < 12; i++) printf("%02x ", read_data8(i + ix));
-				printf("\n");
-			} else if((pc == 0xfe05) || (pc == 0xfe08)){
-				ix = maincpu->get_ix();
-				us = maincpu->get_ustack();
-				ss = maincpu->get_sstack();
-				printf("IPL: READ WRITE PC=%04x S=%04x X=%04x U=%04x RCB=", pc, ss, ix, us);
-				for(i = 0; i < 12; i++) printf("%02x ", read_data8(i + ix));
-				printf("\n");
-				printf("STACK DUMP: ");
-				for(i = 0; i < 32; i++) printf("%02x ", read_data8((ss + i) & 0xffff));
-				printf("\n");
+	return mainio->write_io8(addr, data);
+}
+
+uint32_t FM7_MAINMEM::read_dma_data8(uint32_t addr)
+{
+#if defined(HAS_MMR)	
+	uint32_t val;
+	val = this->read_data8_main(addr & 0xffff, true);
+	return val;
+#else
+	return this->read_data8(addr & 0xffff);
+#endif	
+}
+
+uint32_t FM7_MAINMEM::read_dma_io8(uint32_t addr)
+{
+#if defined(HAS_MMR)	
+	uint32_t val;
+	val = this->read_data8_main(addr & 0xffff, true);
+	return val;
+#else
+	return this->read_data8(addr & 0xffff);
+#endif	
+}
+
+uint32_t FM7_MAINMEM::read_data8(uint32_t addr)
+{
+#if defined(HAS_MMR)   
+	if(addr >= FM7_MAINIO_WINDOW_OFFSET) {
+		switch(addr) {
+		case FM7_MAINIO_WINDOW_OFFSET:
+			return (uint32_t)window_offset;
+			break;
+		case FM7_MAINIO_MMR_SEGMENT:
+			return (uint32_t)mmr_segment;
+			break;
+		default:
+			if((addr >= FM7_MAINIO_MMR_BANK) && (addr < (FM7_MAINIO_MMR_BANK + 0x80))){
+				return mmr_map_data[addr - FM7_MAINIO_MMR_BANK];
 			}
-#endif
-		} else {
-			uint32 pc = maincpu->get_pc();
-			uint32 ss = maincpu->get_sstack();
-			uint32 i;
-			//if(pc == 0x4afb) {
-			//	if(flag_debug != true) {
-			//		flag_debug = true;
-			//		for(i = 0; i < 64; i++) printf("%04x : %02x\n", i + pc, read_data8((pc + i) & 0xffff));
-			//	}
-			//}
-			//if((pc >= 0x1900) && (pc <= 0xfcff)){
-			//if(flag_debug != true) {
-			//		flag_debug = true;
-			//		printf("PC=%04x \n", pc);
-			//	}
-			//}
+			break;
 		}
-		//printf("READ: %04x is bank %d, %04x data=%02x\n", addr, bank, realaddr, read_table[bank].memory[realaddr]);
-		//if(bank == FM7_MAINMEM_VECTOR) printf("VECTOR: ADDR = %04x, data = %02x\n", addr, read_table[bank].memory[realaddr]);
-		return read_table[bank].memory[realaddr];
+		return 0xff;
 	}
-	return 0xff; // Dummy
+#endif   
+	return read_data8_main(addr, false);
 }
 
-void FM7_MAINMEM::write_data8(uint32 addr, uint32 data)
+void FM7_MAINMEM::write_dma_data8(uint32_t addr, uint32_t data)
 {
-	uint32 ret;
-	uint32 realaddr;
-	int bank;
-   
-	bank = getbank(addr, &realaddr);
-	if(bank < 0) {
-		emu->out_debug_log("Illegal BANK: ADDR = %04x\n", addr);
-		return; // Illegal
-	}
-   
-        if(bank == FM7_MAINMEM_SHAREDRAM) {
-       		if(!sub_halted) return; // Not halt
-		display->write_data8((realaddr & 0x7f) + 0xd380, data); // Okay?
-		return;
-	} else if(bank == FM7_MAINMEM_MMIO) {
-		mainio->write_data8(realaddr & 0x00ff, (uint8)data);
-//		mainio->write_data8(addr, (uint8)data);
-		return;
-	}
-#if defined(_FM77AV_VARIANTS)
-	else if(bank == FM7_MAINMEM_AV_DIRECTACCESS) {
-       		if(display->read_signal(SIG_DISPLAY_HALT) != 0) return; // Not halt
-		//printf("WRITE MMR : %04x to %05x\n", addr, realaddr);
-		display->write_data8(realaddr & 0x0ffff, data); // Okay?
+#if defined(HAS_MMR)
+	write_data8_main(addr & 0xffff, data, true);
+#else
+	write_data8(addr & 0xffff, data);
+#endif	
+}
+
+void FM7_MAINMEM::write_dma_io8(uint32_t addr, uint32_t data)
+{
+#if defined(HAS_MMR)
+	write_data8_main(addr & 0xffff, data, true);
+#else
+	write_data8(addr & 0xffff, data);
+#endif	
+}
+
+void FM7_MAINMEM::write_data8(uint32_t addr, uint32_t data)
+{
+#if defined(HAS_MMR)   
+	if(addr >= FM7_MAINIO_WINDOW_OFFSET) {
+		switch(addr) {
+		case FM7_MAINIO_WINDOW_OFFSET:
+			window_offset = data;
+			break;
+		case FM7_MAINIO_MMR_SEGMENT:
+			if(mmr_extend) {
+				mmr_segment = data & 0x07;
+			} else {
+				mmr_segment = data & 0x03;
+			}
+			break;
+		default:
+			if((addr >= FM7_MAINIO_MMR_BANK) && (addr < (FM7_MAINIO_MMR_BANK + 0x80))){
+				mmr_map_data[addr - FM7_MAINIO_MMR_BANK] = (uint8_t)data;
+				update_mmr_jumptable(addr - FM7_MAINIO_MMR_BANK);
+			}
+			break;
+		}
 		return;
 	}
 #endif
-       	else if(write_table[bank].memory != NULL) {
-			write_table[bank].memory[realaddr] = (uint8)(data & 0x000000ff);
-	}
+	write_data8_main(addr, data, false);
 }
 
 // Read / Write data(s) as big endian.
-uint32 FM7_MAINMEM::read_data16(uint32 addr)
+uint32_t FM7_MAINMEM::read_data16(uint32_t addr)
 {
-	uint32 hi, lo;
-	uint32 val;
+	uint32_t hi, lo;
+	uint32_t val;
    
 	hi = read_data8(addr) & 0xff;
 	lo = read_data8(addr + 1) & 0xff;
@@ -457,10 +479,10 @@ uint32 FM7_MAINMEM::read_data16(uint32 addr)
 	return val;
 }
 
-uint32 FM7_MAINMEM::read_data32(uint32 addr)
+uint32_t FM7_MAINMEM::read_data32(uint32_t addr)
 {
-	uint32 ah, a2, a3, al;
-	uint32 val;
+	uint32_t ah, a2, a3, al;
+	uint32_t val;
    
 	ah = read_data8(addr) & 0xff;
 	a2 = read_data8(addr + 1) & 0xff;
@@ -471,18 +493,18 @@ uint32 FM7_MAINMEM::read_data32(uint32 addr)
 	return val;
 }
 
-void FM7_MAINMEM::write_data16(uint32 addr, uint32 data)
+void FM7_MAINMEM::write_data16(uint32_t addr, uint32_t data)
 {
-	uint32 d = data;
+	uint32_t d = data;
    
 	write_data8(addr + 1, d & 0xff);
 	d = d / 256;
 	write_data8(addr + 0, d & 0xff);
 }
 
-void FM7_MAINMEM::write_data32(uint32 addr, uint32 data)
+void FM7_MAINMEM::write_data32(uint32_t addr, uint32_t data)
 {
-	uint32 d = data;
+	uint32_t d = data;
    
 	write_data8(addr + 3, d & 0xff);
 	d = d / 256;
@@ -494,285 +516,164 @@ void FM7_MAINMEM::write_data32(uint32 addr, uint32 data)
 }
 
 
-bool FM7_MAINMEM::get_loadstat_basicrom(void)
-{
-	return diag_load_basicrom;
-}
-
-bool FM7_MAINMEM::get_loadstat_bootrom_bas(void)
-{
-	return diag_load_bootrom_bas;
-}
-
-bool FM7_MAINMEM::get_loadstat_bootrom_dos(void)
-{
-	return diag_load_bootrom_dos;
-}
-
-uint32 FM7_MAINMEM::read_bios(const char *name, uint8 *ptr, uint32 size)
+void FM7_MAINMEM::update_config()
 {
-	FILEIO fio;
-	uint32 blocks;
-	_TCHAR *s;
-  
-	if((name == NULL) || (ptr == NULL))  return 0;
-	s = emu->bios_path((_TCHAR *)name);
-	if(s == NULL) return 0;
-  
-	if(!fio.Fopen(s, FILEIO_READ_BINARY)) return 0;
-	blocks = fio.Fread(ptr, size, 1);
-	fio.Fclose();
-
-	return blocks * size;
+	setclock(config.cpu_type);
 }
 
-uint32 FM7_MAINMEM::write_bios(const char *name, uint8 *ptr, uint32 size)
-{
-	FILEIO fio;
-	uint32 blocks;
-	_TCHAR *s;
-  
-	if((name == NULL) || (ptr == NULL))  return 0;
-	s = emu->bios_path((_TCHAR *)name);
-	if(s == NULL) return 0;
-  
-	fio.Fopen(s, FILEIO_WRITE_BINARY);
-	blocks = fio.Fwrite(ptr, size, 1);
-	fio.Fclose();
-
-	return blocks * size;
-}
+#define STATE_VERSION 8
 
-FM7_MAINMEM::FM7_MAINMEM(VM* parent_vm, EMU* parent_emu) : MEMORY(parent_vm, parent_emu)
+bool FM7_MAINMEM::decl_state(FILEIO *state_fio, bool loading)
 {
-	int i;
-	p_vm = parent_vm;
-	p_emu = parent_emu;
-	for(i = 0; i < 4; i++) fm7_bootroms[i] = (uint8 *)malloc(0x200);
-	mainio = NULL;
-	display = NULL;
-	maincpu = NULL;
-	kanjiclass1 = NULL;
-	kanjiclass2 = NULL;
-# if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20)
-	fm7_mainmem_extram = NULL;
-#endif
-}
-
-FM7_MAINMEM::~FM7_MAINMEM()
-{
-	int i;
-	for(i = 0; i < 4; i++) {
-		if(fm7_bootroms[i] != NULL) free(fm7_bootroms[i]);
-		fm7_bootroms[i] = NULL;
+	if(!state_fio->StateCheckUint32(STATE_VERSION)) {
+		return false;
+	}
+	if(!state_fio->StateCheckInt32(this_device_id)) {
+		return false;
 	}
-}
-
-void FM7_MAINMEM::initialize(void)
-{
-	int i;
-	diag_load_basicrom = false;
-	diag_load_bootrom_bas = false;
-	diag_load_bootrom_dos = false;
-	diag_load_bootrom_mmr = false;
-#if defined(_FM77AV_VARIANTS)
-	dictrom_connected = false;
-#endif
-	// Initialize table
-	// $0000-$7FFF
-	memset(read_table, 0x00, sizeof(read_table));
-	memset(write_table, 0x00, sizeof(write_table));
-	i = FM7_MAINMEM_OMOTE;
-	memset(fm7_mainmem_omote, 0x00, 0x8000 * sizeof(uint8));
-	read_table[i].memory = fm7_mainmem_omote;
-	write_table[i].memory = fm7_mainmem_omote;
-
-	// $8000-$FBFF
-	i = FM7_MAINMEM_URA;
-	memset(fm7_mainmem_ura, 0x00, 0x7c00 * sizeof(uint8));
-	read_table[i].memory = fm7_mainmem_ura;
-	write_table[i].memory = fm7_mainmem_ura;
-
-	
-	i = FM7_MAINMEM_VECTOR;
-	memset(fm7_mainmem_bootrom_vector, 0x00, 0x1e);
-	read_table[i].memory = fm7_mainmem_bootrom_vector;
-	write_table[i].memory = fm7_mainmem_bootrom_vector;
-	
-#if defined(CAPABLE_DICTROM)
-	diag_load_dictrom = false;
-	i = FM7_MAINMEM_DICTROM;
-	memset(fm7_mainmem_extrarom, 0xff, 0x40000 * sizeof(uint8));
-	read_table[i].memory = fm7_mainmem_dictrom;
-	write_table[i].memory = NULL;
-	if(read_bios("DICROM.ROM", fm7_mainmem_dictrom, 0x40000) == 0x40000) diag_load_dictrom = true;
-	emu->out_debug_log("DICTIONARY ROM READING : %s\n", diag_load_dictrom ? "OK" : "NG");
-	dictrom_connected = diag_load_dictrom;
-	
-	i = FM7_MAINMEM_BACKUPED_RAM;
-	diag_load_learndata = false;
-	memset(fm7_mainmem_learndata, 0x00, 0x2000 * sizeof(uint8));
-	read_table[i].memory = fm7_mainmem_learndata;
-	write_table[i].memory = fm7_mainmem_learndata;
-	if(read_bios("USERDIC.DAT", read_table[i].memory, 0x2000) == 0x2000) diag_load_learndata = true;
-	emu->out_debug_log("DICTIONARY ROM READING : %s\n", diag_load_learndata ? "OK" : "NG");
-	if(!diag_load_learndata) write_bios("USERDIC.DAT", fm7_mainmem_learndata, 0x2000);
-#endif
 	
-#if defined(_FM77AV40) || defined(_FM77AV40SX) || defined(_FM77AV40EX) || defined(_FM77AV20)
-	i = FM7_MAINMEM_77AV40_EXTRAROM;
-	diag_load_extrarom = false;
-	memset(fm7_mainmem_extrarom, 0xff, 0x20000 * sizeof(uint8));
-	read_table[i].memory = fm7_mainmem_extrarom;
-	write_table[i].memory = NULL;
-	if(read_bios("EXTSUB.ROM", read_table[i].memory, 0xc000) >= 0xc000) diag_load_extrarom = true;
-	emu->out_debug_log("AV40 EXTRA ROM READING : %s\n", diag_load_extrarom ? "OK" : "NG");
+	state_fio->StateBool(ioaccess_wait);
+	state_fio->StateInt32(waitfactor);
+	state_fio->StateInt32(waitcount);
+	state_fio->StateBool(sub_halted);
 	
-	if(config.extram_pages > 0) {
-		i = FM7_MAINMEM_EXTRAM;
-		extram_pages = config.extram_pages;
-		if(extram_pages >= 12) extram_pages = 12;
-		fm7_mainmem_extram = malloc(extram_pages * 0x10000);
-		if(fm7_mainmem_extram != NULL) {
-			memset(fm7_mainmem_extram, 0x00, extram_pages * 0x10000);
-			read_table[i].memory = fm7_mainmem_extram;
-			write_table[i].memory = fm7_mainmem_extram;
-		}
-	}
+	state_fio->StateBool(diag_load_basicrom);
+	state_fio->StateBool(diag_load_bootrom_bas);
+	state_fio->StateBool(diag_load_bootrom_dos);
+	state_fio->StateBool(diag_load_bootrom_mmr);
+	state_fio->StateBool(diag_load_bootrom_bubble);
+	state_fio->StateBool(diag_load_bootrom_bubble_128k);
+	state_fio->StateBool(diag_load_bootrom_sfd8);
+	state_fio->StateBool(diag_load_bootrom_2hd);
+
+	state_fio->StateBuffer(fm7_mainmem_omote, sizeof(fm7_mainmem_omote), 1);
+	state_fio->StateBuffer(fm7_mainmem_ura, sizeof(fm7_mainmem_ura), 1);
+	state_fio->StateBuffer(fm7_mainmem_basicrom, sizeof(fm7_mainmem_basicrom), 1);
+	state_fio->StateBuffer(fm7_mainmem_bioswork, sizeof(fm7_mainmem_bioswork), 1);
+	state_fio->StateBuffer(fm7_mainmem_bootrom_vector, sizeof(fm7_mainmem_bootrom_vector), 1);
+	state_fio->StateBuffer(fm7_mainmem_reset_vector, sizeof(fm7_mainmem_reset_vector), 1);
+ 	
+	state_fio->StateBuffer(fm7_mainmem_null, sizeof(fm7_mainmem_null), 1);
+
+#if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
+	state_fio->StateBuffer(fm7_bootram, sizeof(fm7_bootram), 1);
 #endif	
-	
-	for(i = FM7_MAINMEM_BOOTROM_BAS; i <= FM7_MAINMEM_BOOTROM_EXTRA; i++) {
-	    memset(fm7_bootroms[i - FM7_MAINMEM_BOOTROM_BAS], 0xff, 0x200);
-	    read_table[i].memory = fm7_bootroms[i - FM7_MAINMEM_BOOTROM_BAS];
-	    write_table[i].memory = NULL;
-	}
+#if defined(_FM77_VARIANTS) || defined(_FM8)
+	for(int i = 0; i < 8; i++) state_fio->StateBuffer(fm7_bootroms[i], 0x200, 1);
+#elif defined(_FM7) || defined(_FMNEW7)
+	for(int i = 0; i < 4; i++) state_fio->StateBuffer(fm7_bootroms[i], 0x200, 1);
+#endif	
+
 #if defined(_FM8)
-	if(read_bios("BOOT_BAS8.ROM", fm7_bootroms[0], 0x200) >= 0x1e0) {
-		diag_load_bootrom_bas = true;
-	} else {
-		diag_load_bootrom_bas = false;
-	}
-	if(read_bios("BOOT_DOS8.ROM", fm7_bootroms[1], 0x200) >= 0x1e0) {
-		diag_load_bootrom_dos = true;
-	} else {
-		diag_load_bootrom_dos = false;
-	}
-	diag_load_bootrom_mmr = false;
-# elif defined(_FM77_VARIANTS)
-	i = FM7_MAINMEM_BOOTROM_RAM;
-	memset(fm7_bootram, 0x00, 0x200 * sizeof(uint8)); // RAM
-	read_table[i].memory = fm7_bootram;
-	write_table[i].memory = fm7_bootram;
-	
-	if(read_bios("BOOT_BAS.ROM", fm7_bootroms[0], 0x200) >= 0x1e0) {
-		diag_load_bootrom_bas = true;
-	} else {
-		diag_load_bootrom_bas = false;
-	}
-	if(read_bios("BOOT_DOS.ROM", fm7_bootroms[1], 0x200) >= 0x1e0) {
-		diag_load_bootrom_dos = true;
-	} else {
-		diag_load_bootrom_dos = false;
-	}
-	if(read_bios("BOOT_MMR.ROM", fm7_bootroms[2], 0x200) >= 0x1e0) {
-		diag_load_bootrom_mmr = true;
-	} else {
-		diag_load_bootrom_mmr = false;
-		//memset(fm7_bootroms[2], 0xff, 0x200);
-	}
-	if(config.extram_pages > 0) {
-		i = FM7_MAINMEM_EXTRAM;
-		extram_pages = config.extram_pages;
-		if(extram_pages >= 3) pages = 3;
-		fm7_mainmem_extram = malloc(extram_pages * 0x10000);
-		if(fm7_mainmem_extram != NULL) {
-			memset(fm7_mainmem_extram, 0x00, extram_pages * 0x10000);
-			read_table[i].memory = fm7_mainmem_extram;
-			write_table[i].memory = fm7_mainmem_extram;
-		}
-	}
-# elif defined(_FM7) || defined(_FMNEW7)
-	if(read_bios("BOOT_BAS.ROM", fm7_bootroms[0], 0x200) >= 0x1e0) {
-		diag_load_bootrom_bas = true;
-	} else {
-		diag_load_bootrom_bas = false;
-	}
-	if(read_bios("BOOT_DOS.ROM", fm7_bootroms[1], 0x200) >= 0x1e0) {
-		diag_load_bootrom_dos = true;
-	} else {
-		diag_load_bootrom_dos = false;
-	}
-	// FM-7/8
-	diag_load_bootrom_mmr = false;
-# elif defined(_FM77AV_VARIANTS)
-	i = FM7_MAINMEM_AV_PAGE0;
-	memset(fm7_mainmem_mmrbank_0, 0x00, 0x10000 * sizeof(uint8));
-	read_table[i].memory = fm7_mainmem_mmrbank_0;
-	write_table[i].memory = fm7_mainmem_mmrbank_0;
-	
+	state_fio->StateBool(diag_load_sm11_14);
+	state_fio->StateBool(diag_load_sm11_15);
+#elif defined(_FM77_VARIANTS)
+	state_fio->StateBool(diag_load_wb11_12);
+#elif defined(_FM7) || defined(_FMNEW7)
+	state_fio->StateBool(diag_load_tl11_11);
+#  if defined(_FMNEW7)
+	state_fio->StateBool(diag_load_tl11_12);
+#  endif	
+#elif defined(_FM77AV_VARIANTS)
+	state_fio->StateBool(dictrom_connected);
+	state_fio->StateBool(use_page2_extram);
+ 	
+	state_fio->StateBool(diag_load_initrom);
+	state_fio->StateBool(diag_load_dictrom);
+	state_fio->StateBool(diag_load_learndata);
+	state_fio->StateBuffer(fm7_mainmem_initrom, sizeof(fm7_mainmem_initrom), 1);
+	state_fio->StateBuffer(fm77av_hidden_bootmmr, sizeof(fm77av_hidden_bootmmr), 1);
+ 	
+	state_fio->StateBuffer(fm7_mainmem_mmrbank_0, sizeof(fm7_mainmem_mmrbank_0), 1);
+	state_fio->StateBuffer(fm7_mainmem_mmrbank_2, sizeof(fm7_mainmem_mmrbank_2), 1);
+ 	
+# if defined(_FM77AV40EX) || defined(_FM77AV40SX)
+	state_fio->StateBool(diag_load_extrarom);
+	state_fio->StateBuffer(fm7_mainmem_extrarom, sizeof(fm7_mainmem_extrarom), 1);
+# endif
+# if defined(CAPABLE_DICTROM)
+	state_fio->StateBuffer(fm7_mainmem_dictrom, sizeof(fm7_mainmem_dictrom), 1);
+	state_fio->StateBuffer(fm7_mainmem_learndata, sizeof(fm7_mainmem_learndata), 1);
+# endif
+#endif
 
-	i = FM7_MAINMEM_INITROM;
-	diag_load_initrom = false;
-	memset(fm7_mainmem_initrom, 0xff, 0x2000 * sizeof(uint8));
-	read_table[i].memory = fm7_mainmem_initrom;
-	write_table[i].memory = NULL;
-	if(read_bios("INITIATE.ROM", read_table[i].memory, 0x2000) >= 0x2000) diag_load_initrom = true;
-	emu->out_debug_log("77AV INITIATOR ROM READING : %s\n", diag_load_initrom ? "OK" : "NG");
-	
-	memcpy(fm7_bootroms[0], &fm7_mainmem_initrom[0x1800], 0x200 * sizeof(uint8));
-	memcpy(fm7_bootroms[1], &fm7_mainmem_initrom[0x1a00], 0x200 * sizeof(uint8));
-	read_table[FM7_MAINMEM_BOOTROM_MMR].memory = NULL; // Not connected.
-
-	i = FM7_MAINMEM_BOOTROM_RAM;
-	memset(fm7_bootram, 0x00, 0x200 * sizeof(uint8)); // RAM
-	read_table[i].memory = fm7_bootram;
-	write_table[i].memory = fm7_bootram;
-	if(diag_load_initrom) diag_load_bootrom_bas = true;
-	if(diag_load_initrom) diag_load_bootrom_dos = true;
-	// FM-7
+#ifdef HAS_MMR
+	state_fio->StateBool(extram_connected);
+# if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX) || \
+	defined(_FM77_VARIANTS)
+	state_fio->StateInt32(extram_pages);
+	state_fio->StateBuffer(fm7_mainmem_extram, extram_size, 1);
+#  if defined(_FM77_VARIANTS)
+	state_fio->StateBuffer(fm77_shadowram, sizeof(fm77_shadowram), 1);
+#  endif
+# endif
 #endif
-	emu->out_debug_log("BOOT ROM (basic mode) READING : %s\n", diag_load_bootrom_bas ? "OK" : "NG");
-	emu->out_debug_log("BOOT ROM (DOS   mode) READING : %s\n", diag_load_bootrom_dos ? "OK" : "NG");
-#if defined(_FM77_VARIANTS)
-	emu->out_debug_log("BOOT ROM (MMR   mode) READING : %s\n", diag_load_bootrom_mmr ? "OK" : "NG");
+							  
+ 	{ // V2;
+		state_fio->StateBool(is_basicrom);
+		state_fio->StateBool(clockmode);
+		state_fio->StateBool(basicrom_fd0f);
+		state_fio->StateUint32(bootmode);
+#if defined(_FM77AV_VARIANTS)
+		state_fio->StateUint32(extcard_bank);
+		state_fio->StateBool(extrom_bank);
+		state_fio->StateBool(initiator_enabled);
+		state_fio->StateBool(dictrom_enabled);
+		state_fio->StateBool(dictram_enabled);
 #endif
+#if defined(_FM77AV_VARIANTS) || defined(_FM77_VARIANTS)
+		state_fio->StateBool(boot_ram_write);
+#endif		
+#if defined(HAS_MMR)
+		state_fio->StateBool(window_enabled);
+		state_fio->StateBool(mmr_enabled);
+		state_fio->StateBool(mmr_fast);
+		state_fio->StateBool(mmr_extend);
+ 		
+		state_fio->StateUint16(window_offset);
+		state_fio->StateBool(window_fast);
+		state_fio->StateBool(refresh_fast);
+		state_fio->StateUint8(mmr_segment);
+		state_fio->StateBuffer(mmr_map_data, sizeof(mmr_map_data), 1);
+#endif
+ 	}
+	state_fio->StateUint32(mem_waitfactor); // OK?
+	state_fio->StateUint32(mem_waitcount); // OK?
 
-	i = FM7_MAINMEM_VECTOR;
-	memset(fm7_mainmem_bootrom_vector, 0x00, 0x1e);
-	read_table[i].memory = fm7_mainmem_bootrom_vector;
-	write_table[i].memory = fm7_mainmem_bootrom_vector;
+	state_fio->StateInt32(cpu_clocks); // OK?
+ 
+	return true;
+}
 
-	for(i = 0; i <= 3; i++) {
-		uint8 *p = fm7_bootroms[i];
-		p[0x1fe] = 0xfe; // Set reset vector.
-		p[0x1ff] = 0x00; //
-	}
-	
-	i = FM7_MAINMEM_RESET_VECTOR;
-	fm7_mainmem_reset_vector[0] = 0xfe;
-	fm7_mainmem_reset_vector[1] = 0x00;
-   
-	read_table[i].memory = fm7_mainmem_reset_vector;
-	write_table[i].memory = NULL;
-   
-	i = FM7_MAINMEM_BASICROM;
-	memset(fm7_mainmem_basicrom, 0xff, 0x7c00 * sizeof(uint8));
-	read_table[i].dev = NULL;
-	read_table[i].memory = fm7_mainmem_basicrom;
-	write_table[i].dev = NULL;
-	write_table[i].memory = NULL;
-#if !defined(_FM8)
-	if(read_bios("FBASIC30.ROM", fm7_mainmem_basicrom, 0x7c00) == 0x7c00) diag_load_basicrom = true;
-#else // FM8
-	if(read_bios("FBASIC10.ROM", fm7_mainmem_basicrom, 0x7c00) == 0x7c00) diag_load_basicrom = true;
-#endif	
-	emu->out_debug_log("BASIC ROM READING : %s\n", diag_load_basicrom ? "OK" : "NG");
-   
-	i = FM7_MAINMEM_BIOSWORK;
-	memset(fm7_mainmem_bioswork, 0x00, 0x80 * sizeof(uint8));
-	read_table[i].dev = NULL;
-	read_table[i].memory = fm7_mainmem_bioswork;
-	write_table[i].dev = NULL;
-	write_table[i].memory = fm7_mainmem_bioswork;
-	
+void FM7_MAINMEM::save_state(FILEIO *state_fio)
+{
+	decl_state(state_fio, false);
+#if defined(HAS_MMR)
+#  if defined(_FM77_VARIANTS)
+	if(extram_pages > 3) extram_pages = 3;
+#  elif defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX) 
+	if(extram_pages > 12) extram_pages = 12;
+#  endif
+#endif
+	//extram_size = extram_pages * 0x10000;
+}
+
+bool FM7_MAINMEM::load_state(FILEIO *state_fio)
+{
+	bool mb = decl_state(state_fio, true);
+	this->out_debug_log(_T("Load State: MAINMEM: id=%d stat=%s\n"), this_device_id, (mb) ? _T("OK") : _T("NG"));
+	if(!mb) return false;
+ 	
+#if defined(HAS_MMR)
+#  if defined(_FM77_VARIANTS)
+	if(extram_pages > 3) extram_pages = 3;
+#  elif defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX) 
+	if(extram_pages > 12) extram_pages = 12;
+#  endif
+#endif
+	//extram_size = extram_pages * 0x10000;
+ 	init_data_table();
+ 	update_all_mmr_jumptable();
+ 	return true;
+}
 }