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ISel: Fix FastISel of swifterror values
authorArnold Schwaighofer <aschwaighofer@apple.com>
Thu, 15 Jun 2017 17:34:42 +0000 (17:34 +0000)
committerArnold Schwaighofer <aschwaighofer@apple.com>
Thu, 15 Jun 2017 17:34:42 +0000 (17:34 +0000)
commit00cc11273bf644157d5e78e5dac4c67a63918fef
tree08745c617541b52a6dda6f875d092de1e883f252
parentc9069cd453440161a86ff5af7be1f12a3869baff
ISel: Fix FastISel of swifterror values

The code assumed that we process instructions in basic block order.  FastISel
processes instructions in reverse basic block order. We need to pre-assign
virtual registers before selecting otherwise we get def-use relationships wrong.

This only affects code with swifterror registers.

rdar://32659327

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305484 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/CodeGen/FunctionLoweringInfo.h
lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
test/CodeGen/AArch64/swifterror.ll
test/CodeGen/ARM/swifterror.ll
test/CodeGen/X86/swifterror.ll