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x86/insn: Add misc instructions to x86 instruction decoder
authorAdrian Hunter <adrian.hunter@intel.com>
Thu, 2 Dec 2021 09:50:27 +0000 (11:50 +0200)
committerBorislav Petkov <bp@suse.de>
Sun, 23 Jan 2022 19:37:54 +0000 (20:37 +0100)
commit0153d98f2dd6d5161fc4d496d785c10686d0d7b6
treea00bb4c5aa9173eaa244a1db07d5d6196c14b8be
parenta6ea1142dee66f054a7ce51ebd053ef5ad976227
x86/insn: Add misc instructions to x86 instruction decoder

x86 instruction decoder is used for both kernel instructions and user space
instructions (e.g. uprobes, perf tools Intel PT), so it is good to update
it with new instructions.

Add instructions to x86 instruction decoder:

User Interrupt

clui
senduipi
stui
testui
uiret

Prediction history reset

hreset

Serialize instruction execution

serialize

TSX suspend load address tracking

xresldtrk
xsusldtrk

Reference:
Intel Architecture Instruction Set Extensions and Future Features
Programming Reference
May 2021
Document Number: 319433-044

Example using perf tools' x86 instruction decoder test:

  $ perf test -v "x86 instruction decoder" |& grep -i hreset
  Decoded ok: f3 0f 3a f0 c0 00           hreset $0x0
  Decoded ok: f3 0f 3a f0 c0 00           hreset $0x0

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Link: https://lore.kernel.org/r/20211202095029.2165714-5-adrian.hunter@intel.com
arch/x86/lib/x86-opcode-map.txt
tools/arch/x86/lib/x86-opcode-map.txt