OSDN Git Service

staging: rtl8723au: core: remove redundant endianness conversion
authorDavid Decotigny <ddecotig@gmail.com>
Mon, 8 Jun 2015 00:43:02 +0000 (17:43 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 8 Jun 2015 20:23:53 +0000 (13:23 -0700)
commit02632342d4831dc3d197a45f83de291e2d3980cc
tree842f86743fb9888ad31103cc9a0b1b9f1c64a13d
parentaf17b56d1f42bd761709ec68a00ce4f1a089e597
staging: rtl8723au: core: remove redundant endianness conversion

Source and destination have the same little-endian annotation: this
patch removes incorrect byte-swap on non-LE cpus.

This addresses the following sparse warning:
drivers/staging/rtl8723au/core/rtw_mlme_ext.c:3911:56: warning: incorrect type in argument 1 (different base types)
drivers/staging/rtl8723au/core/rtw_mlme_ext.c:3911:56:    expected unsigned short [unsigned] [usertype] val
drivers/staging/rtl8723au/core/rtw_mlme_ext.c:3911:56:    got restricted __le16 [usertype] BA_timeout_value

Signed-off-by: David Decotigny <ddecotig@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8723au/core/rtw_mlme_ext.c