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[AArch64][CallLowering] Constraint registers on target specific instruction
authorQuentin Colombet <qcolombet@apple.com>
Thu, 22 Dec 2016 21:56:31 +0000 (21:56 +0000)
committerQuentin Colombet <qcolombet@apple.com>
Thu, 22 Dec 2016 21:56:31 +0000 (21:56 +0000)
commit0517764ca4ced57933024e032f33d2684ba62ab6
tree6e1c1f089dc5b49ee097a4e817ce928eaadd5178tree | snapshot
parent17505810d05f9ab6e3110072414ea3a5a349b3f7commit | diff
[AArch64][CallLowering] Constraint registers on target specific instruction

The InstructionSelect pass will not look at target specific instructions
since they are already selected. As a result, the operands of target
specific instructions must be properly constrained, because it is not
going to fix them.

This fixes invalid register classes on call instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290377 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64CallLowering.cpp diff | blob | history
test/CodeGen/AArch64/GlobalISel/call-translator.ll diff | blob | history
external/llvm
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