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[DAGCombiner] Add ComputeNumSignBits vector demanded elements support to ASHR and...
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 28 Apr 2017 13:21:18 +0000 (13:21 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 28 Apr 2017 13:21:18 +0000 (13:21 +0000)
commit053e5ff4f2873573600308a58e17a6a4dc5ae421
tree7fa7177e4cb602e91c38f8bf425c4c46e67aade8tree | snapshot
parent3f8cc3a1fa090e398256348e994cf6734a6b54d6commit | diff
[DAGCombiner] Add ComputeNumSignBits vector demanded elements support to ASHR and INSERT_VECTOR_ELT (reapplied)

Reapplied r299221 after fix for nondeterminism in ThinLTO builder (rL301599), with extra check for implicit truncation of inserted element.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301644 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/SelectionDAG.cpp diff | blob | history
test/CodeGen/X86/known-signbits-vector.ll diff | blob | history
external/llvm
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