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drm/i915/mtl: Don't mask off CCS according to DSS fusing
authorMatt Roper <matthew.d.roper@intel.com>
Thu, 18 Aug 2022 23:41:45 +0000 (16:41 -0700)
committerRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Thu, 25 Aug 2022 18:00:43 +0000 (11:00 -0700)
commit068a0f5c8260dcc4ccbaefd2dbf21ea84162ac17
tree310fcd9d7721486f3bb39528416c3e3bd34c2346
parentda30390b93c377545fdf5ecec34aee018f90485b
drm/i915/mtl: Don't mask off CCS according to DSS fusing

Unlike the Xe_HP platforms, MTL only has a single CCS engine; the
quad-based engine masking logic does not apply to this platform (or
presumably any future platforms that only have 0 or 1 CCS).

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220818234202.451742-5-radhakrishna.sripada@intel.com
drivers/gpu/drm/i915/gt/intel_engine_cs.c