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AMDGPU/GlobalISel: Fix handling of sgpr (not scc bank) s1 to VCC
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 15 Jul 2019 19:44:07 +0000 (19:44 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 15 Jul 2019 19:44:07 +0000 (19:44 +0000)
commit0774fb325eb3867f039ba1e7513ce8125d36babf
treed5d6985e80c9a0422234277fe32f9ece58c2b62ftree | snapshot
parente86254e20edd06ef03ee3bf9b374a217350e7a21commit | diff
AMDGPU/GlobalISel: Fix handling of sgpr (not scc bank) s1 to VCC

This was emitting a copy from a 32-bit register to a 64-bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366117 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp diff | blob | history
test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir diff | blob | history
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