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[X86] Use vector widening to support sign extend from i1 when the dest type is not...
authorCraig Topper <craig.topper@intel.com>
Tue, 5 Dec 2017 06:37:21 +0000 (06:37 +0000)
committerCraig Topper <craig.topper@intel.com>
Tue, 5 Dec 2017 06:37:21 +0000 (06:37 +0000)
commit07b0498e27dc735187cd0121aaad03f8f3ca0f64
tree3e1e5e323efd0da24bf17c3a079e201ab7a10827
parent02ef0610a9e49588083902ca9daf4aa4dfd3fa89
[X86] Use vector widening to support sign extend from i1 when the dest type is not 512-bits and vlx is not enabled.

Previously we used a wider element type and truncated. But its more efficient to keep the element type and drop unused elements.

If BWI isn't supported and we have a i16 or i8 type, we'll extend it to be i32 and still use a truncate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319740 91177308-0d34-0410-b5e6-96231b3b80d8
12 files changed:
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/avg-mask.ll
test/CodeGen/X86/avx512-calling-conv.ll
test/CodeGen/X86/avx512-cvt.ll
test/CodeGen/X86/avx512-mask-op.ll
test/CodeGen/X86/avx512-vec-cmp.ll
test/CodeGen/X86/avx512vl-vec-masked-cmp.ll
test/CodeGen/X86/setcc-lowering.ll
test/CodeGen/X86/sse-fsignum.ll
test/CodeGen/X86/vector-compare-results.ll
test/CodeGen/X86/vector-sext.ll
test/CodeGen/X86/vector-shuffle-v1.ll