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[VE] aligned load/store isel patterns
authorKazushi (Jam) Marukawa <marukawa@nec.com>
Fri, 24 Jan 2020 14:09:08 +0000 (15:09 +0100)
committerSimon Moll <simon.moll@emea.nec.com>
Fri, 24 Jan 2020 14:16:54 +0000 (15:16 +0100)
commit08ebd8c79e4b961d57da6c7e06b27db017327e8c
tree349eb0b6d030a93b3e6dc729d88cbcb90479a1d4tree | snapshot
parent8e96697c7df688e33a49b7883d20c4563eca0306commit | diff
[VE] aligned load/store isel patterns

Summary:
Aligned load/store isel patterns and tests for
i1/i8/16/32/64 (including extension and truncation) and fp32/64.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D73276
llvm/lib/Target/VE/VEISelDAGToDAG.cpp diff | blob | history
llvm/lib/Target/VE/VEInstrInfo.td diff | blob | history
llvm/test/CodeGen/VE/load.ll [new file with mode: 0644] blob
llvm/test/CodeGen/VE/store.ll [new file with mode: 0644] blob
external/llvm-project
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