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(parent: 886c73b) | patch
arm64: dts: Add L2 cache node to msm8916
authorStephen Boyd <sboyd@codeaurora.org>
Fri, 8 Jan 2016 23:57:09 +0000 (15:57 -0800)
committerAndy Gross <andy.gross@linaro.org>
Wed, 24 Feb 2016 06:14:02 +0000 (00:14 -0600)
commit0a9bcf4e09c098d14b3a07a7782c4cc24cde21dd
tree4a6f49cfbfbf970a565a75d41853b5b19b9235abtree | snapshot
parent886c73babe5ed681467dfd3b44bee06005229b98commit | diff
arm64: dts: Add L2 cache node to msm8916

The msm8916 SoC has an L2 cache for all 4 CPUs. Add it to the
dtsi file so that the cache hierarchy can be probed.

Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
arch/arm64/boot/dts/qcom/msm8916.dtsi diff | blob | history
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