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[LegalizeVectorTypes] Teach WidenVecRes_Convert to turn ANY_EXTEND into ANY_EXTEND_VE...
authorCraig Topper <craig.topper@intel.com>
Fri, 16 Nov 2018 07:13:34 +0000 (07:13 +0000)
committerCraig Topper <craig.topper@intel.com>
Fri, 16 Nov 2018 07:13:34 +0000 (07:13 +0000)
commit0b1bffae5c3b100bcbfdcbe6bd5f9556899b49df
tree3af48de87882f96d37633a67f55f6dccfe6a76e4tree | snapshot
parenta3f1de9121043ab5e4d60a3d6b202a36aceb1762commit | diff
[LegalizeVectorTypes] Teach WidenVecRes_Convert to turn ANY_EXTEND into ANY_EXTEND_VECTOR_INREG when the input and output types need to be widened to the same width.

If we don't do it here, DAGCombine will just end up creating it from the scalar any_extend+build_vector so might as well save a step.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@347034 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp diff | blob | history
external/llvm
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