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clk: qcom: Add qpnp clock divider support
authorTirupathi Reddy <tirupath@codeaurora.org>
Mon, 16 Jan 2017 10:09:37 +0000 (15:39 +0530)
committerTirupathi Reddy <tirupath@codeaurora.org>
Tue, 31 Jan 2017 08:46:32 +0000 (14:16 +0530)
commit0bab81c87c68427ce97de48658f51e0bdfabc123
treeebb6b5e586b31f32a23dcbaf1586be75000f5c37tree | snapshot
parentea4719da1fbdb56ef368b725496c3acdb4dde51ccommit | diff
clk: qcom: Add qpnp clock divider support

Clkdiv module provides a clock output on the PMIC with CXO as
the source. This clock can be routed through PMIC GPIOs. Add
a device driver to configure this clkdiv module.

CRs-Fixed: 1085200
Change-Id: I5e91a954bf5b6adbba8547b04361daf9788cca37
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Documentation/devicetree/bindings/clock/clk-qpnp-div.txt [new file with mode: 0644] blob
drivers/clk/qcom/Kconfig diff | blob | history
drivers/clk/qcom/Makefile diff | blob | history
drivers/clk/qcom/clk-qpnp-div.c [new file with mode: 0644] blob
Mirror: https://github.com/0ranko0P/kernel_xiaomi_msm8998/
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