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[mips] Update the P5600 scheduler for isComplete = 1
authorSimon Dardis <simon.dardis@imgtec.com>
Tue, 2 Aug 2016 10:32:00 +0000 (10:32 +0000)
committerSimon Dardis <simon.dardis@imgtec.com>
Tue, 2 Aug 2016 10:32:00 +0000 (10:32 +0000)
commit0bdecd2eeb34ae4c5b5c3ec3dadbe32af1dd315b
treed633822eb0bbd28c10bf214330ac5a8d99987957tree | snapshot
parent921ae8e295a4b69ee26342f2063ffc4b6b8abe0dcommit | diff
[mips] Update the P5600 scheduler for isComplete = 1

These changes update the schedule model for the P5600 and includes the
rest of the MSA and MIPS32R5 instruction sets.

Reviewers: dsanders, vkalintris

Differential Revision: https://reviews.llvm.org/D21835

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277441 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/Mips.td diff | blob | history
lib/Target/Mips/MipsSchedule.td diff | blob | history
lib/Target/Mips/MipsScheduleP5600.td diff | blob | history
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