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drm/amd/display: Correct min comp buffer size
authorDuncan Ma <duncan.ma@amd.com>
Tue, 17 May 2022 21:50:23 +0000 (17:50 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 7 Jun 2022 20:09:53 +0000 (16:09 -0400)
commit0c56705d8aae9696348cc320b71d531ede001b79
tree703395b1d1e48dfcb3f2fb5469eda4edbec3fd74
parent2d017189e2b39cf2fae63984215385401b77ea83
drm/amd/display: Correct min comp buffer size

[Why]
In 3-way mpo pipes, there is a case that we
overbook the CRB buffer size. At rare instances,
overbooking the crb will cause underflow. This only
happens when det_size changes dynamically
based on pipe_cnt.

[How]
Set min compbuff size to 1 segment when preparing BW.

Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Duncan Ma <duncan.ma@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c