clk: meson: Fix GXL HDMI PLL fractional bits width

clk: meson: Fix GXL HDMI PLL fractional bits width

[ Upstream commit 21310c39ec01e82ef3ef9bf8ac385b53ccdc158c ]

The GXL Documentation specifies 12 bits for the Fractional bit field,
bit the last bits have a different purpose that we cannot handle right
now, so update the bitwidth to have correct fractional calculations.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[narmstrong: added comment on GXL HHI_HDMI_PLL_CNTL register shift]
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lkml.kernel.org/r/20181121111922.1277-1-narmstrong@baylibre.com
Signed-off-by: Sasha Levin <sashal@kernel.org>