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arm64: kpti: Whitelist HiSilicon Taishan v110 CPUs
authorHanjun Guo <hanjun.guo@linaro.org>
Tue, 5 Mar 2019 13:40:58 +0000 (21:40 +0800)
committerCatalin Marinas <catalin.marinas@arm.com>
Tue, 19 Mar 2019 14:55:10 +0000 (14:55 +0000)
commit0ecc471a2cb7d4d386089445a727f47b59dc9b6e
treeedda8a42707c96a82cc21b4d2ff06b7e622abae9tree | snapshot
parentefd00c722ca855745fcc35a7e6675b5a782a3fc8commit | diff
arm64: kpti: Whitelist HiSilicon Taishan v110 CPUs

HiSilicon Taishan v110 CPUs didn't implement CSV3 field of the
ID_AA64PFR0_EL1 and are not susceptible to Meltdown, so whitelist
the MIDR in kpti_safe_list[] table.

Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
Reviewed-by: John Garry <john.garry@huawei.com>
Reviewed-by: Zhangshaokun <zhangshaokun@hisilicon.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/kernel/cpufeature.c diff | blob | history
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