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x86/cpu_entry_area: Add debugstore entries to cpu_entry_area
authorThomas Gleixner <tglx@linutronix.de>
Mon, 4 Dec 2017 14:07:49 +0000 (15:07 +0100)
committerIngo Molnar <mingo@kernel.org>
Sat, 23 Dec 2017 20:13:00 +0000 (21:13 +0100)
commit10043e02db7f8a4161f76434931051e7d797a5f6
tree02cfe50fc9c3ea40989a78394c81e88095abf725
parent4b6bbe95b87966ba08999574db65c93c5e925a36
x86/cpu_entry_area: Add debugstore entries to cpu_entry_area

The Intel PEBS/BTS debug store is a design trainwreck as it expects virtual
addresses which must be visible in any execution context.

So it is required to make these mappings visible to user space when kernel
page table isolation is active.

Provide enough room for the buffer mappings in the cpu_entry_area so the
buffers are available in the user space visible page tables.

At the point where the kernel side entry area is populated there is no
buffer available yet, but the kernel PMD must be populated. To achieve this
set the entries for these buffers to non present.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: David Laight <David.Laight@aculab.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Eduardo Valentin <eduval@amazon.com>
Cc: Greg KH <gregkh@linuxfoundation.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: aliguori@amazon.com
Cc: daniel.gruss@iaik.tugraz.at
Cc: hughd@google.com
Cc: keescook@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/events/intel/ds.c
arch/x86/events/perf_event.h
arch/x86/include/asm/cpu_entry_area.h
arch/x86/include/asm/intel_ds.h [new file with mode: 0644]
arch/x86/mm/cpu_entry_area.c