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[GlobalISel][AArch64] Add instruction selection support for G_FCOS and G_FSIN
authorJessica Paquette <jpaquette@apple.com>
Mon, 28 Jan 2019 18:34:18 +0000 (18:34 +0000)
committerJessica Paquette <jpaquette@apple.com>
Mon, 28 Jan 2019 18:34:18 +0000 (18:34 +0000)
commit11b94ff4098c057c4733cccb04673d5dd641bd0d
tree2bac8dd31248a6009406c2616e8d44352e824cf6tree | snapshot
parentc02744dfa262410616a859e069374b5fbec4d385commit | diff
[GlobalISel][AArch64] Add instruction selection support for G_FCOS and G_FSIN

This contains all of the legalizer changes from D57197 necessary to select
G_FCOS and G_FSIN. It also updates several existing IR tests in
test/CodeGen/AArch64 that verify that we correctly lower the G_FCOS and G_FSIN
instructions.

https://reviews.llvm.org/D57197
3/3

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352402 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/GlobalISel/LegalizerHelper.cpp diff | blob | history
lib/Target/AArch64/AArch64LegalizerInfo.cpp diff | blob | history
lib/Target/AArch64/AArch64RegisterBankInfo.cpp diff | blob | history
test/CodeGen/AArch64/GlobalISel/legalize-cos.mir [new file with mode: 0644] blob
test/CodeGen/AArch64/GlobalISel/legalize-sin.mir [new file with mode: 0644] blob
test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir diff | blob | history
test/CodeGen/AArch64/arm64-vfloatintrinsics.ll diff | blob | history
test/CodeGen/AArch64/f16-instructions.ll diff | blob | history
test/CodeGen/AArch64/sincospow-vector-expansion.ll diff | blob | history
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