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[X86] Preserve more liveness information in emitStackProbeInline
authorFrancis Visoiu Mistrih <francisvm@yahoo.com>
Tue, 31 Jul 2018 16:41:12 +0000 (16:41 +0000)
committerFrancis Visoiu Mistrih <francisvm@yahoo.com>
Tue, 31 Jul 2018 16:41:12 +0000 (16:41 +0000)
commit150fbb2f3913d825a13b1ad9ab07199a0e092928
tree05364c37fa94cebcd88c355cabfaf19dba3bbb21
parent7eb35db2b9b03ae441f57701654aa58034e2a635
[X86] Preserve more liveness information in emitStackProbeInline

This commit fixes two issues with the liveness information after the
call:

1) The code always spills RCX and RDX if InProlog == true, which results
in an use of undefined phys reg.
2) FinalReg, JoinReg, RoundedReg, SizeReg are not added as live-ins to
the basic blocks that use them, therefore they are seen undefined.

https://llvm.org/PR38376

Differential Revision: https://reviews.llvm.org/D50020

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338400 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86FrameLowering.cpp
test/CodeGen/X86/win_coreclr_chkstk.ll
test/CodeGen/X86/win_coreclr_chkstk_liveins.mir [new file with mode: 0644]