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(parent: b146e5e) | patch
drm/i915/selftests: Fix MI_STORE_DWORD_IMM alignment
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 6 Mar 2019 08:24:47 +0000 (08:24 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Wed, 6 Mar 2019 11:08:32 +0000 (11:08 +0000)
commit161996a8003faa22baaac9f379ef580af551d26f
treebdc60c4df2940b401a5161f5d0dbb8c8fca4ec24tree | snapshot
parentb146e5efe660e03eee2b2c4a2e02410d9a8824eccommit | diff
drm/i915/selftests: Fix MI_STORE_DWORD_IMM alignment

MI_STORE_DWORD_IMM wants to write into a dword-aligned (4B) address, we
mistakenly cleared bit2 and not bits 0 and 1.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190306082447.21563-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/selftests/i915_gem_context.c diff | blob | history
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