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[llvm][nvptx] add atomicity to counter in ISelLowering
authorTres Popp <tpopp@google.com>
Fri, 15 Jan 2021 16:11:41 +0000 (17:11 +0100)
committerTres Popp <tpopp@google.com>
Tue, 19 Jan 2021 09:20:20 +0000 (10:20 +0100)
commit170199f56262cc3c80591d332da3128bc25ada96
tree888de4c9ff02f8bb5dddf0f3558cd68c5e54ccd1
parentc3ce2627949eee3b5d3012db78f670919a49b35d
[llvm][nvptx] add atomicity to counter in ISelLowering

Previously uniqueCallSite could have race conditions between different
threads. Now it is accessed with an atomic RMW and will be unique
between different threads.

Differential Revision: https://reviews.llvm.org/D94784
llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
llvm/lib/Target/NVPTX/NVPTXISelLowering.h